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tarookumic |
library ieee;
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use ieee.std_logic_1164.all;
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-- PREFIX: apm_xxx
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package armpmodel is
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-------------------------------------------------------------------------------
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-- Processor Modes
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constant APM_USR : std_logic_vector(4 downto 0) := "10000"; -- 1oooo
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constant APM_SYS : std_logic_vector(4 downto 0) := "11111"; -- 11111
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constant APM_SVC : std_logic_vector(4 downto 0) := "10011"; -- 1oo11
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constant APM_ABT : std_logic_vector(4 downto 0) := "10111"; -- 1o111
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constant APM_UND : std_logic_vector(4 downto 0) := "11011"; -- 11o11
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constant APM_IRQ : std_logic_vector(4 downto 0) := "10010"; -- 1oo1o
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constant APM_FIQ : std_logic_vector(4 downto 0) := "10001"; -- 1ooo1
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-- check weather privileged mode
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function apm_is_privmode (
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mode : std_logic_vector(4 downto 0)
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) return boolean;
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-------------------------------------------------------------------------------
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-- Trap types
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type apm_trap is (
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apm_trap_reset, -- reset
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apm_trap_undef, -- undefined (EXSTG)
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apm_trap_swi, -- software interrupt (DRSTG)
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apm_trap_prefch, -- prefetch error (IMSTG)
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apm_trap_dabort, -- data abort error (MESTG)
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apm_trap_irq, -- interrupt
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apm_trap_fiq -- fast interrupt
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);
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-- Trap jump vectors
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constant APM_RESET_VEC : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
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constant APM_UNDEF_VEC : std_logic_vector(31 downto 0) := "00000000000000000000000000000100";
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constant APM_SWI_VEC : std_logic_vector(31 downto 0) := "00000000000000000000000000001000";
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constant APM_PREFCH_VEC : std_logic_vector(31 downto 0) := "00000000000000000000000000001100";
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constant APM_DABORT_VEC : std_logic_vector(31 downto 0) := "00000000000000000000000000010000";
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constant APM_IRQ_VEC : std_logic_vector(31 downto 0) := "00000000000000000000000000011000";
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constant APM_FIQ_VEC : std_logic_vector(31 downto 0) := "00000000000000000000000000011100";
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-- Trap ctrl
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type apm_trapctrl is record
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traptype : apm_trap;
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trap : std_logic;
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end record;
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-------------------------------------------------------------------------------
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-- Current Program Status Register (CPSR)
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-- +---+---+---+---+---+------------+---+---+---+------+
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-- | n | z | c | v | q | dnm(raz) | i | f | t | mode |
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-- +---+---+---+---+---+------------+---+---+---+------+
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-- exstg controlled part of CPSR
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type apm_excpsr is record
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n : std_logic; -- negative
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z : std_logic; -- zero
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c : std_logic; -- carry
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v : std_logic; -- overflow
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-- extensions
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-- fext : std_logic_vector(3 downto 0); -- cpsr(27:24)
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-- xext : std_logic_vector(7 downto 0); -- cpsr(15:8)
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-- sext : std_logic_vector(7 downto 0); -- cpsr(23:16)
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end record;
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-- wrstg controlled part of CPSR
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type apm_wrcpsr is record
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i : std_logic; -- [7] irq
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f : std_logic; -- [6] fiq
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t : std_logic; -- [5] thumb
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mode : std_logic_vector(4 downto 0);
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-- pragma translate_off
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-- dbgmode : aba_atyp_dbgpmode; -- readable pmode for dbg
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-- pragma translate_on
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end record;
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-- complete CPSR
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type apm_cpsr is record
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ex : apm_excpsr;
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wr : apm_wrcpsr;
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end record;
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-- Banked SPSR
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type apm_spsr is record
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svc_spsr : apm_cpsr;
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abt_spsr : apm_cpsr;
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und_spsr : apm_cpsr;
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irq_spsr : apm_cpsr;
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fiq_spsr : apm_cpsr;
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end record;
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-- convert from stdlogic to spm_cpsr
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function apm_stdtocpsr (
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data : std_logic_vector
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) return apm_cpsr;
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-- convert from spm_cpsr to stdlogic
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function apm_cpsrtostd (
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cpsr : apm_cpsr
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) return std_logic_vector;
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-- assemble new cpsr for msr cmd
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function apm_msr (
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insn : std_logic_vector(31 downto 0);
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newcpsr : apm_cpsr;
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oldcpsr : apm_cpsr
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) return apm_cpsr;
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constant APM_MSR_C : integer := 16;
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constant APM_MSR_X : integer := 17;
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constant APM_MSR_S : integer := 18;
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constant APM_MSR_F : integer := 19;
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-------------------------------------------------------------------------------
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constant APM_RREAL_U : integer := 4; -- banked register range
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constant APM_RREAL_D : integer := 0;
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constant APM_REG_U : integer := 3; -- logical register range
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constant APM_REG_D : integer := 0;
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constant APM_REG_LINK : std_logic_vector(3 downto 0) := "1110"; -- link register
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constant APM_REG_PC : std_logic_vector(3 downto 0) := "1111"; -- programm counter
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constant APM_RREAL_PC : std_logic_vector(4 downto 0) := "01111"; -- banked program counter
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constant APM_REGLIST_SZ : integer := 16;
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constant APM_REGLIST_pc : integer := 15;
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-------------------------------------------------------------------------------
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-- map to banked register of <mode>
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function apm_bankreg(
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mode : in std_logic_vector(4 downto 0);
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addr : in std_logic_vector
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) return std_logic_vector;
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-- retrieve the banked spsr for <mode>
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function apm_bankspsr(
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mode : in std_logic_vector(4 downto 0);
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spsr : in apm_spsr
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) return apm_cpsr;
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-- set bank spsr
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procedure apm_setspsr(
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mode : in std_logic_vector(4 downto 0);
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spsr : inout apm_spsr;
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cpsr : in apm_cpsr
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);
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-- check weather <mode> has a spsr
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function apm_is_hasspsr (
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mode : std_logic_vector(4 downto 0)
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) return boolean;
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end armpmodel;
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package body armpmodel is
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-------------------------------------------------------------------------------
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function apm_is_privmode (
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mode : std_logic_vector(4 downto 0)
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) return boolean is
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variable tmp : boolean;
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begin
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tmp := true;
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if mode = APM_USR then
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tmp := false;
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end if;
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return tmp;
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end;
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-------------------------------------------------------------------------------
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constant APM_N_C : integer := 31;
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constant APM_Z_C : integer := 30;
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constant APM_C_C : integer := 29;
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constant APM_V_C : integer := 28;
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constant APM_Q_C : integer := 27;
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constant APM_I_C : integer := 7;
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constant APM_F_C : integer := 6;
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constant APM_T_C : integer := 5;
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constant APM_MODE_U : integer := 4;
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constant APM_MODE_D : integer := 0;
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-- extensions
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-- constant APM_FEXT_U : integer := 27;
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-- constant APM_FEXT_D : integer := 24;
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-- constant APM_XEXT_U : integer := 15;
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-- constant APM_XEXT_D : integer := 8;
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-- constant APM_SEXT_U : integer := 23;
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-- constant APM_SEXT_D : integer := 16;
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function apm_stdtocpsr (
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data : std_logic_vector
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) return apm_cpsr is
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variable tmp : apm_cpsr;
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begin
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tmp.ex.n := data(APM_N_C);
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tmp.ex.z := data(APM_Z_C);
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tmp.ex.c := data(APM_C_C);
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tmp.ex.v := data(APM_V_C);
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tmp.wr.i := data(APM_I_C);
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tmp.wr.f := data(APM_F_C);
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tmp.wr.t := data(APM_T_C);
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tmp.wr.mode := data(APM_MODE_U downto APM_MODE_D);
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-- extensions
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-- tmp.fext := data(ACP_FEXT_U downto ACP_FEXT_D);
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-- tmp.xext := data(ACP_XEXT_U downto ACP_XEXT_D);
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-- tmp.sext := data(ACP_SEXT_U downto ACP_SEXT_D);
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return tmp;
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end;
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function apm_cpsrtostd (
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cpsr : apm_cpsr
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) return std_logic_vector is
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variable tmp : std_logic_vector(31 downto 0);
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begin
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tmp := (others => '0');
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tmp(APM_N_C) := cpsr.ex.n;
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tmp(APM_Z_C) := cpsr.ex.z;
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tmp(APM_C_C) := cpsr.ex.c;
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tmp(APM_V_C) := cpsr.ex.v;
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tmp(APM_Q_C) := '0';
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tmp(APM_I_C) := cpsr.wr.i;
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tmp(APM_F_C) := cpsr.wr.f;
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tmp(APM_T_C) := cpsr.wr.t;
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tmp(APM_MODE_U downto APM_MODE_D) := cpsr.wr.mode;
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-- extensions
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-- tmp(ACP_FEXT_U downto ACP_FEXT_D) := cpsr.fext;
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-- tmp(ACP_XEXT_U downto ACP_XEXT_D) := cpsr.xext;
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-- tmp(ACP_SEXT_U downto ACP_SEXT_D) := cpsr.sext;
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return tmp;
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end;
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function apm_msr (
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insn : std_logic_vector(31 downto 0);
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newcpsr : apm_cpsr;
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oldcpsr : apm_cpsr
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) return apm_cpsr is
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variable tmp : apm_cpsr;
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begin
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tmp := oldcpsr;
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-- +---+---+---+---+---+------------+---+---+---+------+
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-- | n | z | c | v | q | dnm(raz) | i | f | t | mode |
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-- +---+---+---+---+---+------------+---+---+---+------+
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-- $(del)
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-- if opcode[25] == 1
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-- operand = 8_bit_immediate Rotate_Right (rotate_imm * 2)
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-- else /* opcode[25] == 0 */
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-- operand = Rm
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--
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-- if R == 0 then
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-- if field_mask[0] == 1 and InAPrivilegedMode() then
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-- CPSR[7:0] = operand[7:0]
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-- if field_mask[1] == 1 and InAPrivilegedMode() then
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-- CPSR[15:8] = operand[15:8]
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-- if field_mask[2] == 1 and InAPrivilegedMode() then
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-- CPSR[23:16] = operand[23:16]
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-- if field_mask[3] == 1 then
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-- CPSR[31:24] = operand[31:24]
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-- else /* R == 1 */
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-- if field_mask[0] == 1 and CurrentModeHasSPSR() then
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-- SPSR[7:0] = operand[7:0]
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-- if field_mask[1] == 1 and CurrentModeHasSPSR() then
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-- SPSR[15:8] = operand[15:8]
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-- if field_mask[2] == 1 and CurrentModeHasSPSR() then
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-- SPSR[23:16] = operand[23:16]
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-- if field_mask[3] == 1 and CurrentModeHasSPSR() then
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-- SPSR[31:24] = operand[31:24]
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-- $(/del)
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if insn(APM_MSR_C) = '1' then
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tmp.wr.i := newcpsr.wr.i;
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tmp.wr.f := newcpsr.wr.f;
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tmp.wr.t := newcpsr.wr.t;
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tmp.wr.mode := newcpsr.wr.mode;
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end if;
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if insn(APM_MSR_X) = '1' then
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-- extensions
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-- tmp.xext := newcpsr.xext;
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end if;
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if insn(APM_MSR_S) = '1' then
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-- extensions
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-- tmp.sext := newcpsr.sext;
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end if;
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if insn(APM_MSR_F) = '1' then
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tmp.ex.n := newcpsr.ex.n;
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tmp.ex.z := newcpsr.ex.z;
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tmp.ex.c := newcpsr.ex.c;
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tmp.ex.v := newcpsr.ex.v;
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-- extensions
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-- tmp.ex.fext := newcpsr.fext;
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end if;
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return tmp;
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end;
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-------------------------------------------------------------------------------
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-- banked register mapping:
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--
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-- USR SYS SVC ABT UND IRQ FIQ
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-- +-------+-------+-------+-------+-------+-------+-------+
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--R0-R7 |
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-- +-------+---------------------------------------+-------+
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--R8-R12 | R16-R20
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-- +-------+---------------------------------------+-------+
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--R13 | R24 R26 R28 R30 R21
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-- +-------+---------------------------------------+-------+
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--R14 | R25 R27 R29 R31 R22
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-- +-------+---------------------------------------+-------+
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function apm_bankreg(
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mode : in std_logic_vector(4 downto 0);
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addr : in std_logic_vector
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) return std_logic_vector is
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|
|
variable tmp : std_logic_vector(addr'high+1 downto 0); -- +1: return is 5bits
|
331 |
|
|
variable bank : std_logic_vector(addr'high+1 downto 0);
|
332 |
|
|
begin
|
333 |
|
|
tmp := "0"&addr(addr'high downto 0);
|
334 |
|
|
bank := "0"&addr(addr'high downto 0);
|
335 |
|
|
case mode is
|
336 |
|
|
when APM_USR =>
|
337 |
|
|
when APM_SYS =>
|
338 |
|
|
when APM_SVC =>
|
339 |
|
|
bank := "1100" & not addr(0);
|
340 |
|
|
when APM_ABT =>
|
341 |
|
|
bank := "1101" & not addr(0);
|
342 |
|
|
when APM_UND =>
|
343 |
|
|
bank := "1110" & not addr(0);
|
344 |
|
|
when APM_FIQ =>
|
345 |
|
|
if addr(3) = '1' then
|
346 |
|
|
bank(4 downto 3) := "10";
|
347 |
|
|
tmp(4 downto 3) := "10";
|
348 |
|
|
end if;
|
349 |
|
|
when APM_IRQ =>
|
350 |
|
|
bank := "1111" & not addr(0);
|
351 |
|
|
when others =>
|
352 |
|
|
end case;
|
353 |
|
|
case addr(3 downto 0) is
|
354 |
|
|
when "1101"|"1110" => tmp := bank;
|
355 |
|
|
when others =>
|
356 |
|
|
end case;
|
357 |
|
|
return tmp;
|
358 |
|
|
end;
|
359 |
|
|
|
360 |
|
|
procedure apm_setspsr(
|
361 |
|
|
mode : in std_logic_vector(4 downto 0);
|
362 |
|
|
spsr : inout apm_spsr;
|
363 |
|
|
cpsr : in apm_cpsr
|
364 |
|
|
) is
|
365 |
|
|
begin
|
366 |
|
|
case mode is
|
367 |
|
|
when APM_SVC =>
|
368 |
|
|
spsr.svc_SPSR := cpsr;
|
369 |
|
|
when APM_ABT =>
|
370 |
|
|
spsr.abt_SPSR := cpsr;
|
371 |
|
|
when APM_UND =>
|
372 |
|
|
spsr.und_SPSR := cpsr;
|
373 |
|
|
when APM_IRQ =>
|
374 |
|
|
spsr.irq_SPSR := cpsr;
|
375 |
|
|
when APM_FIQ =>
|
376 |
|
|
spsr.fiq_SPSR := cpsr;
|
377 |
|
|
when others =>
|
378 |
|
|
end case;
|
379 |
|
|
end;
|
380 |
|
|
|
381 |
|
|
function apm_bankspsr(
|
382 |
|
|
mode : in std_logic_vector(4 downto 0);
|
383 |
|
|
spsr : in apm_spsr
|
384 |
|
|
) return apm_cpsr is
|
385 |
|
|
variable tmp : apm_cpsr;
|
386 |
|
|
begin
|
387 |
|
|
tmp := spsr.svc_spsr;
|
388 |
|
|
case mode is
|
389 |
|
|
when APM_SVC =>
|
390 |
|
|
tmp := spsr.svc_spsr;
|
391 |
|
|
when APM_ABT =>
|
392 |
|
|
tmp := spsr.abt_spsr;
|
393 |
|
|
when APM_UND =>
|
394 |
|
|
tmp := spsr.und_spsr;
|
395 |
|
|
when APM_IRQ =>
|
396 |
|
|
tmp := spsr.irq_spsr;
|
397 |
|
|
when APM_FIQ =>
|
398 |
|
|
tmp := spsr.fiq_spsr;
|
399 |
|
|
when others =>
|
400 |
|
|
end case;
|
401 |
|
|
return tmp;
|
402 |
|
|
end;
|
403 |
|
|
|
404 |
|
|
function apm_is_hasspsr (
|
405 |
|
|
mode : std_logic_vector(4 downto 0)
|
406 |
|
|
) return boolean is
|
407 |
|
|
variable tmp : boolean;
|
408 |
|
|
begin
|
409 |
|
|
tmp := true;
|
410 |
|
|
if mode = APM_USR or
|
411 |
|
|
mode = APM_SYS then
|
412 |
|
|
tmp := false;
|
413 |
|
|
end if;
|
414 |
|
|
return tmp;
|
415 |
|
|
end;
|
416 |
|
|
|
417 |
|
|
end armpmodel;
|