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[/] [core_arm/] [trunk/] [vhdl/] [mem/] [cache/] [libs/] [gendc_lib.vhd] - Blame information for rev 4

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-- $(lic)
-- $(help_generic)
-- $(help_local)
 
library ieee;
use ieee.std_logic_1164.all;
use work.config.all;
use work.cache_config.all;
use work.gencmem_lib.all;
use work.int.all;
use work.memdef.all;
 
-- PREFIX: gdcl_xxx
package gendc_lib is
 
type gdcl_ctrl is record
  writeback : std_logic;
  allocateonstore : std_logic;
end record;
 
-- dcache tag layout
-- addr: |         tag         | (tag)addr | line | 00 |
--                                   |
--     +-----------------------------+
--     | +-------+---------------------+---------+
--     +>| DIRTY |       CLTAG         | CLVALID |
--       +-------+---------------------+---------+
 
-- addr to cmem-tag fields/access layout
constant GDCL_TTAG_D : integer  :=  2 + GCML_DC_TLINE_BSZ + GCML_DC_TADDR_BSZ;
constant GDCL_TTAG_U : integer  := (2 + GCML_DC_TLINE_BSZ + GCML_DC_TADDR_BSZ + GCML_DC_TTAG_BSZ) -1;
constant GDCL_TADDR_D : integer :=  2 + GCML_DC_TLINE_BSZ;
constant GDCL_TADDR_U : integer := (2 + GCML_DC_TLINE_BSZ + GCML_DC_TADDR_BSZ) -1;
constant GDCL_TLINE_D : integer :=  2;
constant GDCL_TLINE_U : integer := (2 + GCML_DC_TLINE_BSZ ) -1;
 
-- addr to cmem-data fields/access layout
constant GDCL_DADDR_D : integer :=  2 + GCML_DC_DLINE_BSZ;
constant GDCL_DADDR_U : integer := (2 + GCML_DC_DLINE_BSZ + GCML_DC_DADDR_BSZ) -1;
constant GDCL_DLINE_D : integer :=  2;
constant GDCL_DLINE_U : integer := (2 + GCML_DC_DLINE_BSZ ) -1;
 
type gdcl_param is record
  size      : lmd_memsize;
  read      : std_logic;
  lock      : std_logic;
  writedata : std_logic;
  addrin    : std_logic;
  signed    : std_logic;
end record;
 
function gdcl_is_taghit (
  addr : std_logic_vector(31 downto 0);
  cline : gcml_dc_tline
) return boolean;
 
function gdcl_is_linevalid (
  addr : std_logic_vector(31 downto 0);
  cline : gcml_dc_tline
) return boolean;
 
function gdcl_is_linedirty (
  addr : std_logic_vector(31 downto 0);
  cline : gcml_dc_tline
) return boolean;
 
function gdcl_is_free (
  cline : gcml_dc_tline
) return boolean;
 
function gdcl_is_dirty (
  cline : gcml_dc_tline
) return boolean;
 
function gdcl_getpos (
  addr : std_logic_vector(GCML_DC_TLINE_BSZ-1 downto 0)
) return integer;
 
function gdcl_readdata (
  addrlo : std_logic_vector(1 downto 0);
  data : std_logic_vector(31 downto 0);
  bo   : lmd_byteorder;
  sign : std_logic;
  size : lmd_memsize
) return std_logic_vector;
 
function gdcl_writedata (
  addrlo : std_logic_vector(1 downto 0);
  base : std_logic_vector(31 downto 0);
  data : std_logic_vector(31 downto 0);
  bo   : lmd_byteorder;
  size : lmd_memsize
) return std_logic_vector;
 
constant GDCL_ZERO_C  : std_logic_vector(CFG_DC_TLINE_SZ-1 downto 0) := (others => '0');
constant GDCL_LAST_C  : std_logic_vector(CFG_DC_TLINE_SZ-1 downto 0) := (others => '1');
constant GDCL_NLAST_C : std_logic_vector(CFG_DC_TLINE_SZ-2 downto 0) := (others => '1');
 
end gendc_lib;
 
package body gendc_lib is
 
function gdcl_writedata (
  addrlo : std_logic_vector(1 downto 0);
  base : std_logic_vector(31 downto 0);
  data : std_logic_vector(31 downto 0);
  bo   : lmd_byteorder;
  size : lmd_memsize
) return std_logic_vector is
  variable tmp  : std_logic_vector(31 downto 0);
begin
  tmp := base;
  if bo = lmd_little then
    -- lmd_little: byte[3 2 1 0], hw[1 0]
    case size is
      when lmd_byte =>
        case addrlo(1 downto 0) is
          when "00" => tmp( 7 downto  0) := data( 7 downto  0);
          when "01" => tmp(15 downto  8) := data( 7 downto  0);
          when "10" => tmp(23 downto 16) := data( 7 downto  0);
          when "11" => tmp(31 downto 24) := data( 7 downto  0);
          when others => null;
        end case;
      when lmd_half =>
        case addrlo(1 downto 1) is
          when "0"  => tmp(15 downto  0) := data(15 downto  0);
          when "1"  => tmp(31 downto 16) := data(15 downto  0);
          when others => null;
        end case;
      when others => tmp := data;
    end case;
  else
    -- lmd_big:    byte[0 1 2 3], hw[0 1]
    case size is
      when lmd_byte =>
        case addrlo(1 downto 0) is
          when "00" => tmp(31 downto 24) := data( 7 downto  0);
          when "01" => tmp(23 downto 16) := data( 7 downto  0);
          when "10" => tmp(15 downto  8) := data( 7 downto  0);
          when "11" => tmp( 7 downto  0) := data( 7 downto  0);
          when others => null;
        end case;
      when lmd_half =>
        case addrlo(1 downto 1) is
          when "0"  => tmp(31 downto 16) := data(15 downto  0);
          when "1"  => tmp(15 downto  0) := data(15 downto  0);
          when others => null;
        end case;
      when others => tmp := data;
    end case;
  end if;
  return tmp;
end;
 
function gdcl_readdata (
  addrlo : std_logic_vector(1 downto 0);
  data : std_logic_vector(31 downto 0);
  bo   : lmd_byteorder;
  sign : std_logic;
  size : lmd_memsize
) return std_logic_vector is
  variable tmp  : std_logic_vector(31 downto 0);
begin
  tmp := (others => '0');
  if bo = lmd_little then
    -- lmd_little: byte[3 2 1 0], hw[1 0]
    case size is
      when lmd_byte =>
        case addrlo(1 downto 0) is
          when "00" => tmp( 7 downto 0) := data( 7 downto  0);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data( 7));
                       end if;
          when "01" => tmp( 7 downto 0) := data(15 downto  8);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data(15));
                       end if;
          when "10" => tmp( 7 downto 0) := data(23 downto 16);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data(23));
                       end if;
          when "11" => tmp( 7 downto 0) := data(31 downto 24);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data(31));
                       end if;
          when others => null;
        end case;
      when lmd_half =>
        case addrlo(1 downto 1) is
          when "0"  => tmp(15 downto 0) := data(15 downto  0);
                       if sign='1' then
                         tmp(31 downto 16) := (others => data( 15));
                       end if;
          when "1"  => tmp(15 downto 0) := data(31 downto  16);
                       if sign='1' then
                         tmp(31 downto 16) := (others => data(31));
                       end if;
          when others => null;
        end case;
      when others => tmp := data;
    end case;
  else
    -- lmd_big:    byte[0 1 2 3], hw[0 1]
    case size is
      when lmd_byte =>
        case addrlo(1 downto 0) is
          when "00" => tmp( 7 downto 0) := data(31 downto  24);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data(31));
                       end if;
          when "01" => tmp( 7 downto 0) := data(23 downto 16);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data(23));
                       end if;
          when "10" => tmp( 7 downto 0) := data(15 downto  8);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data(16));
                       end if;
          when "11" => tmp( 7 downto 0) := data( 7 downto  0);
                       if sign='1' then
                         tmp(31 downto 8) := (others => data(7));
                       end if;
          when others => null;
        end case;
      when lmd_half =>
        case addrlo(1 downto 1) is
          when "0"  => tmp(15 downto 0) := data(31 downto  16);
                       if sign='1' then
                         tmp(31 downto 16) := (others => data(31));
                       end if;
          when "1"  => tmp(15 downto 0) := data(15 downto  0);
                       if sign='1' then
                         tmp(31 downto 16) := (others => data( 15));
                       end if;
          when others => null;
        end case;
      when others => tmp := data;
    end case;
  end if;
  return tmp;
end;
 
function gdcl_getpos (
  addr : std_logic_vector(GCML_DC_TLINE_BSZ-1 downto 0)
) return integer is
  variable tmp : integer;
begin
  tmp := 0;
  if CFG_DC_DLINE_SZ > 1 then
    tmp := lin_convint(addr(GCML_DC_DLINE_BSZ-1 downto 0));
  end if;
  return tmp;
end;
 
function gdcl_is_taghit (
  addr : std_logic_vector(31 downto 0);
  cline : gcml_dc_tline
) return boolean is
  variable tmp : boolean;
  variable tag : std_logic_vector(GDCL_TTAG_U downto GDCL_TTAG_D);
begin
  tmp := false;
  tag := addr(GDCL_TTAG_U downto GDCL_TTAG_D);
  if (tag = cline.tag) then
    tmp := true;
  end if;
  return tmp;
end;
 
function gdcl_is_linevalid (
  addr : std_logic_vector(31 downto 0);
  cline : gcml_dc_tline
) return boolean is
  variable tmp : boolean;
  variable line : std_logic_vector(GDCL_TLINE_U downto GDCL_TLINE_D);
begin
  tmp := false;
  line := addr(GDCL_TLINE_U downto GDCL_TLINE_D);
  if (cline.valid(lin_convint(line)) = '1')
  then
    tmp := true;
  end if;
  return tmp;
end;
 
function gdcl_is_linedirty (
  addr : std_logic_vector(31 downto 0);
  cline : gcml_dc_tline
) return boolean is
  variable tmp : boolean;
  variable line : std_logic_vector(GDCL_TLINE_U downto GDCL_TLINE_D);
begin
  tmp := false;
  line := addr(GDCL_TLINE_U downto GDCL_TLINE_D);
  if (cline.dirty(lin_convint(line)) = '1')
  then
    tmp := true;
  end if;
  return tmp;
end;
 
function gdcl_is_free (
  cline : gcml_dc_tline
) return boolean is
  variable tmp : boolean;
begin
  tmp := true;
  for i in CFG_DC_TLINE_SZ-1 downto 0 loop
    if cline.valid(i) = '1' then
      tmp := false;
    end if;
  end loop;  -- i
  return tmp;
end;
 
function gdcl_is_dirty (
  cline : gcml_dc_tline
) return boolean is
  variable tmp : boolean;
begin
  tmp := false;
  for i in CFG_DC_TLINE_SZ-1 downto 0 loop
    if cline.dirty(i) = '1' then
      tmp := true;
    end if;
  end loop;  -- i
  return tmp;
end;
 
end gendc_lib;
 

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Subversion Repositories core_arm

[/] [core_arm/] [trunk/] [vhdl/] [mem/] [cache/] [libs/] [gendc_lib.vhd] - Blame information for rev 4

Line No.	Rev	Author	Line
1	2	tarookumic	`-- $(lic)`
2			`-- $(help_generic)`
3			`-- $(help_local)`
4
5			`library ieee;`
6			`use ieee.std_logic_1164.all;`
7			`use work.config.all;`
8			`use work.cache_config.all;`
9			`use work.gencmem_lib.all;`
10			`use work.int.all;`
11			`use work.memdef.all;`
12
13			`-- PREFIX: gdcl_xxx`
14			`package gendc_lib is`
15
16			`type gdcl_ctrl is record`
17			`writeback : std_logic;`
18			`allocateonstore : std_logic;`
19			`end record;`
20
21			`-- dcache tag layout`
22			`-- addr: \| tag \| (tag)addr \| line \| 00 \|`
23			`-- \|`
24			`-- +-----------------------------+`
25			`-- \| +-------+---------------------+---------+`
26			`-- +>\| DIRTY \| CLTAG \| CLVALID \|`
27			`-- +-------+---------------------+---------+`
28
29			`-- addr to cmem-tag fields/access layout`
30			`constant GDCL_TTAG_D : integer := 2 + GCML_DC_TLINE_BSZ + GCML_DC_TADDR_BSZ;`
31			`constant GDCL_TTAG_U : integer := (2 + GCML_DC_TLINE_BSZ + GCML_DC_TADDR_BSZ + GCML_DC_TTAG_BSZ) -1;`
32			`constant GDCL_TADDR_D : integer := 2 + GCML_DC_TLINE_BSZ;`
33			`constant GDCL_TADDR_U : integer := (2 + GCML_DC_TLINE_BSZ + GCML_DC_TADDR_BSZ) -1;`
34			`constant GDCL_TLINE_D : integer := 2;`
35			`constant GDCL_TLINE_U : integer := (2 + GCML_DC_TLINE_BSZ ) -1;`
36
37			`-- addr to cmem-data fields/access layout`
38			`constant GDCL_DADDR_D : integer := 2 + GCML_DC_DLINE_BSZ;`
39			`constant GDCL_DADDR_U : integer := (2 + GCML_DC_DLINE_BSZ + GCML_DC_DADDR_BSZ) -1;`
40			`constant GDCL_DLINE_D : integer := 2;`
41			`constant GDCL_DLINE_U : integer := (2 + GCML_DC_DLINE_BSZ ) -1;`
42
43			`type gdcl_param is record`
44			`size : lmd_memsize;`
45			`read : std_logic;`
46			`lock : std_logic;`
47			`writedata : std_logic;`
48			`addrin : std_logic;`
49			`signed : std_logic;`
50			`end record;`
51
52			`function gdcl_is_taghit (`
53			`addr : std_logic_vector(31 downto 0);`
54			`cline : gcml_dc_tline`
55			`) return boolean;`
56
57			`function gdcl_is_linevalid (`
58			`addr : std_logic_vector(31 downto 0);`
59			`cline : gcml_dc_tline`
60			`) return boolean;`
61
62			`function gdcl_is_linedirty (`
63			`addr : std_logic_vector(31 downto 0);`
64			`cline : gcml_dc_tline`
65			`) return boolean;`
66
67			`function gdcl_is_free (`
68			`cline : gcml_dc_tline`
69			`) return boolean;`
70
71			`function gdcl_is_dirty (`
72			`cline : gcml_dc_tline`
73			`) return boolean;`
74
75			`function gdcl_getpos (`
76			`addr : std_logic_vector(GCML_DC_TLINE_BSZ-1 downto 0)`
77			`) return integer;`
78
79			`function gdcl_readdata (`
80			`addrlo : std_logic_vector(1 downto 0);`
81			`data : std_logic_vector(31 downto 0);`
82			`bo : lmd_byteorder;`
83			`sign : std_logic;`
84			`size : lmd_memsize`
85			`) return std_logic_vector;`
86
87			`function gdcl_writedata (`
88			`addrlo : std_logic_vector(1 downto 0);`
89			`base : std_logic_vector(31 downto 0);`
90			`data : std_logic_vector(31 downto 0);`
91			`bo : lmd_byteorder;`
92			`size : lmd_memsize`
93			`) return std_logic_vector;`
94
95			`constant GDCL_ZERO_C : std_logic_vector(CFG_DC_TLINE_SZ-1 downto 0) := (others => '0');`
96			`constant GDCL_LAST_C : std_logic_vector(CFG_DC_TLINE_SZ-1 downto 0) := (others => '1');`
97			`constant GDCL_NLAST_C : std_logic_vector(CFG_DC_TLINE_SZ-2 downto 0) := (others => '1');`
98
99			`end gendc_lib;`
100
101			`package body gendc_lib is`
102
103			`function gdcl_writedata (`
104			`addrlo : std_logic_vector(1 downto 0);`
105			`base : std_logic_vector(31 downto 0);`
106			`data : std_logic_vector(31 downto 0);`
107			`bo : lmd_byteorder;`
108			`size : lmd_memsize`
109			`) return std_logic_vector is`
110			`variable tmp : std_logic_vector(31 downto 0);`
111			`begin`
112			`tmp := base;`
113			`if bo = lmd_little then`
114			`-- lmd_little: byte[3 2 1 0], hw[1 0]`
115			`case size is`
116			`when lmd_byte =>`
117			`case addrlo(1 downto 0) is`
118			`when "00" => tmp( 7 downto 0) := data( 7 downto 0);`
119			`when "01" => tmp(15 downto 8) := data( 7 downto 0);`
120			`when "10" => tmp(23 downto 16) := data( 7 downto 0);`
121			`when "11" => tmp(31 downto 24) := data( 7 downto 0);`
122			`when others => null;`
123			`end case;`
124			`when lmd_half =>`
125			`case addrlo(1 downto 1) is`
126			`when "0" => tmp(15 downto 0) := data(15 downto 0);`
127			`when "1" => tmp(31 downto 16) := data(15 downto 0);`
128			`when others => null;`
129			`end case;`
130			`when others => tmp := data;`
131			`end case;`
132			`else`
133			`-- lmd_big: byte[0 1 2 3], hw[0 1]`
134			`case size is`
135			`when lmd_byte =>`
136			`case addrlo(1 downto 0) is`
137			`when "00" => tmp(31 downto 24) := data( 7 downto 0);`
138			`when "01" => tmp(23 downto 16) := data( 7 downto 0);`
139			`when "10" => tmp(15 downto 8) := data( 7 downto 0);`
140			`when "11" => tmp( 7 downto 0) := data( 7 downto 0);`
141			`when others => null;`
142			`end case;`
143			`when lmd_half =>`
144			`case addrlo(1 downto 1) is`
145			`when "0" => tmp(31 downto 16) := data(15 downto 0);`
146			`when "1" => tmp(15 downto 0) := data(15 downto 0);`
147			`when others => null;`
148			`end case;`
149			`when others => tmp := data;`
150			`end case;`
151			`end if;`
152			`return tmp;`
153			`end;`
154
155			`function gdcl_readdata (`
156			`addrlo : std_logic_vector(1 downto 0);`
157			`data : std_logic_vector(31 downto 0);`
158			`bo : lmd_byteorder;`
159			`sign : std_logic;`
160			`size : lmd_memsize`
161			`) return std_logic_vector is`
162			`variable tmp : std_logic_vector(31 downto 0);`
163			`begin`
164			`tmp := (others => '0');`
165			`if bo = lmd_little then`
166			`-- lmd_little: byte[3 2 1 0], hw[1 0]`
167			`case size is`
168			`when lmd_byte =>`
169			`case addrlo(1 downto 0) is`
170			`when "00" => tmp( 7 downto 0) := data( 7 downto 0);`
171			`if sign='1' then`
172			`tmp(31 downto 8) := (others => data( 7));`
173			`end if;`
174			`when "01" => tmp( 7 downto 0) := data(15 downto 8);`
175			`if sign='1' then`
176			`tmp(31 downto 8) := (others => data(15));`
177			`end if;`
178			`when "10" => tmp( 7 downto 0) := data(23 downto 16);`
179			`if sign='1' then`
180			`tmp(31 downto 8) := (others => data(23));`
181			`end if;`
182			`when "11" => tmp( 7 downto 0) := data(31 downto 24);`
183			`if sign='1' then`
184			`tmp(31 downto 8) := (others => data(31));`
185			`end if;`
186			`when others => null;`
187			`end case;`
188			`when lmd_half =>`
189			`case addrlo(1 downto 1) is`
190			`when "0" => tmp(15 downto 0) := data(15 downto 0);`
191			`if sign='1' then`
192			`tmp(31 downto 16) := (others => data( 15));`
193			`end if;`
194			`when "1" => tmp(15 downto 0) := data(31 downto 16);`
195			`if sign='1' then`
196			`tmp(31 downto 16) := (others => data(31));`
197			`end if;`
198			`when others => null;`
199			`end case;`
200			`when others => tmp := data;`
201			`end case;`
202			`else`
203			`-- lmd_big: byte[0 1 2 3], hw[0 1]`
204			`case size is`
205			`when lmd_byte =>`
206			`case addrlo(1 downto 0) is`
207			`when "00" => tmp( 7 downto 0) := data(31 downto 24);`
208			`if sign='1' then`
209			`tmp(31 downto 8) := (others => data(31));`
210			`end if;`
211			`when "01" => tmp( 7 downto 0) := data(23 downto 16);`
212			`if sign='1' then`
213			`tmp(31 downto 8) := (others => data(23));`
214			`end if;`
215			`when "10" => tmp( 7 downto 0) := data(15 downto 8);`
216			`if sign='1' then`
217			`tmp(31 downto 8) := (others => data(16));`
218			`end if;`
219			`when "11" => tmp( 7 downto 0) := data( 7 downto 0);`
220			`if sign='1' then`
221			`tmp(31 downto 8) := (others => data(7));`
222			`end if;`
223			`when others => null;`
224			`end case;`
225			`when lmd_half =>`
226			`case addrlo(1 downto 1) is`
227			`when "0" => tmp(15 downto 0) := data(31 downto 16);`
228			`if sign='1' then`
229			`tmp(31 downto 16) := (others => data(31));`
230			`end if;`
231			`when "1" => tmp(15 downto 0) := data(15 downto 0);`
232			`if sign='1' then`
233			`tmp(31 downto 16) := (others => data( 15));`
234			`end if;`
235			`when others => null;`
236			`end case;`
237			`when others => tmp := data;`
238			`end case;`
239			`end if;`
240			`return tmp;`
241			`end;`
242
243			`function gdcl_getpos (`
244			`addr : std_logic_vector(GCML_DC_TLINE_BSZ-1 downto 0)`
245			`) return integer is`
246			`variable tmp : integer;`
247			`begin`
248			`tmp := 0;`
249			`if CFG_DC_DLINE_SZ > 1 then`
250			`tmp := lin_convint(addr(GCML_DC_DLINE_BSZ-1 downto 0));`
251			`end if;`
252			`return tmp;`
253			`end;`
254
255			`function gdcl_is_taghit (`
256			`addr : std_logic_vector(31 downto 0);`
257			`cline : gcml_dc_tline`
258			`) return boolean is`
259			`variable tmp : boolean;`
260			`variable tag : std_logic_vector(GDCL_TTAG_U downto GDCL_TTAG_D);`
261			`begin`
262			`tmp := false;`
263			`tag := addr(GDCL_TTAG_U downto GDCL_TTAG_D);`
264			`if (tag = cline.tag) then`
265			`tmp := true;`
266			`end if;`
267			`return tmp;`
268			`end;`
269
270			`function gdcl_is_linevalid (`
271			`addr : std_logic_vector(31 downto 0);`
272			`cline : gcml_dc_tline`
273			`) return boolean is`
274			`variable tmp : boolean;`
275			`variable line : std_logic_vector(GDCL_TLINE_U downto GDCL_TLINE_D);`
276			`begin`
277			`tmp := false;`
278			`line := addr(GDCL_TLINE_U downto GDCL_TLINE_D);`
279			`if (cline.valid(lin_convint(line)) = '1')`
280			`then`
281			`tmp := true;`
282			`end if;`
283			`return tmp;`
284			`end;`
285
286			`function gdcl_is_linedirty (`
287			`addr : std_logic_vector(31 downto 0);`
288			`cline : gcml_dc_tline`
289			`) return boolean is`
290			`variable tmp : boolean;`
291			`variable line : std_logic_vector(GDCL_TLINE_U downto GDCL_TLINE_D);`
292			`begin`
293			`tmp := false;`
294			`line := addr(GDCL_TLINE_U downto GDCL_TLINE_D);`
295			`if (cline.dirty(lin_convint(line)) = '1')`
296			`then`
297			`tmp := true;`
298			`end if;`
299			`return tmp;`
300			`end;`
301
302			`function gdcl_is_free (`
303			`cline : gcml_dc_tline`
304			`) return boolean is`
305			`variable tmp : boolean;`
306			`begin`
307			`tmp := true;`
308			`for i in CFG_DC_TLINE_SZ-1 downto 0 loop`
309			`if cline.valid(i) = '1' then`
310			`tmp := false;`
311			`end if;`
312			`end loop; -- i`
313			`return tmp;`
314			`end;`
315
316			`function gdcl_is_dirty (`
317			`cline : gcml_dc_tline`
318			`) return boolean is`
319			`variable tmp : boolean;`
320			`begin`
321			`tmp := false;`
322			`for i in CFG_DC_TLINE_SZ-1 downto 0 loop`
323			`if cline.dirty(i) = '1' then`
324			`tmp := true;`
325			`end if;`
326			`end loop; -- i`
327			`return tmp;`
328			`end;`
329
330			`end gendc_lib;`
331