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[/] [core_arm/] [trunk/] [vhdl/] [sparc/] [c_model/] [sparc.c] - Blame information for rev 4

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1 2 tarookumic 
 
2 
typedef struct _proc_state {} proc_state;
3 
typedef struct _insn_ldsb_struct {
4 
/*Load|Store signed byte*/
5 
  int (*func) (struct _insn_ldsb_struct *s, proc_state *state);
6 
  unsigned int rd: 6; /*Destination register*/
7 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
8 
  unsigned int rs1: 6; /*Source register 1*/
9 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
10 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
11 
} insn_ldsb_struct;
12 
typedef struct _insn_ldsh_struct {
13 
/*Load|Store signed halfword*/
14 
  int (*func) (struct _insn_ldsh_struct *s, proc_state *state);
15 
  unsigned int rd: 6; /*Destination register*/
16 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
17 
  unsigned int rs1: 6; /*Source register 1*/
18 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
19 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
20 
} insn_ldsh_struct;
21 
typedef struct _insn_ldst_ub_struct {
22 
/*Load|Store unsigned byte*/
23 
  int (*func) (struct _insn_ldst_ub_struct *s, proc_state *state);
24 
  unsigned int rd: 6; /*Destination register*/
25 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
26 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
27 
  unsigned int rs1: 6; /*Source register 1*/
28 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
29 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
30 
} insn_ldst_ub_struct;
31 
typedef struct _insn_ldst_uh_struct {
32 
/*Load|Store unsigned halfword*/
33 
  int (*func) (struct _insn_ldst_uh_struct *s, proc_state *state);
34 
  unsigned int rd: 6; /*Destination register*/
35 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
36 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
37 
  unsigned int rs1: 6; /*Source register 1*/
38 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
39 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
40 
} insn_ldst_uh_struct;
41 
typedef struct _insn_ldst_struct {
42 
/*Load|Store word*/
43 
  int (*func) (struct _insn_ldst_struct *s, proc_state *state);
44 
  unsigned int rd: 6; /*Destination register*/
45 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
46 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
47 
  unsigned int rs1: 6; /*Source register 1*/
48 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
49 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
50 
} insn_ldst_struct;
51 
typedef struct _insn_ldst_d_struct {
52 
/*Load|Store doubleword*/
53 
  int (*func) (struct _insn_ldst_d_struct *s, proc_state *state);
54 
  unsigned int rd: 6; /*Destination register*/
55 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
56 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
57 
  unsigned int rs1: 6; /*Source register 1*/
58 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
59 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
60 
} insn_ldst_d_struct;
61 
typedef struct _insn_ldst_f_struct {
62 
/*Load|Sore floating point register*/
63 
  int (*func) (struct _insn_ldst_f_struct *s, proc_state *state);
64 
  unsigned int rd: 6; /*Destination register*/
65 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
66 
  unsigned int rs1: 6; /*Source register 1*/
67 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
68 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
69 
} insn_ldst_f_struct;
70 
typedef struct _insn_ldst_df_struct {
71 
/*Load|Sore double floating point register*/
72 
  int (*func) (struct _insn_ldst_df_struct *s, proc_state *state);
73 
  unsigned int rd: 6; /*Destination register*/
74 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
75 
  unsigned int rs1: 6; /*Source register 1*/
76 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
77 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
78 
} insn_ldst_df_struct;
79 
typedef struct _insn_ldst_fsr_struct {
80 
/*Load|Sore floating point state register*/
81 
  int (*func) (struct _insn_ldst_fsr_struct *s, proc_state *state);
82 
  unsigned int rd: 6; /*Destination register*/
83 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
84 
  unsigned int rs1: 6; /*Source register 1*/
85 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
86 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
87 
} insn_ldst_fsr_struct;
88 
typedef struct _insn_stdfq_struct {
89 
/*Store floating point deferred trap queue*/
90 
  int (*func) (struct _insn_stdfq_struct *s, proc_state *state);
91 
  unsigned int rd: 6; /*Destination register*/
92 
  unsigned int rs1: 6; /*Source register 1*/
93 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
94 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
95 
} insn_stdfq_struct;
96 
typedef struct _insn_ldst_c_struct {
97 
/*Load|Sore coprocessor register*/
98 
  int (*func) (struct _insn_ldst_c_struct *s, proc_state *state);
99 
  unsigned int rd: 6; /*Destination register*/
100 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
101 
  unsigned int rs1: 6; /*Source register 1*/
102 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
103 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
104 
} insn_ldst_c_struct;
105 
typedef struct _insn_ldst_dc_struct {
106 
/*Load|Sore double coprocessor register*/
107 
  int (*func) (struct _insn_ldst_dc_struct *s, proc_state *state);
108 
  unsigned int rd: 6; /*Destination register*/
109 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
110 
  unsigned int rs1: 6; /*Source register 1*/
111 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
112 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
113 
} insn_ldst_dc_struct;
114 
typedef struct _insn_ldst_csr_struct {
115 
/*Load|Sore double coprocessor state register*/
116 
  int (*func) (struct _insn_ldst_csr_struct *s, proc_state *state);
117 
  unsigned int rd: 6; /*Destination register*/
118 
  unsigned int ls: 2; /*Load/Store '1'=Store*/
119 
  unsigned int rs1: 6; /*Source register 1*/
120 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
121 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
122 
} insn_ldst_csr_struct;
123 
typedef struct _insn_stdcq_struct {
124 
/*Store coprocessor deferred trap queue*/
125 
  int (*func) (struct _insn_stdcq_struct *s, proc_state *state);
126 
  unsigned int rd: 6; /*Destination register*/
127 
  unsigned int rs1: 6; /*Source register 1*/
128 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
129 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
130 
} insn_stdcq_struct;
131 
typedef struct _insn_ldstb_struct {
132 
/*Atomic Load-Store unsigned byte*/
133 
  int (*func) (struct _insn_ldstb_struct *s, proc_state *state);
134 
  unsigned int rd: 6; /*Destination register*/
135 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
136 
  unsigned int rs1: 6; /*Source register 1*/
137 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
138 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
139 
} insn_ldstb_struct;
140 
typedef struct _insn_swp_struct {
141 
/*Swap register into memory*/
142 
  int (*func) (struct _insn_swp_struct *s, proc_state *state);
143 
  unsigned int rd: 6; /*Destination register*/
144 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
145 
  unsigned int rs1: 6; /*Source register 1*/
146 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
147 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
148 
} insn_swp_struct;
149 
typedef struct _insn_sethi_struct {
150 
/*Set upper 22 bits*/
151 
  int (*func) (struct _insn_sethi_struct *s, proc_state *state);
152 
  unsigned int rd: 6; /*Destination register*/
153 
  unsigned int i22: 23; /*Immidiate 22*/
154 
} insn_sethi_struct;
155 
typedef struct _insn_nop_struct {
156 
/*No op*/
157 
  int (*func) (struct _insn_nop_struct *s, proc_state *state);
158 
  unsigned int x: 23; /**/
159 
} insn_nop_struct;
160 
typedef struct _insn_and_struct {
161 
/*logical and*/
162 
  int (*func) (struct _insn_and_struct *s, proc_state *state);
163 
  unsigned int rd: 6; /*Destination register*/
164 
  unsigned int cc: 2; /*Modify icc '1'=modify*/
165 
  unsigned int n: 2; /*Not '1'=not*/
166 
  unsigned int rs1: 6; /*Source register 1*/
167 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
168 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
169 
} insn_and_struct;
170 
typedef struct _insn_or_struct {
171 
/*logical or*/
172 
  int (*func) (struct _insn_or_struct *s, proc_state *state);
173 
  unsigned int rd: 6; /*Destination register*/
174 
  unsigned int cc: 2; /*Modify icc '1'=modify*/
175 
  unsigned int n: 2; /*Not '1'=not*/
176 
  unsigned int rs1: 6; /*Source register 1*/
177 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
178 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
179 
} insn_or_struct;
180 
typedef struct _insn_xor_struct {
181 
/*logical xor*/
182 
  int (*func) (struct _insn_xor_struct *s, proc_state *state);
183 
  unsigned int rd: 6; /*Destination register*/
184 
  unsigned int cc: 2; /*Modify icc '1'=modify*/
185 
  unsigned int n: 2; /*Not '1'=not*/
186 
  unsigned int rs1: 6; /*Source register 1*/
187 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
188 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
189 
} insn_xor_struct;
190 
typedef struct _insn_sll_struct {
191 
/*shieft left logical*/
192 
  int (*func) (struct _insn_sll_struct *s, proc_state *state);
193 
  unsigned int rd: 6; /*Destination register*/
194 
  unsigned int rs1: 6; /*Source register 1*/
195 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
196 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
197 
} insn_sll_struct;
198 
typedef struct _insn_srl_struct {
199 
/*shieft right logical*/
200 
  int (*func) (struct _insn_srl_struct *s, proc_state *state);
201 
  unsigned int rd: 6; /*Destination register*/
202 
  unsigned int rs1: 6; /*Source register 1*/
203 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
204 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
205 
} insn_srl_struct;
206 
typedef struct _insn_sra_struct {
207 
/*shieft right arith*/
208 
  int (*func) (struct _insn_sra_struct *s, proc_state *state);
209 
  unsigned int rd: 6; /*Destination register*/
210 
  unsigned int rs1: 6; /*Source register 1*/
211 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
212 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
213 
} insn_sra_struct;
214 
typedef struct _insn_sadd_struct {
215 
/*Sub|Add*/
216 
  int (*func) (struct _insn_sadd_struct *s, proc_state *state);
217 
  unsigned int rd: 6; /*Destination register*/
218 
  unsigned int cc: 2; /*Modify icc '1'=modify*/
219 
  unsigned int xx: 2; /*Use carry '1'=use*/
220 
  unsigned int sa: 2; /*Sub/Add '1'=Sub*/
221 
  unsigned int rs1: 6; /*Source register 1*/
222 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
223 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
224 
} insn_sadd_struct;
225 
typedef struct _insn_tsadd_struct {
226 
/*Tagged Sub|Add*/
227 
  int (*func) (struct _insn_tsadd_struct *s, proc_state *state);
228 
  unsigned int rd: 6; /*Destination register*/
229 
  unsigned int sa: 2; /*Sub/Add '1'=Sub*/
230 
  unsigned int rs1: 6; /*Source register 1*/
231 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
232 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
233 
} insn_tsadd_struct;
234 
typedef struct _insn_tsaddtv_struct {
235 
/*Tagged Sub|Add with trap on overflow*/
236 
  int (*func) (struct _insn_tsaddtv_struct *s, proc_state *state);
237 
  unsigned int rd: 6; /*Destination register*/
238 
  unsigned int sa: 2; /*Sub/Add '1'=Sub*/
239 
  unsigned int rs1: 6; /*Source register 1*/
240 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
241 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
242 
} insn_tsaddtv_struct;
243 
typedef struct _insn_mulscc_struct {
244 
/*Multiply*/
245 
  int (*func) (struct _insn_mulscc_struct *s, proc_state *state);
246 
  unsigned int rd: 6; /*Destination register*/
247 
  unsigned int cc: 2; /*Modify icc '1'=modify*/
248 
  unsigned int sig: 2; /*Signed '1'=Signed*/
249 
  unsigned int rs1: 6; /*Source register 1*/
250 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
251 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
252 
} insn_mulscc_struct;
253 
typedef struct _insn_divscc_struct {
254 
/*Divide*/
255 
  int (*func) (struct _insn_divscc_struct *s, proc_state *state);
256 
  unsigned int rd: 6; /*Destination register*/
257 
  unsigned int cc: 2; /*Modify icc '1'=modify*/
258 
  unsigned int sig: 2; /*Signed '1'=Signed*/
259 
  unsigned int rs1: 6; /*Source register 1*/
260 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
261 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
262 
} insn_divscc_struct;
263 
typedef struct _insn_sv_struct {
264 
/*Save*/
265 
  int (*func) (struct _insn_sv_struct *s, proc_state *state);
266 
  unsigned int rd: 6; /*Destination register*/
267 
  unsigned int rs1: 6; /*Source register 1*/
268 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
269 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
270 
} insn_sv_struct;
271 
typedef struct _insn_rest_struct {
272 
/*Restore*/
273 
  int (*func) (struct _insn_rest_struct *s, proc_state *state);
274 
  unsigned int rd: 6; /*Destination register*/
275 
  unsigned int rs1: 6; /*Source register 1*/
276 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
277 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
278 
} insn_rest_struct;
279 
typedef struct _insn_bra_struct {
280 
/*Branch on condition*/
281 
  int (*func) (struct _insn_bra_struct *s, proc_state *state);
282 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
283 
  unsigned int c: 5; /*Condition code*/
284 
  unsigned int d22: 23; /**/
285 
} insn_bra_struct;
286 
typedef struct _insn_fbra_struct {
287 
/*Branch on floating point condition*/
288 
  int (*func) (struct _insn_fbra_struct *s, proc_state *state);
289 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
290 
  unsigned int c: 5; /*Condition code*/
291 
  unsigned int d22: 23; /**/
292 
} insn_fbra_struct;
293 
typedef struct _insn_cbra_struct {
294 
/*Branch on coprocessor condition*/
295 
  int (*func) (struct _insn_cbra_struct *s, proc_state *state);
296 
  unsigned int a: 2; /*Alternate space '1'=alternate space*/
297 
  unsigned int c: 5; /*Condition code*/
298 
  unsigned int d22: 23; /**/
299 
} insn_cbra_struct;
300 
typedef struct _insn_jmp_struct {
301 
/*Call and link offset*/
302 
  int (*func) (struct _insn_jmp_struct *s, proc_state *state);
303 
  unsigned int d30: 31; /*Offset 30bit*/
304 
} insn_jmp_struct;
305 
typedef struct _insn_jml_struct {
306 
/*Jump and link*/
307 
  int (*func) (struct _insn_jml_struct *s, proc_state *state);
308 
  unsigned int rd: 6; /*Destination register*/
309 
  unsigned int rs1: 6; /*Source register 1*/
310 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
311 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
312 
} insn_jml_struct;
313 
typedef struct _insn_ret_struct {
314 
/*Return from trap*/
315 
  int (*func) (struct _insn_ret_struct *s, proc_state *state);
316 
  unsigned int rd: 6; /*Destination register*/
317 
  unsigned int rs1: 6; /*Source register 1*/
318 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
319 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
320 
} insn_ret_struct;
321 
typedef struct _insn_trap_struct {
322 
/*Trap on condition code*/
323 
  int (*func) (struct _insn_trap_struct *s, proc_state *state);
324 
  unsigned int rvd: 2; /**/
325 
  unsigned int c: 5; /*Condition code*/
326 
  unsigned int rs1: 6; /*Source register 1*/
327 
  unsigned int i: 2; /*Select s2i '1'=sim13*/
328 
  unsigned int s2i: 14; /*op2: simm13 or rs2*/
329 
} insn_trap_struct;
330 
typedef struct _insn_rd_struct {
331 
/*Read state registers*/
332 
  int (*func) (struct _insn_rd_struct *s, proc_state *state);
333 
  unsigned int rd: 6; /*Destination register*/
334 
  unsigned int rs1: 6; /*Source register 1*/
335 
  unsigned int x: 15; /**/
336 
} insn_rd_struct;
337 
typedef struct _insn_rdp_struct {
338 
/*Read processor state register (rdpsr)*/
339 
  int (*func) (struct _insn_rdp_struct *s, proc_state *state);
340 
  unsigned int rd: 6; /*Destination register*/
341 
  unsigned int rs1: 6; /*Source register 1*/
342 
  unsigned int x: 15; /**/
343 
} insn_rdp_struct;
344 
typedef struct _insn_rdw_struct {
345 
/*Read windows invalid mask*/
346 
  int (*func) (struct _insn_rdw_struct *s, proc_state *state);
347 
  unsigned int rd: 6; /*Destination register*/
348 
  unsigned int rs1: 6; /*Source register 1*/
349 
  unsigned int x: 15; /**/
350 
} insn_rdw_struct;
351 
typedef struct _insn_rdt_struct {
352 
/*Read trap base register*/
353 
  int (*func) (struct _insn_rdt_struct *s, proc_state *state);
354 
  unsigned int rd: 6; /*Destination register*/
355 
  unsigned int rs1: 6; /*Source register 1*/
356 
  unsigned int x: 15; /**/
357 
} insn_rdt_struct;
358 
typedef struct _insn_wd_struct {
359 
/*Write state registers*/
360 
  int (*func) (struct _insn_wd_struct *s, proc_state *state);
361 
  unsigned int rd: 6; /*Destination register*/
362 
  unsigned int rs1: 6; /*Source register 1*/
363 
  unsigned int x: 15; /**/
364 
} insn_wd_struct;
365 
typedef struct _insn_wdp_struct {
366 
/*Write processor state register (rdpsr)*/
367 
  int (*func) (struct _insn_wdp_struct *s, proc_state *state);
368 
  unsigned int rd: 6; /*Destination register*/
369 
  unsigned int rs1: 6; /*Source register 1*/
370 
  unsigned int x: 15; /**/
371 
} insn_wdp_struct;
372 
typedef struct _insn_wdw_struct {
373 
/*Write windows invalid mask*/
374 
  int (*func) (struct _insn_wdw_struct *s, proc_state *state);
375 
  unsigned int rd: 6; /*Destination register*/
376 
  unsigned int rs1: 6; /*Source register 1*/
377 
  unsigned int x: 15; /**/
378 
} insn_wdw_struct;
379 
typedef struct _insn_wdt_struct {
380 
/*Write trap base register*/
381 
  int (*func) (struct _insn_wdt_struct *s, proc_state *state);
382 
  unsigned int rd: 6; /*Destination register*/
383 
  unsigned int rs1: 6; /*Source register 1*/
384 
  unsigned int x: 15; /**/
385 
} insn_wdt_struct;
386 
typedef struct _insn_stbar_struct {
387 
/*Store barrier*/
388 
  int (*func) (struct _insn_stbar_struct *s, proc_state *state);
389 
  unsigned int x: 14; /**/
390 
} insn_stbar_struct;
391 
typedef struct _insn_unimp_struct {
392 
/*Unimplemented*/
393 
  int (*func) (struct _insn_unimp_struct *s, proc_state *state);
394 
  unsigned int rvd: 6; /**/
395 
  unsigned int cst: 23; /**/
396 
} insn_unimp_struct;
397 
typedef union _insn_union {
398 
  insn_ldsb_struct insn_ldsb;
399 
  insn_ldsh_struct insn_ldsh;
400 
  insn_ldst_ub_struct insn_ldst_ub;
401 
  insn_ldst_uh_struct insn_ldst_uh;
402 
  insn_ldst_struct insn_ldst;
403 
  insn_ldst_d_struct insn_ldst_d;
404 
  insn_ldst_f_struct insn_ldst_f;
405 
  insn_ldst_df_struct insn_ldst_df;
406 
  insn_ldst_fsr_struct insn_ldst_fsr;
407 
  insn_stdfq_struct insn_stdfq;
408 
  insn_ldst_c_struct insn_ldst_c;
409 
  insn_ldst_dc_struct insn_ldst_dc;
410 
  insn_ldst_csr_struct insn_ldst_csr;
411 
  insn_stdcq_struct insn_stdcq;
412 
  insn_ldstb_struct insn_ldstb;
413 
  insn_swp_struct insn_swp;
414 
  insn_sethi_struct insn_sethi;
415 
  insn_nop_struct insn_nop;
416 
  insn_and_struct insn_and;
417 
  insn_or_struct insn_or;
418 
  insn_xor_struct insn_xor;
419 
  insn_sll_struct insn_sll;
420 
  insn_srl_struct insn_srl;
421 
  insn_sra_struct insn_sra;
422 
  insn_sadd_struct insn_sadd;
423 
  insn_tsadd_struct insn_tsadd;
424 
  insn_tsaddtv_struct insn_tsaddtv;
425 
  insn_mulscc_struct insn_mulscc;
426 
  insn_divscc_struct insn_divscc;
427 
  insn_sv_struct insn_sv;
428 
  insn_rest_struct insn_rest;
429 
  insn_bra_struct insn_bra;
430 
  insn_fbra_struct insn_fbra;
431 
  insn_cbra_struct insn_cbra;
432 
  insn_jmp_struct insn_jmp;
433 
  insn_jml_struct insn_jml;
434 
  insn_ret_struct insn_ret;
435 
  insn_trap_struct insn_trap;
436 
  insn_rd_struct insn_rd;
437 
  insn_rdp_struct insn_rdp;
438 
  insn_rdw_struct insn_rdw;
439 
  insn_rdt_struct insn_rdt;
440 
  insn_wd_struct insn_wd;
441 
  insn_wdp_struct insn_wdp;
442 
  insn_wdw_struct insn_wdw;
443 
  insn_wdt_struct insn_wdt;
444 
  insn_stbar_struct insn_stbar;
445 
  insn_unimp_struct insn_unimp;
446 
} insn_union;
447 
 int func_insn_ldsb (struct _insn_ldsb_struct *s, proc_state *state) {
448 
/*Load|Store signed byte*/
449 
};
450 
int func_insn_ldsh (struct _insn_ldsh_struct *s, proc_state *state) {
451 
/*Load|Store signed halfword*/
452 
};
453 
int func_insn_ldst_ub (struct _insn_ldst_ub_struct *s, proc_state *state) {
454 
/*Load|Store unsigned byte*/
455 
};
456 
int func_insn_ldst_uh (struct _insn_ldst_uh_struct *s, proc_state *state) {
457 
/*Load|Store unsigned halfword*/
458 
};
459 
int func_insn_ldst (struct _insn_ldst_struct *s, proc_state *state) {
460 
/*Load|Store word*/
461 
};
462 
int func_insn_ldst_d (struct _insn_ldst_d_struct *s, proc_state *state) {
463 
/*Load|Store doubleword*/
464 
};
465 
int func_insn_ldst_f (struct _insn_ldst_f_struct *s, proc_state *state) {
466 
/*Load|Sore floating point register*/
467 
};
468 
int func_insn_ldst_df (struct _insn_ldst_df_struct *s, proc_state *state) {
469 
/*Load|Sore double floating point register*/
470 
};
471 
int func_insn_ldst_fsr (struct _insn_ldst_fsr_struct *s, proc_state *state) {
472 
/*Load|Sore floating point state register*/
473 
};
474 
int func_insn_stdfq (struct _insn_stdfq_struct *s, proc_state *state) {
475 
/*Store floating point deferred trap queue*/
476 
};
477 
int func_insn_ldst_c (struct _insn_ldst_c_struct *s, proc_state *state) {
478 
/*Load|Sore coprocessor register*/
479 
};
480 
int func_insn_ldst_dc (struct _insn_ldst_dc_struct *s, proc_state *state) {
481 
/*Load|Sore double coprocessor register*/
482 
};
483 
int func_insn_ldst_csr (struct _insn_ldst_csr_struct *s, proc_state *state) {
484 
/*Load|Sore double coprocessor state register*/
485 
};
486 
int func_insn_stdcq (struct _insn_stdcq_struct *s, proc_state *state) {
487 
/*Store coprocessor deferred trap queue*/
488 
};
489 
int func_insn_ldstb (struct _insn_ldstb_struct *s, proc_state *state) {
490 
/*Atomic Load-Store unsigned byte*/
491 
};
492 
int func_insn_swp (struct _insn_swp_struct *s, proc_state *state) {
493 
/*Swap register into memory*/
494 
};
495 
int func_insn_sethi (struct _insn_sethi_struct *s, proc_state *state) {
496 
/*Set upper 22 bits*/
497 
};
498 
int func_insn_nop (struct _insn_nop_struct *s, proc_state *state) {
499 
/*No op*/
500 
};
501 
int func_insn_and (struct _insn_and_struct *s, proc_state *state) {
502 
/*logical and*/
503 
};
504 
int func_insn_or (struct _insn_or_struct *s, proc_state *state) {
505 
/*logical or*/
506 
};
507 
int func_insn_xor (struct _insn_xor_struct *s, proc_state *state) {
508 
/*logical xor*/
509 
};
510 
int func_insn_sll (struct _insn_sll_struct *s, proc_state *state) {
511 
/*shieft left logical*/
512 
};
513 
int func_insn_srl (struct _insn_srl_struct *s, proc_state *state) {
514 
/*shieft right logical*/
515 
};
516 
int func_insn_sra (struct _insn_sra_struct *s, proc_state *state) {
517 
/*shieft right arith*/
518 
};
519 
int func_insn_sadd (struct _insn_sadd_struct *s, proc_state *state) {
520 
/*Sub|Add*/
521 
};
522 
int func_insn_tsadd (struct _insn_tsadd_struct *s, proc_state *state) {
523 
/*Tagged Sub|Add*/
524 
};
525 
int func_insn_tsaddtv (struct _insn_tsaddtv_struct *s, proc_state *state) {
526 
/*Tagged Sub|Add with trap on overflow*/
527 
};
528 
int func_insn_mulscc (struct _insn_mulscc_struct *s, proc_state *state) {
529 
/*Multiply*/
530 
};
531 
int func_insn_divscc (struct _insn_divscc_struct *s, proc_state *state) {
532 
/*Divide*/
533 
};
534 
int func_insn_sv (struct _insn_sv_struct *s, proc_state *state) {
535 
/*Save*/
536 
};
537 
int func_insn_rest (struct _insn_rest_struct *s, proc_state *state) {
538 
/*Restore*/
539 
};
540 
int func_insn_bra (struct _insn_bra_struct *s, proc_state *state) {
541 
/*Branch on condition*/
542 
};
543 
int func_insn_fbra (struct _insn_fbra_struct *s, proc_state *state) {
544 
/*Branch on floating point condition*/
545 
};
546 
int func_insn_cbra (struct _insn_cbra_struct *s, proc_state *state) {
547 
/*Branch on coprocessor condition*/
548 
};
549 
int func_insn_jmp (struct _insn_jmp_struct *s, proc_state *state) {
550 
/*Call and link offset*/
551 
};
552 
int func_insn_jml (struct _insn_jml_struct *s, proc_state *state) {
553 
/*Jump and link*/
554 
};
555 
int func_insn_ret (struct _insn_ret_struct *s, proc_state *state) {
556 
/*Return from trap*/
557 
};
558 
int func_insn_trap (struct _insn_trap_struct *s, proc_state *state) {
559 
/*Trap on condition code*/
560 
};
561 
int func_insn_rd (struct _insn_rd_struct *s, proc_state *state) {
562 
/*Read state registers*/
563 
};
564 
int func_insn_rdp (struct _insn_rdp_struct *s, proc_state *state) {
565 
/*Read processor state register (rdpsr)*/
566 
};
567 
int func_insn_rdw (struct _insn_rdw_struct *s, proc_state *state) {
568 
/*Read windows invalid mask*/
569 
};
570 
int func_insn_rdt (struct _insn_rdt_struct *s, proc_state *state) {
571 
/*Read trap base register*/
572 
};
573 
int func_insn_wd (struct _insn_wd_struct *s, proc_state *state) {
574 
/*Write state registers*/
575 
};
576 
int func_insn_wdp (struct _insn_wdp_struct *s, proc_state *state) {
577 
/*Write processor state register (rdpsr)*/
578 
};
579 
int func_insn_wdw (struct _insn_wdw_struct *s, proc_state *state) {
580 
/*Write windows invalid mask*/
581 
};
582 
int func_insn_wdt (struct _insn_wdt_struct *s, proc_state *state) {
583 
/*Write trap base register*/
584 
};
585 
int func_insn_stbar (struct _insn_stbar_struct *s, proc_state *state) {
586 
/*Store barrier*/
587 
};
588 
int func_insn_unimp (struct _insn_unimp_struct *s, proc_state *state) {
589 
/*Unimplemented*/
590 
};
591 
unsigned int init_insn_ldsb(unsigned int insn, insn_union *s) {
592 
s->insn_ldsb.func=func_insn_ldsb;
593 
s->insn_ldsb.rd=((insn>>25)&0x1f);
594 
s->insn_ldsb.a=((insn>>23)&0x1);
595 
s->insn_ldsb.rs1=((insn>>14)&0x1f);
596 
s->insn_ldsb.i=((insn>>13)&0x1);
597 
s->insn_ldsb.s2i=((insn>>0)&0x1fff);
598 
 return 1;};
599 
 unsigned int init_insn_ldsh(unsigned int insn, insn_union *s) {
600 
s->insn_ldsh.func=func_insn_ldsh;
601 
s->insn_ldsh.rd=((insn>>25)&0x1f);
602 
s->insn_ldsh.a=((insn>>23)&0x1);
603 
s->insn_ldsh.rs1=((insn>>14)&0x1f);
604 
s->insn_ldsh.i=((insn>>13)&0x1);
605 
s->insn_ldsh.s2i=((insn>>0)&0x1fff);
606 
 return 1;};
607 
 unsigned int init_insn_ldst_ub(unsigned int insn, insn_union *s) {
608 
s->insn_ldst_ub.func=func_insn_ldst_ub;
609 
s->insn_ldst_ub.rd=((insn>>25)&0x1f);
610 
s->insn_ldst_ub.a=((insn>>23)&0x1);
611 
s->insn_ldst_ub.ls=((insn>>21)&0x1);
612 
s->insn_ldst_ub.rs1=((insn>>14)&0x1f);
613 
s->insn_ldst_ub.i=((insn>>13)&0x1);
614 
s->insn_ldst_ub.s2i=((insn>>0)&0x1fff);
615 
 return 1;};
616 
 unsigned int init_insn_ldst_uh(unsigned int insn, insn_union *s) {
617 
s->insn_ldst_uh.func=func_insn_ldst_uh;
618 
s->insn_ldst_uh.rd=((insn>>25)&0x1f);
619 
s->insn_ldst_uh.a=((insn>>23)&0x1);
620 
s->insn_ldst_uh.ls=((insn>>21)&0x1);
621 
s->insn_ldst_uh.rs1=((insn>>14)&0x1f);
622 
s->insn_ldst_uh.i=((insn>>13)&0x1);
623 
s->insn_ldst_uh.s2i=((insn>>0)&0x1fff);
624 
 return 1;};
625 
 unsigned int init_insn_ldst(unsigned int insn, insn_union *s) {
626 
s->insn_ldst.func=func_insn_ldst;
627 
s->insn_ldst.rd=((insn>>25)&0x1f);
628 
s->insn_ldst.a=((insn>>23)&0x1);
629 
s->insn_ldst.ls=((insn>>21)&0x1);
630 
s->insn_ldst.rs1=((insn>>14)&0x1f);
631 
s->insn_ldst.i=((insn>>13)&0x1);
632 
s->insn_ldst.s2i=((insn>>0)&0x1fff);
633 
 return 1;};
634 
 unsigned int init_insn_ldst_d(unsigned int insn, insn_union *s) {
635 
s->insn_ldst_d.func=func_insn_ldst_d;
636 
s->insn_ldst_d.rd=((insn>>25)&0x1f);
637 
s->insn_ldst_d.a=((insn>>23)&0x1);
638 
s->insn_ldst_d.ls=((insn>>21)&0x1);
639 
s->insn_ldst_d.rs1=((insn>>14)&0x1f);
640 
s->insn_ldst_d.i=((insn>>13)&0x1);
641 
s->insn_ldst_d.s2i=((insn>>0)&0x1fff);
642 
 return 1;};
643 
 unsigned int init_insn_ldst_f(unsigned int insn, insn_union *s) {
644 
s->insn_ldst_f.func=func_insn_ldst_f;
645 
s->insn_ldst_f.rd=((insn>>25)&0x1f);
646 
s->insn_ldst_f.ls=((insn>>21)&0x1);
647 
s->insn_ldst_f.rs1=((insn>>14)&0x1f);
648 
s->insn_ldst_f.i=((insn>>13)&0x1);
649 
s->insn_ldst_f.s2i=((insn>>0)&0x1fff);
650 
 return 1;};
651 
 unsigned int init_insn_ldst_df(unsigned int insn, insn_union *s) {
652 
s->insn_ldst_df.func=func_insn_ldst_df;
653 
s->insn_ldst_df.rd=((insn>>25)&0x1f);
654 
s->insn_ldst_df.ls=((insn>>21)&0x1);
655 
s->insn_ldst_df.rs1=((insn>>14)&0x1f);
656 
s->insn_ldst_df.i=((insn>>13)&0x1);
657 
s->insn_ldst_df.s2i=((insn>>0)&0x1fff);
658 
 return 1;};
659 
 unsigned int init_insn_ldst_fsr(unsigned int insn, insn_union *s) {
660 
s->insn_ldst_fsr.func=func_insn_ldst_fsr;
661 
s->insn_ldst_fsr.rd=((insn>>25)&0x1f);
662 
s->insn_ldst_fsr.ls=((insn>>21)&0x1);
663 
s->insn_ldst_fsr.rs1=((insn>>14)&0x1f);
664 
s->insn_ldst_fsr.i=((insn>>13)&0x1);
665 
s->insn_ldst_fsr.s2i=((insn>>0)&0x1fff);
666 
 return 1;};
667 
 unsigned int init_insn_stdfq(unsigned int insn, insn_union *s) {
668 
s->insn_stdfq.func=func_insn_stdfq;
669 
s->insn_stdfq.rd=((insn>>25)&0x1f);
670 
s->insn_stdfq.rs1=((insn>>14)&0x1f);
671 
s->insn_stdfq.i=((insn>>13)&0x1);
672 
s->insn_stdfq.s2i=((insn>>0)&0x1fff);
673 
 return 1;};
674 
 unsigned int init_insn_ldst_c(unsigned int insn, insn_union *s) {
675 
s->insn_ldst_c.func=func_insn_ldst_c;
676 
s->insn_ldst_c.rd=((insn>>25)&0x1f);
677 
s->insn_ldst_c.ls=((insn>>21)&0x1);
678 
s->insn_ldst_c.rs1=((insn>>14)&0x1f);
679 
s->insn_ldst_c.i=((insn>>13)&0x1);
680 
s->insn_ldst_c.s2i=((insn>>0)&0x1fff);
681 
 return 1;};
682 
 unsigned int init_insn_ldst_dc(unsigned int insn, insn_union *s) {
683 
s->insn_ldst_dc.func=func_insn_ldst_dc;
684 
s->insn_ldst_dc.rd=((insn>>25)&0x1f);
685 
s->insn_ldst_dc.ls=((insn>>21)&0x1);
686 
s->insn_ldst_dc.rs1=((insn>>14)&0x1f);
687 
s->insn_ldst_dc.i=((insn>>13)&0x1);
688 
s->insn_ldst_dc.s2i=((insn>>0)&0x1fff);
689 
 return 1;};
690 
 unsigned int init_insn_ldst_csr(unsigned int insn, insn_union *s) {
691 
s->insn_ldst_csr.func=func_insn_ldst_csr;
692 
s->insn_ldst_csr.rd=((insn>>25)&0x1f);
693 
s->insn_ldst_csr.ls=((insn>>21)&0x1);
694 
s->insn_ldst_csr.rs1=((insn>>14)&0x1f);
695 
s->insn_ldst_csr.i=((insn>>13)&0x1);
696 
s->insn_ldst_csr.s2i=((insn>>0)&0x1fff);
697 
 return 1;};
698 
 unsigned int init_insn_stdcq(unsigned int insn, insn_union *s) {
699 
s->insn_stdcq.func=func_insn_stdcq;
700 
s->insn_stdcq.rd=((insn>>25)&0x1f);
701 
s->insn_stdcq.rs1=((insn>>14)&0x1f);
702 
s->insn_stdcq.i=((insn>>13)&0x1);
703 
s->insn_stdcq.s2i=((insn>>0)&0x1fff);
704 
 return 1;};
705 
 unsigned int init_insn_ldstb(unsigned int insn, insn_union *s) {
706 
s->insn_ldstb.func=func_insn_ldstb;
707 
s->insn_ldstb.rd=((insn>>25)&0x1f);
708 
s->insn_ldstb.a=((insn>>23)&0x1);
709 
s->insn_ldstb.rs1=((insn>>14)&0x1f);
710 
s->insn_ldstb.i=((insn>>13)&0x1);
711 
s->insn_ldstb.s2i=((insn>>0)&0x1fff);
712 
 return 1;};
713 
 unsigned int init_insn_swp(unsigned int insn, insn_union *s) {
714 
s->insn_swp.func=func_insn_swp;
715 
s->insn_swp.rd=((insn>>25)&0x1f);
716 
s->insn_swp.a=((insn>>23)&0x1);
717 
s->insn_swp.rs1=((insn>>14)&0x1f);
718 
s->insn_swp.i=((insn>>13)&0x1);
719 
s->insn_swp.s2i=((insn>>0)&0x1fff);
720 
 return 1;};
721 
 unsigned int init_insn_sethi(unsigned int insn, insn_union *s) {
722 
s->insn_sethi.func=func_insn_sethi;
723 
s->insn_sethi.rd=((insn>>25)&0x1f);
724 
s->insn_sethi.i22=((insn>>0)&0x3fffff);
725 
 return 1;};
726 
 unsigned int init_insn_nop(unsigned int insn, insn_union *s) {
727 
s->insn_nop.func=func_insn_nop;
728 
s->insn_nop.x=((insn>>0)&0x3fffff);
729 
 return 1;};
730 
 unsigned int init_insn_and(unsigned int insn, insn_union *s) {
731 
s->insn_and.func=func_insn_and;
732 
s->insn_and.rd=((insn>>25)&0x1f);
733 
s->insn_and.cc=((insn>>23)&0x1);
734 
s->insn_and.n=((insn>>21)&0x1);
735 
s->insn_and.rs1=((insn>>14)&0x1f);
736 
s->insn_and.i=((insn>>13)&0x1);
737 
s->insn_and.s2i=((insn>>0)&0x1fff);
738 
 return 1;};
739 
 unsigned int init_insn_or(unsigned int insn, insn_union *s) {
740 
s->insn_or.func=func_insn_or;
741 
s->insn_or.rd=((insn>>25)&0x1f);
742 
s->insn_or.cc=((insn>>23)&0x1);
743 
s->insn_or.n=((insn>>21)&0x1);
744 
s->insn_or.rs1=((insn>>14)&0x1f);
745 
s->insn_or.i=((insn>>13)&0x1);
746 
s->insn_or.s2i=((insn>>0)&0x1fff);
747 
 return 1;};
748 
 unsigned int init_insn_xor(unsigned int insn, insn_union *s) {
749 
s->insn_xor.func=func_insn_xor;
750 
s->insn_xor.rd=((insn>>25)&0x1f);
751 
s->insn_xor.cc=((insn>>23)&0x1);
752 
s->insn_xor.n=((insn>>21)&0x1);
753 
s->insn_xor.rs1=((insn>>14)&0x1f);
754 
s->insn_xor.i=((insn>>13)&0x1);
755 
s->insn_xor.s2i=((insn>>0)&0x1fff);
756 
 return 1;};
757 
 unsigned int init_insn_sll(unsigned int insn, insn_union *s) {
758 
s->insn_sll.func=func_insn_sll;
759 
s->insn_sll.rd=((insn>>25)&0x1f);
760 
s->insn_sll.rs1=((insn>>14)&0x1f);
761 
s->insn_sll.i=((insn>>13)&0x1);
762 
s->insn_sll.s2i=((insn>>0)&0x1fff);
763 
 return 1;};
764 
 unsigned int init_insn_srl(unsigned int insn, insn_union *s) {
765 
s->insn_srl.func=func_insn_srl;
766 
s->insn_srl.rd=((insn>>25)&0x1f);
767 
s->insn_srl.rs1=((insn>>14)&0x1f);
768 
s->insn_srl.i=((insn>>13)&0x1);
769 
s->insn_srl.s2i=((insn>>0)&0x1fff);
770 
 return 1;};
771 
 unsigned int init_insn_sra(unsigned int insn, insn_union *s) {
772 
s->insn_sra.func=func_insn_sra;
773 
s->insn_sra.rd=((insn>>25)&0x1f);
774 
s->insn_sra.rs1=((insn>>14)&0x1f);
775 
s->insn_sra.i=((insn>>13)&0x1);
776 
s->insn_sra.s2i=((insn>>0)&0x1fff);
777 
 return 1;};
778 
 unsigned int init_insn_sadd(unsigned int insn, insn_union *s) {
779 
s->insn_sadd.func=func_insn_sadd;
780 
s->insn_sadd.rd=((insn>>25)&0x1f);
781 
s->insn_sadd.cc=((insn>>23)&0x1);
782 
s->insn_sadd.xx=((insn>>22)&0x1);
783 
s->insn_sadd.sa=((insn>>21)&0x1);
784 
s->insn_sadd.rs1=((insn>>14)&0x1f);
785 
s->insn_sadd.i=((insn>>13)&0x1);
786 
s->insn_sadd.s2i=((insn>>0)&0x1fff);
787 
 return 1;};
788 
 unsigned int init_insn_tsadd(unsigned int insn, insn_union *s) {
789 
s->insn_tsadd.func=func_insn_tsadd;
790 
s->insn_tsadd.rd=((insn>>25)&0x1f);
791 
s->insn_tsadd.sa=((insn>>19)&0x1);
792 
s->insn_tsadd.rs1=((insn>>14)&0x1f);
793 
s->insn_tsadd.i=((insn>>13)&0x1);
794 
s->insn_tsadd.s2i=((insn>>0)&0x1fff);
795 
 return 1;};
796 
 unsigned int init_insn_tsaddtv(unsigned int insn, insn_union *s) {
797 
s->insn_tsaddtv.func=func_insn_tsaddtv;
798 
s->insn_tsaddtv.rd=((insn>>25)&0x1f);
799 
s->insn_tsaddtv.sa=((insn>>19)&0x1);
800 
s->insn_tsaddtv.rs1=((insn>>14)&0x1f);
801 
s->insn_tsaddtv.i=((insn>>13)&0x1);
802 
s->insn_tsaddtv.s2i=((insn>>0)&0x1fff);
803 
 return 1;};
804 
 unsigned int init_insn_mulscc(unsigned int insn, insn_union *s) {
805 
s->insn_mulscc.func=func_insn_mulscc;
806 
s->insn_mulscc.rd=((insn>>25)&0x1f);
807 
s->insn_mulscc.cc=((insn>>23)&0x1);
808 
s->insn_mulscc.sig=((insn>>19)&0x1);
809 
s->insn_mulscc.rs1=((insn>>14)&0x1f);
810 
s->insn_mulscc.i=((insn>>13)&0x1);
811 
s->insn_mulscc.s2i=((insn>>0)&0x1fff);
812 
 return 1;};
813 
 unsigned int init_insn_divscc(unsigned int insn, insn_union *s) {
814 
s->insn_divscc.func=func_insn_divscc;
815 
s->insn_divscc.rd=((insn>>25)&0x1f);
816 
s->insn_divscc.cc=((insn>>23)&0x1);
817 
s->insn_divscc.sig=((insn>>19)&0x1);
818 
s->insn_divscc.rs1=((insn>>14)&0x1f);
819 
s->insn_divscc.i=((insn>>13)&0x1);
820 
s->insn_divscc.s2i=((insn>>0)&0x1fff);
821 
 return 1;};
822 
 unsigned int init_insn_sv(unsigned int insn, insn_union *s) {
823 
s->insn_sv.func=func_insn_sv;
824 
s->insn_sv.rd=((insn>>25)&0x1f);
825 
s->insn_sv.rs1=((insn>>14)&0x1f);
826 
s->insn_sv.i=((insn>>13)&0x1);
827 
s->insn_sv.s2i=((insn>>0)&0x1fff);
828 
 return 1;};
829 
 unsigned int init_insn_rest(unsigned int insn, insn_union *s) {
830 
s->insn_rest.func=func_insn_rest;
831 
s->insn_rest.rd=((insn>>25)&0x1f);
832 
s->insn_rest.rs1=((insn>>14)&0x1f);
833 
s->insn_rest.i=((insn>>13)&0x1);
834 
s->insn_rest.s2i=((insn>>0)&0x1fff);
835 
 return 1;};
836 
 unsigned int init_insn_bra(unsigned int insn, insn_union *s) {
837 
s->insn_bra.func=func_insn_bra;
838 
s->insn_bra.a=((insn>>29)&0x1);
839 
s->insn_bra.c=((insn>>25)&0xf);
840 
s->insn_bra.d22=((insn>>0)&0x3fffff);
841 
 return 1;};
842 
 unsigned int init_insn_fbra(unsigned int insn, insn_union *s) {
843 
s->insn_fbra.func=func_insn_fbra;
844 
s->insn_fbra.a=((insn>>29)&0x1);
845 
s->insn_fbra.c=((insn>>25)&0xf);
846 
s->insn_fbra.d22=((insn>>0)&0x3fffff);
847 
 return 1;};
848 
 unsigned int init_insn_cbra(unsigned int insn, insn_union *s) {
849 
s->insn_cbra.func=func_insn_cbra;
850 
s->insn_cbra.a=((insn>>29)&0x1);
851 
s->insn_cbra.c=((insn>>25)&0xf);
852 
s->insn_cbra.d22=((insn>>0)&0x3fffff);
853 
 return 1;};
854 
 unsigned int init_insn_jmp(unsigned int insn, insn_union *s) {
855 
s->insn_jmp.func=func_insn_jmp;
856 
s->insn_jmp.d30=((insn>>0)&0xffffffff);
857 
 return 1;};
858 
 unsigned int init_insn_jml(unsigned int insn, insn_union *s) {
859 
s->insn_jml.func=func_insn_jml;
860 
s->insn_jml.rd=((insn>>25)&0x1f);
861 
s->insn_jml.rs1=((insn>>14)&0x1f);
862 
s->insn_jml.i=((insn>>13)&0x1);
863 
s->insn_jml.s2i=((insn>>0)&0x1fff);
864 
 return 1;};
865 
 unsigned int init_insn_ret(unsigned int insn, insn_union *s) {
866 
s->insn_ret.func=func_insn_ret;
867 
s->insn_ret.rd=((insn>>25)&0x1f);
868 
s->insn_ret.rs1=((insn>>14)&0x1f);
869 
s->insn_ret.i=((insn>>13)&0x1);
870 
s->insn_ret.s2i=((insn>>0)&0x1fff);
871 
 return 1;};
872 
 unsigned int init_insn_trap(unsigned int insn, insn_union *s) {
873 
s->insn_trap.func=func_insn_trap;
874 
s->insn_trap.rvd=((insn>>29)&0x1);
875 
s->insn_trap.c=((insn>>25)&0xf);
876 
s->insn_trap.rs1=((insn>>14)&0x1f);
877 
s->insn_trap.i=((insn>>13)&0x1);
878 
s->insn_trap.s2i=((insn>>0)&0x1fff);
879 
 return 1;};
880 
 unsigned int init_insn_rd(unsigned int insn, insn_union *s) {
881 
s->insn_rd.func=func_insn_rd;
882 
s->insn_rd.rd=((insn>>25)&0x1f);
883 
s->insn_rd.rs1=((insn>>14)&0x1f);
884 
s->insn_rd.x=((insn>>0)&0x3fff);
885 
 return 1;};
886 
 unsigned int init_insn_rdp(unsigned int insn, insn_union *s) {
887 
s->insn_rdp.func=func_insn_rdp;
888 
s->insn_rdp.rd=((insn>>25)&0x1f);
889 
s->insn_rdp.rs1=((insn>>14)&0x1f);
890 
s->insn_rdp.x=((insn>>0)&0x3fff);
891 
 return 1;};
892 
 unsigned int init_insn_rdw(unsigned int insn, insn_union *s) {
893 
s->insn_rdw.func=func_insn_rdw;
894 
s->insn_rdw.rd=((insn>>25)&0x1f);
895 
s->insn_rdw.rs1=((insn>>14)&0x1f);
896 
s->insn_rdw.x=((insn>>0)&0x3fff);
897 
 return 1;};
898 
 unsigned int init_insn_rdt(unsigned int insn, insn_union *s) {
899 
s->insn_rdt.func=func_insn_rdt;
900 
s->insn_rdt.rd=((insn>>25)&0x1f);
901 
s->insn_rdt.rs1=((insn>>14)&0x1f);
902 
s->insn_rdt.x=((insn>>0)&0x3fff);
903 
 return 1;};
904 
 unsigned int init_insn_wd(unsigned int insn, insn_union *s) {
905 
s->insn_wd.func=func_insn_wd;
906 
s->insn_wd.rd=((insn>>25)&0x1f);
907 
s->insn_wd.rs1=((insn>>14)&0x1f);
908 
s->insn_wd.x=((insn>>0)&0x3fff);
909 
 return 1;};
910 
 unsigned int init_insn_wdp(unsigned int insn, insn_union *s) {
911 
s->insn_wdp.func=func_insn_wdp;
912 
s->insn_wdp.rd=((insn>>25)&0x1f);
913 
s->insn_wdp.rs1=((insn>>14)&0x1f);
914 
s->insn_wdp.x=((insn>>0)&0x3fff);
915 
 return 1;};
916 
 unsigned int init_insn_wdw(unsigned int insn, insn_union *s) {
917 
s->insn_wdw.func=func_insn_wdw;
918 
s->insn_wdw.rd=((insn>>25)&0x1f);
919 
s->insn_wdw.rs1=((insn>>14)&0x1f);
920 
s->insn_wdw.x=((insn>>0)&0x3fff);
921 
 return 1;};
922 
 unsigned int init_insn_wdt(unsigned int insn, insn_union *s) {
923 
s->insn_wdt.func=func_insn_wdt;
924 
s->insn_wdt.rd=((insn>>25)&0x1f);
925 
s->insn_wdt.rs1=((insn>>14)&0x1f);
926 
s->insn_wdt.x=((insn>>0)&0x3fff);
927 
 return 1;};
928 
 unsigned int init_insn_stbar(unsigned int insn, insn_union *s) {
929 
s->insn_stbar.func=func_insn_stbar;
930 
s->insn_stbar.x=((insn>>0)&0x1fff);
931 
 return 1;};
932 
 unsigned int init_insn_unimp(unsigned int insn, insn_union *s) {
933 
s->insn_unimp.func=func_insn_unimp;
934 
s->insn_unimp.rvd=((insn>>25)&0x1f);
935 
s->insn_unimp.cst=((insn>>0)&0x3fffff);
936 
 return 1;};
937 
 
938 
 
939 
 
940 
 
941 
unsigned int decode(unsigned int insn, insn_union *s) {
942 
{
943 
switch (((insn>>30)&0x3)) {
944 
case 0x0:
945 
{
946 
 {
947 
 switch (((insn>>24)&0x1)) {
948 
 case 0x0:
949 
 {
950 
  {
951 
  switch (((insn>>23)&0x1)) {
952 
  case 0x0:
953 
  {
954 
   {
955 
   switch (((insn>>22)&0x1)) {
956 
   case 0x0:
957 
   {return init_insn_unimp(insn,s);
958 
   };break;
959 
   }}
960 
  };break;
961 
  case 0x1:
962 
  {
963 
   {
964 
   switch (((insn>>22)&0x1)) {
965 
   case 0x0:
966 
   {return init_insn_bra(insn,s);
967 
   };break;
968 
   }}
969 
  };break;
970 
  }}
971 
 };break;
972 
 case 0x1:
973 
 {
974 
  {
975 
  switch (((insn>>23)&0x1)) {
976 
  case 0x1:
977 
  {
978 
   {
979 
   switch (((insn>>22)&0x1)) {
980 
   case 0x1:
981 
   {return init_insn_cbra(insn,s);
982 
   };break;
983 
   case 0x0:
984 
   {return init_insn_fbra(insn,s);
985 
   };break;
986 
   }}
987 
  };break;
988 
  case 0x0:
989 
  {
990 
   {
991 
   switch (((insn>>22)&0x1)) {
992 
   case 0x0:
993 
   {
994 
    {
995 
    switch (((insn>>25)&0x1f)) {
996 
    case 0x0:
997 
    {return init_insn_nop(insn,s);
998 
    };break;
999 
    }}
1000 
    /*default:*/ return init_insn_sethi(insn,s);
1001 
   };break;
1002 
   }}
1003 
  };break;
1004 
  }}
1005 
 };break;
1006 
 }}
1007 
};break;
1008 
case 0x1:
1009 
{
1010 
 {
1011 
 switch (((insn>>24)&0x1)) {
1012 
 case 0x1:
1013 
 {
1014 
  {
1015 
  switch (((insn>>23)&0x1)) {
1016 
  case 0x0:
1017 
  {
1018 
   {
1019 
   switch (((insn>>22)&0x1)) {
1020 
   case 0x1:
1021 
   {
1022 
    {
1023 
    switch (((insn>>21)&0x1)) {
1024 
    case 0x0:
1025 
    {
1026 
     {
1027 
     switch (((insn>>20)&0x1)) {
1028 
     case 0x0:
1029 
     {
1030 
      {
1031 
      switch (((insn>>19)&0x1)) {
1032 
      case 0x0:
1033 
      {
1034 
       {
1035 
       switch (((insn>>25)&0x1f)) {
1036 
       case 0x0:
1037 
       {
1038 
        {
1039 
        switch (((insn>>13)&0x3f)) {
1040 
        case 0x1e:
1041 
        {return init_insn_stbar(insn,s);
1042 
        };break;
1043 
        }}
1044 
       };break;
1045 
       }}
1046 
       /*default:*/ return init_insn_rd(insn,s);
1047 
      };break;
1048 
      case 0x1:
1049 
      {return init_insn_rdp(insn,s);
1050 
      };break;
1051 
      }}
1052 
     };break;
1053 
     case 0x1:
1054 
     {
1055 
      {
1056 
      switch (((insn>>19)&0x1)) {
1057 
      case 0x1:
1058 
      {return init_insn_rdt(insn,s);
1059 
      };break;
1060 
      case 0x0:
1061 
      {return init_insn_rdw(insn,s);
1062 
      };break;
1063 
      }}
1064 
     };break;
1065 
     }}
1066 
    };break;
1067 
    }}
1068 
   };break;
1069 
   case 0x0:
1070 
   {
1071 
    {
1072 
    switch (((insn>>21)&0x1)) {
1073 
    case 0x0:
1074 
    {
1075 
     {
1076 
     switch (((insn>>20)&0x1)) {
1077 
     case 0x1:
1078 
     {return init_insn_tsaddtv(insn,s);
1079 
     };break;
1080 
     case 0x0:
1081 
     {return init_insn_tsadd(insn,s);
1082 
     };break;
1083 
     }}
1084 
    };break;
1085 
    case 0x1:
1086 
    {
1087 
     {
1088 
     switch (((insn>>20)&0x1)) {
1089 
     case 0x1:
1090 
     {
1091 
      {
1092 
      switch (((insn>>19)&0x1)) {
1093 
      case 0x1:
1094 
      {return init_insn_sra(insn,s);
1095 
      };break;
1096 
      case 0x0:
1097 
      {return init_insn_srl(insn,s);
1098 
      };break;
1099 
      }}
1100 
     };break;
1101 
     case 0x0:
1102 
     {
1103 
      {
1104 
      switch (((insn>>19)&0x1)) {
1105 
      case 0x1:
1106 
      {return init_insn_sll(insn,s);
1107 
      };break;
1108 
      }}
1109 
     };break;
1110 
     }}
1111 
    };break;
1112 
    }}
1113 
   };break;
1114 
   }}
1115 
  };break;
1116 
  case 0x1:
1117 
  {
1118 
   {
1119 
   switch (((insn>>22)&0x1)) {
1120 
   case 0x0:
1121 
   {
1122 
    {
1123 
    switch (((insn>>21)&0x1)) {
1124 
    case 0x0:
1125 
    {
1126 
     {
1127 
     switch (((insn>>20)&0x1)) {
1128 
     case 0x1:
1129 
     {
1130 
      {
1131 
      switch (((insn>>19)&0x1)) {
1132 
      case 0x1:
1133 
      {return init_insn_wdt(insn,s);
1134 
      };break;
1135 
      case 0x0:
1136 
      {return init_insn_wdw(insn,s);
1137 
      };break;
1138 
      }}
1139 
     };break;
1140 
     case 0x0:
1141 
     {
1142 
      {
1143 
      switch (((insn>>19)&0x1)) {
1144 
      case 0x1:
1145 
      {return init_insn_wdp(insn,s);
1146 
      };break;
1147 
      case 0x0:
1148 
      {return init_insn_wd(insn,s);
1149 
      };break;
1150 
      }}
1151 
     };break;
1152 
     }}
1153 
    };break;
1154 
    }}
1155 
   };break;
1156 
   case 0x1:
1157 
   {
1158 
    {
1159 
    switch (((insn>>21)&0x1)) {
1160 
    case 0x0:
1161 
    {
1162 
     {
1163 
     switch (((insn>>20)&0x1)) {
1164 
     case 0x1:
1165 
     {
1166 
      {
1167 
      switch (((insn>>19)&0x1)) {
1168 
      case 0x0:
1169 
      {return init_insn_trap(insn,s);
1170 
      };break;
1171 
      }}
1172 
     };break;
1173 
     case 0x0:
1174 
     {
1175 
      {
1176 
      switch (((insn>>19)&0x1)) {
1177 
      case 0x1:
1178 
      {return init_insn_ret(insn,s);
1179 
      };break;
1180 
      case 0x0:
1181 
      {return init_insn_jml(insn,s);
1182 
      };break;
1183 
      }}
1184 
     };break;
1185 
     }}
1186 
    };break;
1187 
    case 0x1:
1188 
    {
1189 
     {
1190 
     switch (((insn>>20)&0x1)) {
1191 
     case 0x0:
1192 
     {
1193 
      {
1194 
      switch (((insn>>19)&0x1)) {
1195 
      case 0x1:
1196 
      {return init_insn_rest(insn,s);
1197 
      };break;
1198 
      case 0x0:
1199 
      {return init_insn_sv(insn,s);
1200 
      };break;
1201 
      }}
1202 
     };break;
1203 
     }}
1204 
    };break;
1205 
    }}
1206 
   };break;
1207 
   }}
1208 
  };break;
1209 
  }}
1210 
 };break;
1211 
 case 0x0:
1212 
 {
1213 
  {
1214 
  switch (((insn>>20)&0x1)) {
1215 
  case 0x1:
1216 
  {
1217 
   {
1218 
   switch (((insn>>22)&0x1)) {
1219 
   case 0x1:
1220 
   {
1221 
    {
1222 
    switch (((insn>>21)&0x1)) {
1223 
    case 0x1:
1224 
    {return init_insn_divscc(insn,s);
1225 
    };break;
1226 
    case 0x0:
1227 
    {return init_insn_mulscc(insn,s);
1228 
    };break;
1229 
    }}
1230 
   };break;
1231 
   case 0x0:
1232 
   {
1233 
    {
1234 
    switch (((insn>>19)&0x1)) {
1235 
    case 0x1:
1236 
    {return init_insn_xor(insn,s);
1237 
    };break;
1238 
    case 0x0:
1239 
    {return init_insn_or(insn,s);
1240 
    };break;
1241 
    }}
1242 
   };break;
1243 
   }}
1244 
  };break;
1245 
  case 0x0:
1246 
  {
1247 
   {
1248 
   switch (((insn>>19)&0x1)) {
1249 
   case 0x0:
1250 
   {return init_insn_sadd(insn,s);
1251 
   };break;
1252 
   case 0x1:
1253 
   {
1254 
    {
1255 
    switch (((insn>>22)&0x1)) {
1256 
    case 0x0:
1257 
    {return init_insn_and(insn,s);
1258 
    };break;
1259 
    }}
1260 
   };break;
1261 
   }}
1262 
  };break;
1263 
  }}
1264 
 };break;
1265 
 }}
1266 
};break;
1267 
case 0x2:
1268 
{return init_insn_jmp(insn,s);
1269 
};break;
1270 
case 0x3:
1271 
{
1272 
 {
1273 
 switch (((insn>>24)&0x1)) {
1274 
 case 0x0:
1275 
 {
1276 
  {
1277 
  switch (((insn>>22)&0x1)) {
1278 
  case 0x1:
1279 
  {
1280 
   {
1281 
   switch (((insn>>21)&0x1)) {
1282 
   case 0x1:
1283 
   {
1284 
    {
1285 
    switch (((insn>>20)&0x1)) {
1286 
    case 0x1:
1287 
    {
1288 
     {
1289 
     switch (((insn>>19)&0x1)) {
1290 
     case 0x1:
1291 
     {return init_insn_swp(insn,s);
1292 
     };break;
1293 
     }}
1294 
    };break;
1295 
    case 0x0:
1296 
    {
1297 
     {
1298 
     switch (((insn>>19)&0x1)) {
1299 
     case 0x1:
1300 
     {return init_insn_ldstb(insn,s);
1301 
     };break;
1302 
     }}
1303 
    };break;
1304 
    }}
1305 
   };break;
1306 
   case 0x0:
1307 
   {
1308 
    {
1309 
    switch (((insn>>20)&0x1)) {
1310 
    case 0x1:
1311 
    {
1312 
     {
1313 
     switch (((insn>>19)&0x1)) {
1314 
     case 0x0:
1315 
     {return init_insn_ldsh(insn,s);
1316 
     };break;
1317 
     }}
1318 
    };break;
1319 
    case 0x0:
1320 
    {
1321 
     {
1322 
     switch (((insn>>19)&0x1)) {
1323 
     case 0x1:
1324 
     {return init_insn_ldsb(insn,s);
1325 
     };break;
1326 
     }}
1327 
    };break;
1328 
    }}
1329 
   };break;
1330 
   }}
1331 
  };break;
1332 
  case 0x0:
1333 
  {
1334 
   {
1335 
   switch (((insn>>20)&0x1)) {
1336 
   case 0x1:
1337 
   {
1338 
    {
1339 
    switch (((insn>>19)&0x1)) {
1340 
    case 0x1:
1341 
    {return init_insn_ldst_d(insn,s);
1342 
    };break;
1343 
    case 0x0:
1344 
    {return init_insn_ldst_uh(insn,s);
1345 
    };break;
1346 
    }}
1347 
   };break;
1348 
   case 0x0:
1349 
   {
1350 
    {
1351 
    switch (((insn>>19)&0x1)) {
1352 
    case 0x0:
1353 
    {return init_insn_ldst(insn,s);
1354 
    };break;
1355 
    case 0x1:
1356 
    {return init_insn_ldst_ub(insn,s);
1357 
    };break;
1358 
    }}
1359 
   };break;
1360 
   }}
1361 
  };break;
1362 
  }}
1363 
 };break;
1364 
 case 0x1:
1365 
 {
1366 
  {
1367 
  switch (((insn>>23)&0x1)) {
1368 
  case 0x1:
1369 
  {
1370 
   {
1371 
   switch (((insn>>22)&0x1)) {
1372 
   case 0x0:
1373 
   {
1374 
    {
1375 
    switch (((insn>>20)&0x1)) {
1376 
    case 0x1:
1377 
    {
1378 
     {
1379 
     switch (((insn>>19)&0x1)) {
1380 
     case 0x1:
1381 
     {
1382 
      {
1383 
      switch (((insn>>21)&0x1)) {
1384 
      case 0x1:
1385 
      {return init_insn_stdcq(insn,s);
1386 
      };break;
1387 
      }}
1388 
      /*default:*/ return init_insn_ldst_dc(insn,s);
1389 
     };break;
1390 
     }}
1391 
    };break;
1392 
    case 0x0:
1393 
    {
1394 
     {
1395 
     switch (((insn>>19)&0x1)) {
1396 
     case 0x1:
1397 
     {return init_insn_ldst_csr(insn,s);
1398 
     };break;
1399 
     case 0x0:
1400 
     {return init_insn_ldst_c(insn,s);
1401 
     };break;
1402 
     }}
1403 
    };break;
1404 
    }}
1405 
   };break;
1406 
   }}
1407 
  };break;
1408 
  case 0x0:
1409 
  {
1410 
   {
1411 
   switch (((insn>>22)&0x1)) {
1412 
   case 0x0:
1413 
   {
1414 
    {
1415 
    switch (((insn>>20)&0x1)) {
1416 
    case 0x1:
1417 
    {
1418 
     {
1419 
     switch (((insn>>19)&0x1)) {
1420 
     case 0x0:
1421 
     {
1422 
      {
1423 
      switch (((insn>>21)&0x1)) {
1424 
      case 0x1:
1425 
      {return init_insn_stdfq(insn,s);
1426 
      };break;
1427 
      }}
1428 
     };break;
1429 
     case 0x1:
1430 
     {return init_insn_ldst_df(insn,s);
1431 
     };break;
1432 
     }}
1433 
    };break;
1434 
    case 0x0:
1435 
    {
1436 
     {
1437 
     switch (((insn>>19)&0x1)) {
1438 
     case 0x1:
1439 
     {return init_insn_ldst_fsr(insn,s);
1440 
     };break;
1441 
     case 0x0:
1442 
     {return init_insn_ldst_f(insn,s);
1443 
     };break;
1444 
     }}
1445 
    };break;
1446 
    }}
1447 
   };break;
1448 
   }}
1449 
  };break;
1450 
  }}
1451 
 };break;
1452 
 }}
1453 
};break;
1454 
}}
1455 
 
1456 
return 0;
1457 
};
1458 
 

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