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[/] [core_arm/] [trunk/] [vhdl/] [sparc/] [config.pl] - Blame information for rev 5

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Line No. Rev Author Line
1 2 tarookumic
#!/usr/bin/perl
2
 
3
%sparc_cfg = (
4
 
5
# Synthesis options 
6
 
7
    CONFIG_CFG_NAME => "config",
8
    CFG_SYN_TARGET_TECH => "gen",
9
    CONFIG_SYN_INFER_PADS => 0,
10
    CONFIG_SYN_INFER_PCI_PADS => 0,
11
    CONFIG_SYN_INFER_RAM => 0,
12
    CONFIG_SYN_INFER_ROM => 0,
13
    CONFIG_SYN_INFER_REGF => 0,
14
    CONFIG_SYN_INFER_MULT => 0,
15
    CONFIG_SYN_RFTYPE => 1,
16
    CONFIG_TARGET_CLK => "gen",
17
    CONFIG_PLL_CLK_MUL => 1,
18
    CONFIG_PLL_CLK_DIV => 1,
19
    CONFIG_PCI_CLKDLL => 0,
20
    CONFIG_PCI_SYSCLK => 0,
21
 
22
# IU options 
23
 
24
    CONFIG_IU_NWINDOWS => 8,
25
    CFG_IU_MUL_TYPE => "none",
26
    CFG_IU_DIVIDER => "none",
27
    CONFIG_IU_MUL_MAC => 0,
28
    CONFIG_IU_MULPIPE => 0,
29
    CONFIG_IU_FASTJUMP => 0,
30
    CONFIG_IU_ICCHOLD => 0,
31
    CONFIG_IU_FASTDECODE => 0,
32
    CONFIG_IU_RFPOW => 0,
33
    CONFIG_IU_LDELAY => 1,
34
    CONFIG_IU_WATCHPOINTS => 0,
35
    CONFIG_IU_IMPL => 0,
36
    CONFIG_IU_VER => 0,
37
 
38
# FPU config 
39
 
40
    CONFIG_FPU_ENABLE => 0,
41
    CFG_FPU_CORE => "meiko",
42
    CFG_FPU_IF => "none",
43
    CONFIG_FPU_REGS => 32,
44
    CONFIG_FPU_VER => 0,
45
 
46
# CP config 
47
 
48
    CONFIG_CP_CFG => "cp_none",
49
 
50
# cache configuration */
51
 
52
    CFG_ICACHE_SZ => 2,
53
    CFG_ICACHE_LSZ => 16,
54
    CFG_ICACHE_ASSO => 1,
55
    CFG_ICACHE_ALGO => "rnd",
56
    CFG_ICACHE_LOCK => 0,
57
    CFG_DCACHE_SZ => 1,
58
    CFG_DCACHE_LSZ => 16,
59
    CFG_DCACHE_SNOOP => "none",
60
    CFG_DCACHE_ASSO => 1,
61
    CFG_DCACHE_ALGO => "rnd",
62
    CFG_DCACHE_LOCK => 0,
63
    CFG_DCACHE_RFAST => false,
64
    CFG_DCACHE_WFAST => false,
65
    CFG_DCACHE_LRAM  => false,
66
    CFG_DCACHE_LRSZ => 1,
67
    CFG_DCACHE_LRSTART => 0x143,
68
 
69
# MMU config 
70
 
71
    CFG_MMU_ENABLE => 0,
72
    CFG_MMU_TYPE => "combinedtlb",
73
    CFG_MMU_REP => "replruarray",
74
    CFG_MMU_I => 8,
75
    CFG_MMU_D => 8,
76
    CFG_MMU_DIAG => 0,
77
 
78
# Memory controller config
79
 
80
    CONFIG_MCTRL_8BIT => 0,
81
    CONFIG_MCTRL_16BIT => 0,
82
    CONFIG_MCTRL_5CS => 0,
83
    CONFIG_MCTRL_WFB => 0,
84
    CONFIG_MCTRL_SDRAM => 0,
85
    CONFIG_MCTRL_SDRAM_INVCLK => 0,
86
 
87
# Peripherals 
88
    CONFIG_PERI_LCONF => 0,
89
    CONFIG_PERI_AHBSTAT => 0,
90
    CONFIG_PERI_WPROT => 0,
91
    CONFIG_PERI_WDOG => 0,
92
    CONFIG_PERI_IRQ2 => 0,
93
 
94
# AHB 
95
 
96
    CONFIG_AHB_DEFMST => 0,
97
    CONFIG_AHB_SPLIT => 0,
98
    CONFIG_AHBRAM_ENABLE => 0,
99
    CFG_AHBRAM_SZ => 4,
100
 
101
# Debug 
102
    CONFIG_DEBUG_UART => 0,
103
    CONFIG_DEBUG_IURF => 0,
104
    CONFIG_DEBUG_FPURF => 0,
105
    CONFIG_DEBUG_NOHALT => 0,
106
    CFG_DEBUG_PCLOW =>  2,
107
    CONFIG_DEBUG_RFERR =>  0,
108
    CONFIG_DEBUG_CACHEMEMERR =>  0,
109
 
110
# DSU 
111
    CONFIG_DSU_ENABLE =>  0,
112
    CONFIG_DSU_TRACEBUF =>  0,
113
    CONFIG_DSU_MIXED_TRACE =>  0,
114
    CONFIG_SYN_TRACE_DPRAM =>  0,
115
    CFG_DSU_TRACE_SZ =>  64,
116
 
117
# Boot 
118
    CFG_BOOT_SOURCE =>  "memory",
119
    CONFIG_BOOT_RWS =>  0,
120
    CONFIG_BOOT_WWS =>  0,
121
    CONFIG_BOOT_SYSCLK =>  25000000,
122
    CONFIG_BOOT_BAUDRATE =>  19200,
123
    CONFIG_BOOT_EXTBAUD =>  0,
124
    CONFIG_BOOT_PROMABITS =>  11,
125
 
126
# Ethernet 
127
    CONFIG_ETH_ENABLE =>  0,
128
    CONFIG_ETH_TXFIFO =>  8,
129
    CONFIG_ETH_RXFIFO =>  8,
130
    CONFIG_ETH_BURST =>  4,
131
 
132
# PCI 
133
 
134
    CFG_PCI_CORE =>  "none",
135
    CONFIG_PCI_ENABLE =>  0,
136
    CONFIG_PCI_VENDORID =>  0,
137
    CONFIG_PCI_DEVICEID =>  0,
138
    CONFIG_PCI_SUBSYSID =>  0,
139
    CONFIG_PCI_REVID =>  0,
140
    CONFIG_PCI_CLASSCODE =>  0,
141
    CFG_PCI_FIFO =>  8,
142
    CONFIG_PCI_PMEPADS =>  0,
143
    CONFIG_PCI_P66PAD =>  0,
144
    CONFIG_PCI_RESETALL =>  0,
145
    CONFIG_PCI_ARBEN =>  0
146
);
147
 
148
$ahbmst = 1;
149
$pciahbmst = 0;
150
$pciahbslv = 0;
151
 
152
 
153
 
154
 
155
%sparc_map =
156
   (
157
    CFG_SYN_TARGET_TECH =>
158
    [
159
          CONFIG_SYN_GENERIC => "gen",
160
          CONFIG_SYN_ATC35 => "atc35",
161
          CONFIG_SYN_ATC25 => "atc25",
162
          CONFIG_SYN_ATC18 => "atc18",
163
          CONFIG_SYN_FS90 => "fs90",
164
          CONFIG_SYN_UMC018 => "umc18",
165
          CONFIG_SYN_TSMC025 => "tsmc25",
166
          CONFIG_SYN_PROASIC => "proasic",
167
          CONFIG_SYN_AXCEL => "axcel",
168
          CONFIG_SYN_VIRTEX => "virtex",
169
          CONFIG_SYN_VIRTEX2 => "virtex2"
170
    ],
171
 
172
    CONFIG_SYN_INFER_PADS => [ CONFIG_SYN_INFER_PADS => 1 ],
173
    CONFIG_SYN_INFER_PCI_PADS => [ CONFIG_SYN_INFER_PCI_PADS =>  1 ],
174
    CONFIG_SYN_INFER_RAM => [ CONFIG_SYN_INFER_RAM => 1 ],
175
    CONFIG_SYN_INFER_ROM => [ CONFIG_SYN_INFER_ROM => 1 ],
176
    CONFIG_SYN_INFER_REGF => [ CONFIG_SYN_INFER_REGF => 1 ],
177
    CONFIG_SYN_INFER_MULT => [ CONFIG_SYN_INFER_MULT => 1 ],
178
    CONFIG_SYN_RFTYPE => [ CONFIG_SYN_RFTYPE => 2 ],
179
    CONFIG_SYN_TRACE_DPRAM => [ CONFIG_SYN_TRACE_DPRAM => 1 ],
180
    CONFIG_TARGET_CLK =>
181
    [
182
        CONFIG_CLK_VIRTEX => "virtex",
183
        CONFIG_CLK_VIRTEX2 => "virtex2"
184
        ],
185
    CONFIG_PLL_CLK_MUL =>
186
    [
187
        CONFIG_CLKDLL_1_2 => 1,
188
        CONFIG_CLKDLL_1_1 => 1,
189
        CONFIG_CLKDLL_2_1 => 2,
190
        CONFIG_DCM_2_3 => 2,
191
        CONFIG_DCM_3_4 => 3,
192
        CONFIG_DCM_4_5 => 4,
193
        CONFIG_DCM_1_1 => 2,
194
        CONFIG_DCM_5_4 => 5,
195
        CONFIG_DCM_4_3 => 4,
196
        CONFIG_DCM_3_2 => 3,
197
        CONFIG_DCM_5_3 => 5,
198
        CONFIG_DCM_2_1 => 2,
199
        CONFIG_DCM_3_1 => 3,
200
        CONFIG_DCM_4_1 => 4
201
        ],
202
    CONFIG_PLL_CLK_DIV =>
203
    [
204
        CONFIG_CLKDLL_1_2 => 2,
205
        CONFIG_CLKDLL_1_1 => 1,
206
        CONFIG_CLKDLL_2_1 => 2,
207
        CONFIG_DCM_2_3 => 3,
208
        CONFIG_DCM_3_4 => 4,
209
        CONFIG_DCM_4_5 => 5,
210
        CONFIG_DCM_1_1 => 2,
211
        CONFIG_DCM_5_4 => 4,
212
        CONFIG_DCM_4_3 => 3,
213
        CONFIG_DCM_3_2 => 2,
214
        CONFIG_DCM_5_3 => 3,
215
        CONFIG_DCM_2_1 => 1,
216
        CONFIG_DCM_3_1 => 1,
217
        CONFIG_DCM_4_1 => 1
218
        ],
219
 
220
    CONFIG_PCI_CLKDLL =>  [ CONFIG_PCI_DLL => 1 ],
221
    CONFIG_PCI_SYSCLK => [ CONFIG_PCI_SYSCLK => 1],
222
 
223
    CONFIG_IU_NWINDOWS => [ CONFIG_IU_NWINDOWS => sub { my ($v) = @_; if (($v > 32) || ($v < 1)) { $v = 8; } return $v;} ],   #check_nwin
224
 
225
    CFG_IU_DIVIDER => [ CONFIG_IU_V8MULDIV => "radix2" ],
226
 
227
    CFG_IU_MUL_TYPE => [
228
        CONFIG_IU_MUL_LATENCY_1 => "m32x32",
229
        CONFIG_IU_MUL_LATENCY_2 => "m32x16",
230
        CONFIG_IU_MUL_LATENCY_4 => "m16x16",
231
        CONFIG_IU_MUL_LATENCY_5 => "m16x16",
232
        CONFIG_IU_MUL_LATENCY_35 => "iterative",
233
        CONFIG_IU_MUL_MAC => "m16x16"
234
        ],
235
 
236
    CONFIG_IU_MULPIPE => [ CONFIG_IU_MUL_LATENCY_5 => 1 ],
237
    CONFIG_IU_MUL_MAC => [CONFIG_IU_MUL_MAC => 1 ],
238
 
239
 
240
    CONFIG_IU_FASTJUMP => [CONFIG_IU_FASTJUMP => 1 ],
241
 
242
    CONFIG_IU_FASTDECODE => [CONFIG_IU_FASTDECODE => 1],
243
    CONFIG_IU_RFPOW => [CONFIG_IU_RFPOW => 1],
244
    CONFIG_IU_ICCHOLD =>  [CONFIG_IU_ICCHOLD => 1],
245
 
246
    CONFIG_IU_LDELAY => [CONFIG_IU_LDELAY => sub { my ($v) = @_; if (($v > 2) || ($v < 1)) { $v = 2; } return $v;} ],
247
 
248
    CONFIG_IU_WATCHPOINTS => [ CONFIG_IU_WATCHPOINTS => sub { my ($v) = @_; if (($v > 4) || ($v < 0)) { $v = 0; } return $v;} ],
249
 
250
    CONFIG_IU_IMPL => [ CONFIG_IU_IMPL => sub { my ($v) = @_; $v = hex ($v) & 0xf;  return $v;} ],
251
    CONFIG_IU_VER => [ CONFIG_IU_VER => sub { my ($v) = @_; $v = hex ($v) & 0xf;  return $v;}],
252
 
253
    CONFIG_FPU_ENABLE => [ CONFIG_FPU_ENABLE => 1 ],
254
 
255
    CONFIG_FPU_REGS => [ CONFIG_FPU_GRFPU => 0 ],
256
    CFG_FPU_IF => [ CONFIG_FPU_GRFPU => "parallel" ],
257
    CFG_FPU_CORE => [
258
        CONFIG_FPU_GRFPU => "grfpu",
259
        CONFIG_FPU_MEIKO => "meiko",
260
        CONFIG_FPU_LTH => "lth"
261
        ],
262
 
263
    CONFIG_FPU_VER => [ CONFIG_FPU_VER => sub { my ($v) = @_; $v = hex ($v) & 0x7; return $v;}],
264
 
265
    # CP config
266
    CONFIG_CP_CFG => [CONFIG_CP_CFG => sub { my ($v) = @_; return $v;}],
267
 
268
    # cache config 
269
    CFG_ICACHE_ASSO => [
270
        CONFIG_ICACHE_ASSO1 => 1,
271
        CONFIG_ICACHE_ASSO2 => 2,
272
        CONFIG_ICACHE_ASSO3 => 3,
273
        CONFIG_ICACHE_ASSO4 => 4
274
        ],
275
    CFG_ICACHE_ALGO => [
276
        CONFIG_ICACHE_ALGORND => "rnd",
277
        CONFIG_ICACHE_ALGOLRR => "lrr",
278
        CONFIG_ICACHE_ALGOLRU => "lru"
279
        ],
280
 
281
    CFG_ICACHE_LOCK => [ CONFIG_ICACHE_LOCK => 1],
282
    CFG_ICACHE_SZ => [
283
        CONFIG_ICACHE_SZ1 => 1,
284
        CONFIG_ICACHE_SZ2 => 2,
285
        CONFIG_ICACHE_SZ4 => 4,
286
        CONFIG_ICACHE_SZ8 => 8,
287
        CONFIG_ICACHE_SZ16 => 16,
288
        CONFIG_ICACHE_SZ32 => 32,
289
        CONFIG_ICACHE_SZ64 => 64
290
        ],
291
    CFG_ICACHE_LSZ => [
292
        CONFIG_ICACHE_LZ16 => 16,
293
        CONFIG_ICACHE_LZ32 => 32
294
        ],
295
 
296
    CFG_DCACHE_SZ => [
297
        CONFIG_DCACHE_SZ1 => 1,
298
        CONFIG_DCACHE_SZ2 => 2,
299
        CONFIG_DCACHE_SZ4 => 4,
300
        CONFIG_DCACHE_SZ8 => 8,
301
        CONFIG_DCACHE_SZ16 => 16,
302
        CONFIG_DCACHE_SZ32 => 32,
303
        CONFIG_DCACHE_SZ64 => 64
304
        ],
305
 
306
    CFG_DCACHE_LSZ => [
307
        CONFIG_DCACHE_LZ16 => 16,
308
        CONFIG_DCACHE_LZ32 => 32
309
        ],
310
 
311
    CFG_DCACHE_SNOOP => [
312
        CONFIG_DCACHE_SNOOP_SLOW => "slow",
313
        CONFIG_DCACHE_SNOOP_FAST => "fast"
314
        ],
315
 
316
    CFG_DCACHE_ASSO => [
317
        CONFIG_DCACHE_ASSO1 => 1,
318
        CONFIG_DCACHE_ASSO2 => 2,
319
        CONFIG_DCACHE_ASSO3 => 3,
320
        CONFIG_DCACHE_ASSO4 => 4
321
        ],
322
 
323
    CFG_DCACHE_ALGO => [
324
        CONFIG_DCACHE_ALGORND => "rnd",
325
        CONFIG_DCACHE_ALGOLRR => "lrr",
326
        CONFIG_DCACHE_ALGOLRU => "lru"
327
        ],
328
 
329
    CFG_DCACHE_LOCK => [CONFIG_DCACHE_LOCK => 1 ],
330
    CFG_DCACHE_RFAST => [CONFIG_DCACHE_RFAST => 1],
331
    CFG_DCACHE_WFAST => [CONFIG_DCACHE_WFAST => 1],
332
    CFG_DCACHE_LRAM => [CONFIG_DCACHE_LRAM => 1],
333
 
334
    CFG_DCACHE_LRSZ => [
335
        CONFIG_DCACHE_LRAM_SZ1 => 1,
336
        CONFIG_DCACHE_LRAM_SZ2 => 2,
337
        CONFIG_DCACHE_LRAM_SZ4 => 4,
338
        CONFIG_DCACHE_LRAM_SZ8 => 8,
339
        CONFIG_DCACHE_LRAM_SZ16 => 16,
340
        CONFIG_DCACHE_LRAM_SZ32 => 32,
341
        CONFIG_DCACHE_LRAM_SZ64 => 64
342
        ],
343
 
344
    CFG_DCACHE_LRSTART => [ CONFIG_DCACHE_LRSTART => sub { my ($v) = @_; $v = hex ($v) & 0xff;  return $v;}],
345
 
346
    CFG_MMU_ENABLE => [CONFIG_MMU_ENABLE=>1],
347
 
348
    CFG_MMU_DIAG => [CONFIG_MMU_DIAG => 1],
349
 
350
    CFG_MMU_TYPE => [
351
        CONFIG_MMU_SPLIT => "splittlb",
352
        CONFIG_MMU_COMBINED => "combinedtlb"
353
        ],
354
 
355
    CFG_MMU_REP => [
356
        CONFIG_MMU_REPARRAY => "replruarray",
357
        CONFIG_MMU_REPINCREMENT => "repincrement"
358
        ],
359
 
360
    CFG_MMU_I => [
361
        CONFIG_MMU_I1 => 1,
362
        CONFIG_MMU_I2 => 2,
363
        CONFIG_MMU_I4 => 4,
364
        CONFIG_MMU_I8 => 8,
365
        CONFIG_MMU_I16 => 16,
366
        CONFIG_MMU_I32 => 32
367
        ],
368
 
369
    CFG_MMU_D => [
370
        CONFIG_MMU_D1 => 1,
371
        CONFIG_MMU_D2 => 2,
372
        CONFIG_MMU_D4 => 4,
373
        CONFIG_MMU_D8 => 8,
374
        CONFIG_MMU_D16 => 16,
375
        CONFIG_MMU_D32 => 32
376
        ],
377
 
378
 
379
    # Memory controller 
380
    CONFIG_MCTRL_8BIT => [CONFIG_MCTRL_8BIT => 1],
381
    CONFIG_MCTRL_16BIT => [CONFIG_MCTRL_16BIT => 1],
382
    CONFIG_MCTRL_5CS => [CONFIG_MCTRL_5CS => 1],
383
    CONFIG_MCTRL_WFB => [CONFIG_MCTRL_WFB => 1],
384
    CONFIG_MCTRL_SDRAM => [CONFIG_MCTRL_SDRAM => 1],
385
    CONFIG_MCTRL_SDRAM_INVCLK => [CONFIG_MCTRL_SDRAM_INVCLK => 1],
386
 
387
    # Peripherals 
388
    CONFIG_PERI_LCONF => [CONFIG_PERI_LCONF =>  1],
389
    CONFIG_PERI_AHBSTAT => [CONFIG_PERI_AHBSTAT => 1],
390
    CONFIG_PERI_WPROT => [CONFIG_PERI_WPROT => 1],
391
    CONFIG_PERI_WDOG => [CONFIG_PERI_WDOG => 1],
392
    CONFIG_PERI_IRQ2 => [CONFIG_PERI_IRQ2 => 1],
393
 
394
    # AHB 
395
    CONFIG_AHB_DEFMST => [CONFIG_AHB_DEFMST => sub { my ($v) = @_; return $v;}],
396
    CONFIG_AHB_SPLIT => [CONFIG_AHB_SPLIT => 1],
397
    CONFIG_AHBRAM_ENABLE => [CONFIG_AHBRAM_ENABLE => 1],
398
    CFG_AHBRAM_SZ => [
399
        CONFIG_AHBRAM_SZ1 => 1,
400
        CONFIG_AHBRAM_SZ2 => 2,
401
        CONFIG_AHBRAM_SZ4 => 3,
402
        CONFIG_AHBRAM_SZ8 => 4,
403
        CONFIG_AHBRAM_SZ16 => 5,
404
        CONFIG_AHBRAM_SZ32 => 6,
405
        CONFIG_AHBRAM_SZ64 => 7
406
        ],
407
 
408
 
409
    # Debug 
410
    CONFIG_DEBUG_UART => [CONFIG_DEBUG_UART => 1],
411
    CONFIG_DEBUG_IURF => [CONFIG_DEBUG_IURF => 1],
412
    CONFIG_DEBUG_FPURF => [CONFIG_DEBUG_FPURF => 1],
413
    CONFIG_DEBUG_NOHALT => [CONFIG_DEBUG_NOHALT => 1],
414
    CFG_DEBUG_PCLOW => [CONFIG_DEBUG_PC32 => 0],
415
    CONFIG_DEBUG_RFERR => [CONFIG_DEBUG_RFERR => 1],
416
    CONFIG_DEBUG_CACHEMEMERR => [CONFIG_DEBUG_CACHEMEMERR => 1],
417
 
418
    # DSU 
419
    CONFIG_DSU_ENABLE => [CONFIG_DSU_ENABLE => sub { $ahbmst ++; return 1;} ] ,  ##; ahbmst ++;]
420
 
421
    CONFIG_DSU_TRACEBUF => [CONFIG_DSU_TRACEBUF => 1],
422
    CONFIG_DSU_MIXED_TRACE=> [CONFIG_DSU_MIXED_TRACE => 1],
423
 
424
    CFG_DSU_TRACE_SZ => [
425
        CONFIG_DSU_TRACESZ64 => 64,
426
        CONFIG_DSU_TRACESZ128 => 128,
427
        CONFIG_DSU_TRACESZ256 => 256,
428
        CONFIG_DSU_TRACESZ512 => 512,
429
        CONFIG_DSU_TRACESZ1024 => 1024
430
        ],
431
 
432
 
433
    # Boot 
434
    CFG_BOOT_SOURCE => [
435
        CONFIG_BOOT_EXTPROM => "memory",
436
        CONFIG_BOOT_INTPROM => "prom",
437
        CONFIG_BOOT_MIXPROM => "dual"
438
        ],
439
 
440
    CONFIG_BOOT_RWS => [CONFIG_BOOT_RWS => sub { my ($v) = @_; $v = hex ($v) & 0x3;  return $v;} ],
441
    CONFIG_BOOT_WWS => [CONFIG_BOOT_WWS => sub { my ($v) = @_; $v = hex ($v) & 0x3;  return $v;} ],
442
    CONFIG_BOOT_SYSCLK => [CONFIG_BOOT_SYSCLK => sub { my ($v) = @_; return $v;} ],
443
    CONFIG_BOOT_BAUDRATE => [CONFIG_BOOT_BAUDRATE => sub { my ($v) = @_; $v = hex ($v) & 0x3fffff;  return $v;} ],
444
    CONFIG_BOOT_EXTBAUD => [CONFIG_BOOT_EXTBAUD => 1],
445
    CONFIG_BOOT_PROMABITS => [CONFIG_BOOT_PROMABITS => sub { my ($v) = @_; $v = hex ($v) & 0x3f;  return $v;} ],
446
 
447
    # Ethernet 
448
    CONFIG_ETH_ENABLE => [CONFIG_ETH_ENABLE => sub { $ahbmst++; return 1; } ], #; ahbmst++
449
    CONFIG_ETH_TXFIFO => [CONFIG_ETH_TXFIFO => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
450
    CONFIG_ETH_RXFIFO => [CONFIG_ETH_RXFIFO => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
451
    CONFIG_ETH_BURST  => [CONFIG_ETH_BURST => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
452
 
453
 
454
 
455
    # PCI 
456
    CONFIG_PCI_ENABLE => [CONFIG_PCI_ENABLE => 1],
457
    CFG_PCI_CORE => [
458
                     CONFIG_PCI_TARGET => sub { $ahbmst++; $pciahbmst = 1; $pciahbslv = 1; return "target_only"; },
459
                     CONFIG_PCI_OPENCORES => sub { $ahbmst++; $pciahbmst = 1; $pciahbslv = 1; return "opencores"; },
460
                     CONFIG_PCI_INSILICON => sub { $ahbmst+=2; $pciahbmst = 2; $pciahbslv = 1; return "insilicon"; }
461
                     ],
462
 
463
    CONFIG_PCI_VENDORID => [ CONFIG_PCI_VENDORID => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
464
    CONFIG_PCI_DEVICEID => [ CONFIG_PCI_DEVICEID => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
465
    CONFIG_PCI_SUBSYSID => [ CONFIG_PCI_SUBSYSID => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
466
    CONFIG_PCI_REVID    => [ CONFIG_PCI_REVID    => sub { my ($v) = @_; $v = hex ($v) & 0xff;  return $v;}],
467
    CONFIG_PCI_CLASSCODE => [ CONFIG_PCI_CLASSCODE => sub { my ($v) = @_; $v = hex ($v) & 0x0ffffff;  return $v;}],
468
 
469
 
470
    CFG_PCI_FIFO => [ CONFIG_PCI_FIFO2 => 1,
471
                      CONFIG_PCI_FIFO4 => 2,
472
                      CONFIG_PCI_FIFO8 => 3,
473
                      CONFIG_PCI_FIFO16 => 4,
474
                      CONFIG_PCI_FIFO32 => 5,
475
                      CONFIG_PCI_FIFO64 => 6,
476
                      CONFIG_PCI_FIFO128 => 7 ],
477
 
478
    CONFIG_PCI_PMEPADS => [ CONFIG_PCI_PMEPADS => 1 ],
479
    CONFIG_PCI_P66PAD => [ CONFIG_PCI_P66PAD => 1 ],
480
    CONFIG_PCI_RESETALL => [ CONFIG_PCI_RESETALL => 1 ],
481
    CONFIG_PCI_ARBEN => [ CONFIG_PCI_ARBEN => 1]
482
 
483
);
484
 
485
sub log2 {
486
    my ($x) = @_;
487
    my $i;
488
 
489
    $x--;
490
    for ($i=0; $x!=0; $i++) { $x >>= 1;}
491
    return $i;
492
}
493
 
494
sub sparc_config_file {
495
 
496
    my ($sparccfg) = @_;
497
    my %sparccfg = %{$sparccfg};
498
    my $fn = "vhdl/sparc/leon_device.vhd";
499
    my $fn_v = "vhdl/sparc/leon_device.v";
500
 
501
    $sparccfg{CONFIG_FPU_ENABLE_CONFIG_FPU_REGS} = $sparccfg{CONFIG_FPU_ENABLE}*$sparccfg{CONFIG_FPU_REGS};
502
    $sparccfg{CFG_ICACHE_LSZ_4} = int ($sparccfg{CFG_ICACHE_LSZ}/4);
503
    $sparccfg{CFG_DCACHE_LSZ_4} = int ($sparccfg{CFG_DCACHE_LSZ}/4);
504
 
505
    $sparccfg{CONFIG_AHB_DEFMST_ahbmst} = int ($sparccfg{CONFIG_AHB_DEFMST} % $ahbmst);
506
    $sparccfg{CFG_AHBRAM_SZ_7 } = 7 + $sparccfg{CFG_AHBRAM_SZ};
507
 
508
    $sparccfg{CONFIG_PCI_VENDORID_4} = sprintf ("%04X",$sparccfg{CONFIG_PCI_VENDORID});
509
    $sparccfg{CONFIG_PCI_DEVICEID_4} = sprintf ("%04X",$sparccfg{CONFIG_PCI_DEVICEID});
510
    $sparccfg{CONFIG_PCI_SUBSYSID_4} = sprintf ("%04X",$sparccfg{CONFIG_PCI_SUBSYSID});
511
 
512
    $sparccfg{CONFIG_PCI_REVID_2} = sprintf ("%02X",$sparccfg{CONFIG_PCI_REVID});
513
    $sparccfg{CONFIG_PCI_CLASSCODE_6} = sprintf ("%06X",$sparccfg{CONFIG_PCI_CLASSCODE});
514
 
515
    if ($sparccfg{CONFIG_AHBRAM_ENABLE} == 1) { $ahbram = 4; }  else { $ahbram = 0;}
516
    if ($sparccfg{CONFIG_DSU_ENABLE} == 1) {$dsuen = 2;} else {$dsuen = 7;}
517
    if ($sparccfg{CONFIG_PCI_ENABLE} == 1) {$pcien = 3;} else {$pcien = 7;}
518
    if ($sparccfg{CONFIG_ETH_ENABLE} == 1) {$ethen = 5;} else {$ethen = 7;}
519
 
520
    $sparccfg{CONFIG_ETH_TXFIFO_log2} =  log2($sparccfg{CONFIG_ETH_TXFIFO})+1;
521
    $sparccfg{CONFIG_ETH_RXFIFO_log2} = log2($sparccfg{CONFIG_ETH_RXFIFO})+1;
522
    $sparccfg{CONFIG_ETH_BURST_log2} = log2($sparccfg{CONFIG_ETH_BURST})+1;
523
 
524
    if (($sparccfg{CFG_ICACHE_ALGO} eq "lrr") && ($sparccfg{CFG_ICACHE_ASSO} > 2)) {
525
        $sparccfg{CFG_ICACHE_ALGO} = "rnd"; }
526
    if (($sparccfg{CFG_DCACHE_ALGO} eq "lrr") && ($sparccfg{CFG_DCACHE_ASSO} > 2)) {
527
        $sparccfg{CFG_DCACHE_ALGO} = "rnd"; }
528
 
529
    $sparccfg{ahbmst} = $ahbmst;
530
    $sparccfg{ahbram} = $ahbram;
531
    $sparccfg{dsuen} = $dsuen;
532
    $sparccfg{pcien} = $pcien;
533
    $sparccfg{ethen} = $ethen;
534
    $sparccfg{pciahbmst} = $pciahbmst;
535
    $sparccfg{pciahbslv} = $pciahbslv;
536
 
537
    if (-f $fn) {
538
        print STDERR ("Making backup of $fn\n");
539
        `cp $fn $fn.bck`;
540
    }
541
    if (-f $fn_v) {
542
        print STDERR ("Making backup of $fn_v\n");
543
        `cp $fn_v $fn_v.bck`;
544
    }
545
 
546
    foreach $k (keys %sparccfg) {
547
        $v = $sparccfg{$k};
548
        $sparc_config_file = cfg_replace ($k,$v,$sparc_config_file);
549
        $sparc_config_file_v = cfg_replace ($k,$v,$sparc_config_file_v);
550
        $sparc_config_file_v2 = cfg_replace ($k,$v,$sparc_config_file_v2);
551
        $sparc_config_file_v3 = cfg_replace ($k,$v,$sparc_config_file_v3);
552
    }
553
 
554
    if (($sparccfg{CONFIG_SYN_INFER_RAM} == 0) && (!(($sparccfg{CFG_SYN_TARGET_TECH} eq "virtex") &&
555
                                                     ($sparccfg{CFG_SYN_TARGET_TECH} eq "virtex2")))) {
556
        $sparc_config_file_v .= $sparc_config_file_v2;
557
    } else {
558
        $sparc_config_file_v .= $sparc_config_file_v3;
559
    }
560
 
561
    if (open(FILEH, ">$fn")) {
562
        print FILEH $sparc_config_file;
563
    } else {
564
        die ("opening \"$fn\": $!\n");
565
    }
566
    if (open(FILEH, ">$fn_v")) {
567
        print FILEH $sparc_config_file_v;
568
    } else {
569
        die ("opening \"$fn_v\": $!\n");
570
    }
571
}
572
 
573
sub cfg_replace {
574
    my ($k,$v,$l) = @_;
575
    my $type;
576
    if ($l =~ /%$k%\[(.)\]/) {
577
        $type = $1;
578
        if ($type eq "b") {
579
            if ($v == 0) {
580
                $v = "false";
581
            } else {
582
                $v = "true";
583
            }
584
            $l =~ s/%($k)%\[(.)\]/$v/gi;
585
        } else {
586
            print STDERR ("Warning cound not resolve [$1] typedef\n");
587
        }
588
    }
589
    else {
590
        $l =~ s/%$k%/$v/gi;
591
    }
592
    return $l;
593
}
594
 
595
 
596
$sparc_config_file=<<SPARC_CONFIG_END;
597
 
598
library IEEE;
599
use IEEE.std_logic_1164.all;
600
use work.leon_target.all;
601
 
602
package leon_device is
603
 
604
-----------------------------------------------------------------------------
605
-- Automatically generated by vhdl/sparc/config.pl from of .config
606
-----------------------------------------------------------------------------
607
 
608
 
609
 
610
   constant syn_%CONFIG_CFG_NAME% : syn_config_type := (
611
    targettech => %CFG_SYN_TARGET_TECH%,infer_pads =>%CONFIG_SYN_INFER_PADS%[b],infer_pci=>%CONFIG_SYN_INFER_PCI_PADS%[b],
612
    infer_ram => %CONFIG_SYN_INFER_RAM%[b], infer_regf => %CONFIG_SYN_INFER_REGF%[b], infer_rom => %CONFIG_SYN_INFER_ROM%[b],
613
    infer_mult => %CONFIG_SYN_INFER_MULT%[b], rftype => %CONFIG_SYN_RFTYPE%, targetclk => %CONFIG_TARGET_CLK%,
614
    clk_mul => %CONFIG_PLL_CLK_MUL%, clk_div => %CONFIG_PLL_CLK_DIV%, pci_dll => %CONFIG_PCI_CLKDLL%[b],
615
    pci_sysclk => %CONFIG_PCI_SYSCLK%[b] );
616
 
617
  constant iu_%CONFIG_CFG_NAME% : iu_config_type := (
618
    nwindows => %CONFIG_IU_NWINDOWS%, multiplier => %CFG_IU_MUL_TYPE%, mulpipe => %CONFIG_IU_MULPIPE%[b],
619
    divider => %CFG_IU_DIVIDER%, mac => %CONFIG_IU_MUL_MAC%[b], fpuen => %CONFIG_FPU_ENABLE%, cpen => false,
620
    fastjump => %CONFIG_IU_FASTJUMP%[b], icchold => %CONFIG_IU_ICCHOLD%[b], lddelay => %CONFIG_IU_LDELAY%,
621
    fastdecode => %CONFIG_IU_FASTDECODE%[b], rflowpow => %CONFIG_IU_RFPOW%[b], watchpoints => %CONFIG_IU_WATCHPOINTS%,
622
    impl => %CONFIG_IU_IMPL%, version => %CONFIG_IU_VER%);
623
 
624
  constant fpu_%CONFIG_CFG_NAME% : fpu_config_type :=
625
    (core => %CFG_FPU_CORE%, interface => %CFG_FPU_IF%, fregs => %CONFIG_FPU_ENABLE_CONFIG_FPU_REGS%,
626
     version => %CONFIG_FPU_VER%);
627
 
628
  constant cache_%CONFIG_CFG_NAME% : cache_config_type := (
629
    isets => %CFG_ICACHE_ASSO%, isetsize => %CFG_ICACHE_SZ%, ilinesize => %CFG_ICACHE_LSZ_4%,
630
    ireplace => %CFG_ICACHE_ALGO%, ilock => %CFG_ICACHE_LOCK%,
631
    dsets => %CFG_DCACHE_ASSO%, dsetsize => %CFG_DCACHE_SZ%, dlinesize => %CFG_DCACHE_LSZ_4%,
632
    dreplace => %CFG_DCACHE_ALGO%, dlock => %CFG_DCACHE_LOCK%,
633
    dsnoop => %CFG_DCACHE_SNOOP%, drfast => %CFG_DCACHE_RFAST%[b], dwfast => %CFG_DCACHE_WFAST%[b],
634
    dlram => %CFG_DCACHE_LRAM%[b],
635
    dlramsize => %CFG_DCACHE_LRSZ%, dlramaddr => 16#%CFG_DCACHE_LRSTART%#);
636
 
637
  constant mmu_%CONFIG_CFG_NAME% : mmu_config_type := (
638
    enable => %CFG_MMU_ENABLE%, itlbnum => %CFG_MMU_I%, dtlbnum => %CFG_MMU_D%, tlb_type => %CFG_MMU_TYPE%,
639
    tlb_rep => %CFG_MMU_REP%, tlb_diag => %CFG_MMU_DIAG%[b] );
640
 
641
  constant ahbrange_config  : ahbslv_addr_type :=
642
        (0,0,0,0,0,0,%ahbram%,0,1,%dsuen%,%pcien%,%ethen%,%pcien%,%pcien%,%pcien%,%pcien%);
643
 
644
  constant ahb_%CONFIG_CFG_NAME% : ahb_config_type := ( masters => %ahbmst%, defmst => %CONFIG_AHB_DEFMST_ahbmst%,
645
    split => %CONFIG_AHB_SPLIT%[b], testmod => false);
646
 
647
  constant mctrl_%CONFIG_CFG_NAME% : mctrl_config_type := (
648
    bus8en => %CONFIG_MCTRL_8BIT%[b], bus16en => %CONFIG_MCTRL_16BIT%[b], wendfb => %CONFIG_MCTRL_WFB%[b],
649
    ramsel5 => %CONFIG_MCTRL_5CS%[b], sdramen => %CONFIG_MCTRL_SDRAM%[b], sdinvclk => %CONFIG_MCTRL_SDRAM_INVCLK%[b]);
650
 
651
  constant peri_%CONFIG_CFG_NAME% : peri_config_type := (
652
    cfgreg => %CONFIG_PERI_LCONF%[b], ahbstat => %CONFIG_PERI_AHBSTAT%[b], wprot => %CONFIG_PERI_WPROT%[b],
653
    wdog => %CONFIG_PERI_WDOG%[b],  irq2en => %CONFIG_PERI_IRQ2%[b], ahbram => %CONFIG_AHBRAM_ENABLE%[b],
654
    ahbrambits => %CFG_AHBRAM_SZ_7%, ethen => %CONFIG_ETH_ENABLE%[b] );
655
 
656
  constant debug_%CONFIG_CFG_NAME% : debug_config_type := ( enable => true, uart => %CONFIG_DEBUG_UART%[b],
657
    iureg => %CONFIG_DEBUG_IURF%[b], fpureg => %CONFIG_DEBUG_FPURF%[b], nohalt => %CONFIG_DEBUG_NOHALT%[b],
658
    pclow => %CFG_DEBUG_PCLOW%,
659
    dsuenable => %CONFIG_DSU_ENABLE%[b], dsutrace => %CONFIG_DSU_TRACEBUF%[b], dsumixed => %CONFIG_DSU_MIXED_TRACE%[b],
660
    dsudpram => %CONFIG_SYN_TRACE_DPRAM%[b], tracelines => %CFG_DSU_TRACE_SZ%);
661
 
662
  constant boot_%CONFIG_CFG_NAME% : boot_config_type := (boot => %CFG_BOOT_SOURCE%, ramrws => %CONFIG_BOOT_RWS%,
663
    ramwws => %CONFIG_BOOT_WWS%, sysclk => %CONFIG_BOOT_SYSCLK%, baud => %CONFIG_BOOT_BAUDRATE%,
664
    extbaud => %CONFIG_BOOT_EXTBAUD%[b], pabits => %CONFIG_BOOT_PROMABITS%);
665
 
666
  constant pci_%CONFIG_CFG_NAME% : pci_config_type := (
667
    pcicore => %CFG_PCI_CORE% , ahbmasters => %pciahbmst%, ahbslaves => %pciahbslv%,
668
    arbiter => %CONFIG_PCI_ARBEN%[b], fixpri => false, prilevels => 4, pcimasters => 4,
669
    vendorid => 16#%CONFIG_PCI_VENDORID_4%#, deviceid => 16#%CONFIG_PCI_DEVICEID_4%#, 
670
    subsysid => 16#%CONFIG_PCI_SUBSYSID%#,
671
    revisionid => 16#%CONFIG_PCI_REVID_2%#, classcode =>16#%CONFIG_PCI_CLASSCODE_6%#, pmepads => %CONFIG_PCI_PMEPADS%[b],
672
    p66pad => %CONFIG_PCI_P66PAD%[b], pcirstall => %CONFIG_PCI_RESETALL%[b]);
673
 
674
  constant irq2cfg : irq2type := irq2none;
675
 
676
-----------------------------------------------------------------------------
677
-- end of automatic configuration
678
-----------------------------------------------------------------------------
679
 
680
end leon_device;
681
 
682
SPARC_CONFIG_END
683
 
684
$sparc_config_file_v =<<SPARC_CONFIG_V_END;
685
 
686
`define HEADER_VENDOR_ID    16'h%CONFIG_PCI_VENDORID_4%
687
`define HEADER_DEVICE_ID    16'h%CONFIG_PCI_DEVICEID_4%
688
`define HEADER_REVISION_ID  8'h%CONFIG_PCI_REVID_2%
689
 
690
`define ETH_WISHBONE_B3
691
 
692
`define ETH_TX_FIFO_CNT_WIDTH  %CONFIG_ETH_TXFIFO%_log2%
693
`define ETH_TX_FIFO_DEPTH      %CONFIG_ETH_TXFIFO%
694
 
695
`define ETH_RX_FIFO_CNT_WIDTH  %CONFIG_ETH_RXFIFO_log2%
696
`define ETH_RX_FIFO_DEPTH      %CONFIG_ETH_RXFIFO%
697
 
698
`define ETH_BURST_CNT_WIDTH    %CONFIG_ETH_BURST_log2%
699
`define ETH_BURST_LENGTH       %CONFIG_ETH_BURST%
700
 
701
SPARC_CONFIG_V_END
702
 
703
 
704
 
705
$sparc_config_file_v2 =<<SPARC_CONFIG_V2_END;
706
 
707
`define FPGA
708
`define XILINX
709
`define WBW_ADDR_LENGTH 7
710
`define WBR_ADDR_LENGTH 7
711
`define PCIW_ADDR_LENGTH 7
712
`define PCIR_ADDR_LENGTH 7
713
`define PCI_FIFO_RAM_ADDR_LENGTH 8
714
`define WB_FIFO_RAM_ADDR_LENGTH 8
715
 
716
 
717
SPARC_CONFIG_V2_END
718
 
719
$sparc_config_file_v3 =<<SPARC_CONFIG_V3_END;
720
 
721
`define WB_RAM_DONT_SHARE
722
`define PCI_RAM_DONT_SHARE
723
`define WBW_ADDR_LENGTH %CFG_PCI_FIFO%
724
`define WBR_ADDR_LENGTH %CFG_PCI_FIFO%
725
`define PCIW_ADDR_LENGTH %CFG_PCI_FIFO%
726
`define PCIR_ADDR_LENGTH %CFG_PCI_FIFO%
727
`define PCI_FIFO_RAM_ADDR_LENGTH %CFG_PCI_FIFO%
728
`define WB_FIFO_RAM_ADDR_LENGTH %CFG_PCI_FIFO%
729
 
730
SPARC_CONFIG_V3_END
731
 
732
 
733
1;
734
 
735
 
736
 
737
 
738
 
739
 
740
 
741
 
742
 
743
 
744
 
745
 

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