1 |
2 |
tarookumic |
onerror {resume}
|
2 |
|
|
quietly WaveActivateNextPane {} 0
|
3 |
|
|
add wave -noupdate -divider -height 50 IMSTG
|
4 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/clk
|
5 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/i.pstate.hold_r.hold
|
6 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/i.pstate.nextinsn_v
|
7 |
|
|
add wave -noupdate -format Logic -label i.flush_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/i.flush_v
|
8 |
|
|
add wave -noupdate -divider out
|
9 |
|
|
add wave -noupdate -format Literal -label o.tofe_addrphy_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/o.tofe_addrphy_v
|
10 |
|
|
add wave -noupdate -divider branch
|
11 |
|
|
add wave -noupdate -format Logic -label i.branch_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/i.branch_v
|
12 |
|
|
add wave -noupdate -format Literal -label i.addrvir_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/i.addrvir_v
|
13 |
|
|
add wave -noupdate -divider { }
|
14 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/rst
|
15 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/i
|
16 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/o
|
17 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/r
|
18 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/c
|
19 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/rdbg
|
20 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/imstg0/cdbg
|
21 |
|
|
add wave -noupdate -divider -height 50 FESTG
|
22 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/clk
|
23 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/i.pstate.hold_r.hold
|
24 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/i.pstate.nextinsn_v
|
25 |
|
|
add wave -noupdate -format Logic -label i.flush_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/i.flush_v
|
26 |
|
|
add wave -noupdate -divider icache
|
27 |
|
|
add wave -noupdate -format Literal -label ico.data -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/i.ico.dat_line_v.data
|
28 |
|
|
add wave -noupdate -format Logic -label ico.mstrobe -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/i.ico.mstrobe
|
29 |
|
|
add wave -noupdate -format Literal -label ici.pc_r -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/o.ici.pc_r
|
30 |
|
|
add wave -noupdate -format Logic -label ici.annul -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/o.ici.annul
|
31 |
|
|
add wave -noupdate -divider out
|
32 |
|
|
add wave -noupdate -format Literal -label .tode_insn_r -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/o.tode_insn_r
|
33 |
|
|
add wave -noupdate -divider { }
|
34 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/rst
|
35 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/i
|
36 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/o
|
37 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/r
|
38 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/c
|
39 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/rdbg
|
40 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/festg0/cdbg
|
41 |
|
|
add wave -noupdate -divider -height 50 DESTG
|
42 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/clk
|
43 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/i.pstate.hold_r.hold
|
44 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/i.pstate.nextinsn_v
|
45 |
|
|
add wave -noupdate -format Logic -label i.flush_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/i.flush_v
|
46 |
|
|
add wave -noupdate -divider out
|
47 |
|
|
add wave -noupdate -format Literal -label o.todr_insn_r -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/o.todr_insn_r
|
48 |
|
|
add wave -noupdate -divider { }
|
49 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/rst
|
50 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/i
|
51 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/o
|
52 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/r
|
53 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/c
|
54 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/rdbg
|
55 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/destg0/cdbg
|
56 |
|
|
add wave -noupdate -divider -height 50 DRSTG
|
57 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/clk
|
58 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/i.pstate.hold_r.hold
|
59 |
|
|
add wave -noupdate -format Logic -label i.flush_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/i.flush_v
|
60 |
|
|
add wave -noupdate -format Literal -label r.pc_8 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/i.fromde_insn_r.insn.pc_8
|
61 |
|
|
add wave -noupdate -format Literal -label r.decinsn -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/i.fromde_insn_r.insn.decinsn
|
62 |
|
|
add wave -noupdate -format Logic -label o.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.nextinsn_v
|
63 |
|
|
add wave -noupdate -divider cmd
|
64 |
|
|
add wave -noupdate -format Literal -label r.cnt -radix decimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/r.cnt
|
65 |
|
|
add wave -noupdate -format Logic -label i.fromrr_nextmicro_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/i.fromrr_nextmicro_v
|
66 |
|
|
add wave -noupdate -format Literal -label t.ctrli -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cdbg.dbg.ctrli
|
67 |
|
|
add wave -noupdate -format Literal -label t.ctrlo -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cdbg.dbg.ctrlo
|
68 |
|
|
add wave -noupdate -format Literal -label t.pctrl -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cdbg.dbg.pctrl
|
69 |
|
|
add wave -noupdate -divider {micro out}
|
70 |
|
|
add wave -noupdate -format Logic -label .r1_valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.torr_micro_v.r1_valid
|
71 |
|
|
add wave -noupdate -format Literal -label .r1 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.torr_micro_v.r1
|
72 |
|
|
add wave -noupdate -format Logic -label .r2_valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.torr_micro_v.r2_valid
|
73 |
|
|
add wave -noupdate -format Literal -label .r2 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.torr_micro_v.r2
|
74 |
|
|
add wave -noupdate -format Literal -label .rd -radix decimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.torr_micro_v.pctrl.wr.wrop_rd
|
75 |
|
|
add wave -noupdate -format Logic -label .rd_valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.torr_micro_v.pctrl.wr.wrop_rdvalid
|
76 |
|
|
add wave -noupdate -format Literal -label o.torr_micro_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o.torr_micro_v
|
77 |
|
|
add wave -noupdate -divider { }
|
78 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/rst
|
79 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/i
|
80 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/o
|
81 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/r
|
82 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/c
|
83 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/rdbg
|
84 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cdbg
|
85 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdali
|
86 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdalo
|
87 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdsri
|
88 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdsro
|
89 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdldi
|
90 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdldo
|
91 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdsti
|
92 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdsto
|
93 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdlmi
|
94 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdlmo
|
95 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdsmi
|
96 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdsmo
|
97 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdswi
|
98 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdswo
|
99 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdcri
|
100 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdcro
|
101 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdcli
|
102 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdcso
|
103 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdcsi
|
104 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdclo
|
105 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdbli
|
106 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/drstg0/cmdblo
|
107 |
|
|
add wave -noupdate -divider -height 50 RRSTG
|
108 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/clk
|
109 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/i.pstate.hold_r.hold
|
110 |
|
|
add wave -noupdate -format Logic -label .valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.pctrl.valid
|
111 |
|
|
add wave -noupdate -format Literal -label r.pc_8 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.pctrl.insn.pc_8
|
112 |
|
|
add wave -noupdate -format Literal -label r.decinsn -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.pctrl.insn.decinsn
|
113 |
|
|
add wave -noupdate -format Logic -label o.todr_nextmicro_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/o.todr_nextmicro_v
|
114 |
|
|
add wave -noupdate -divider write
|
115 |
|
|
add wave -noupdate -format Literal -label .fromwr_rd_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/i.fromwr_rd_v
|
116 |
|
|
add wave -noupdate -format Logic -label .fromwr_rd_valid_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/i.fromwr_rd_valid_v
|
117 |
|
|
add wave -noupdate -format Literal -label .fromwr_rd_data_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/i.fromwr_rd_data_v
|
118 |
|
|
add wave -noupdate -divider lock
|
119 |
|
|
add wave -noupdate -format Logic -label t.lock -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg.dbg.lock
|
120 |
|
|
add wave -noupdate -format Logic -label t.lock_cpsr -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg.dbg.lock_cpsr
|
121 |
|
|
add wave -noupdate -format Logic -label t.lock_reg -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg.dbg.lock_reg
|
122 |
|
|
add wave -noupdate -divider forward
|
123 |
|
|
add wave -noupdate -format Literal -label t.fwr1b -radix binary /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg.dbg.fwr1b
|
124 |
|
|
add wave -noupdate -format Literal -label t.fwr2b -radix binary /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg.dbg.fwr2b
|
125 |
|
|
add wave -noupdate -format Literal -label t.fwr1i -radix decimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg.dbg.fwr1i
|
126 |
|
|
add wave -noupdate -format Literal -label t.fwr2i -radix decimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg.dbg.fwr2i
|
127 |
|
|
add wave -noupdate -format Literal -label {.rsop_op2_src fwd } -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/o.tors_pctrl_v.rs.rsop_op2_src
|
128 |
|
|
add wave -noupdate -divider { registers}
|
129 |
|
|
add wave -noupdate -format Logic -label r.r1_valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.r1_valid
|
130 |
|
|
add wave -noupdate -format Literal -label r.r1 -radix decimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.r1
|
131 |
|
|
add wave -noupdate -format Logic -label r.r2_valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.r2_valid
|
132 |
|
|
add wave -noupdate -format Literal -label r.r2 -radix decimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.r2
|
133 |
|
|
add wave -noupdate -divider out
|
134 |
|
|
add wave -noupdate -format Literal -label o.data1 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/o.pctrl_r.data1
|
135 |
|
|
add wave -noupdate -format Literal -label o.data2 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/o.pctrl_r.data2
|
136 |
|
|
add wave -noupdate -divider { }
|
137 |
|
|
add wave -noupdate -format Literal -label r.pctrl -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r.micro.pctrl
|
138 |
|
|
add wave -noupdate -format Literal -label o.tors_pctrl_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/o.tors_pctrl_v
|
139 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/rst
|
140 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/clkn
|
141 |
|
|
add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/i
|
142 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/o
|
143 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/r
|
144 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/c
|
145 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/rdbg
|
146 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/cdbg
|
147 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/rfi
|
148 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rrstg0/rfo
|
149 |
|
|
add wave -noupdate -divider -height 50 RSSTG
|
150 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/clk
|
151 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/i.pstate.hold_r.hold
|
152 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/i.pstate.nextinsn_v
|
153 |
|
|
add wave -noupdate -format Logic -label .valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.valid
|
154 |
|
|
add wave -noupdate -format Literal -label r.pc_8 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.insn.pc_8
|
155 |
|
|
add wave -noupdate -format Literal -label r.decinsn -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.insn.decinsn
|
156 |
|
|
add wave -noupdate -divider shiefter
|
157 |
|
|
add wave -noupdate -format Literal -label r.rsop_styp -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.rs.rsop_styp
|
158 |
|
|
add wave -noupdate -format Literal -label r.rsop_sdir -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.rs.rsop_sdir
|
159 |
|
|
add wave -noupdate -format Literal -label r.data1 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.data1
|
160 |
|
|
add wave -noupdate -format Literal -label r.data2 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.data2
|
161 |
|
|
add wave -noupdate -format Logic -label i.carry -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/i.pstate.fromex_cpsr_r.ex.c
|
162 |
|
|
add wave -noupdate -format Literal -label t.shieftout -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/cdbg.dbg.shieftout
|
163 |
|
|
add wave -noupdate -format Logic -label t.shieftcarryout -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/c.pctrl.rs.rs_shieftcarryout
|
164 |
|
|
add wave -noupdate -divider out
|
165 |
|
|
add wave -noupdate -format Literal -label r.rsop_op1_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.rs.rsop_op1_src
|
166 |
|
|
add wave -noupdate -format Literal -label r.rsop_op2_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.rs.rsop_op2_src
|
167 |
|
|
add wave -noupdate -format Literal -label r.rsop_buf1_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.rs.rsop_buf1_src
|
168 |
|
|
add wave -noupdate -format Literal -label r.rsop_buf2_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl.rs.rsop_buf2_src
|
169 |
|
|
add wave -noupdate -format Literal -label o.data1 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/o.toex_pctrl_v.data1
|
170 |
|
|
add wave -noupdate -format Literal -label o.data2 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/o.toex_pctrl_v.data2
|
171 |
|
|
add wave -noupdate -divider { }
|
172 |
|
|
add wave -noupdate -format Literal -label .pctrl -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r.pctrl
|
173 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/rst
|
174 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/i
|
175 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/o
|
176 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/r
|
177 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/c
|
178 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/rdbg
|
179 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/rsstg0/cdbg
|
180 |
|
|
add wave -noupdate -divider -height 50 EXSTG
|
181 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/clk
|
182 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/i.pstate.hold_r.hold
|
183 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/i.pstate.nextinsn_v
|
184 |
|
|
add wave -noupdate -format Logic -label .valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl.valid
|
185 |
|
|
add wave -noupdate -format Literal -label r.pc_8 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl.insn.pc_8
|
186 |
|
|
add wave -noupdate -format Literal -label r.decinsn -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl.insn.decinsn
|
187 |
|
|
add wave -noupdate -divider aluop
|
188 |
|
|
add wave -noupdate -format Literal -label r.dbgaluop -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/cdbg.dbg.dbgaluop
|
189 |
|
|
add wave -noupdate -format Literal -label r.data1 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl.data1
|
190 |
|
|
add wave -noupdate -format Literal -label r.data2 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl.data2
|
191 |
|
|
add wave -noupdate -format Literal -label t.result -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/cdbg.dbg.result
|
192 |
|
|
add wave -noupdate -divider adder
|
193 |
|
|
add wave -noupdate -format Logic -label .add_use -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/cdbg.dbg.add_use
|
194 |
|
|
add wave -noupdate -format Logic -label .add_carry -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/cdbg.dbg.add_carry
|
195 |
|
|
add wave -noupdate -format Logic -label .add_issub -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/cdbg.dbg.add_issub
|
196 |
|
|
add wave -noupdate -divider cpsr
|
197 |
|
|
add wave -noupdate -format Literal -label r.cpsr -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.cpsr
|
198 |
|
|
add wave -noupdate -format Literal -label t.newcpsr -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/cdbg.dbg.newcpsr
|
199 |
|
|
add wave -noupdate -format Logic -label r.exop_setcpsr -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl.ex.exop_setcpsr
|
200 |
|
|
add wave -noupdate -divider { out}
|
201 |
|
|
add wave -noupdate -format Literal -label r.exop_data_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl.ex.exop_data_src
|
202 |
|
|
add wave -noupdate -format Literal -label o.data1 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/o.todm_pctrl_v.data1
|
203 |
|
|
add wave -noupdate -format Literal -label o.data2 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/o.todm_pctrl_v.data2
|
204 |
|
|
add wave -noupdate -divider Branching
|
205 |
|
|
add wave -noupdate -format Logic -label o.toim_branch_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/o.toim_branch_v
|
206 |
|
|
add wave -noupdate -format Literal -label o.alures_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/o.alures_v
|
207 |
|
|
add wave -noupdate -divider { }
|
208 |
|
|
add wave -noupdate -format Literal -label .pctrl -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r.pctrl
|
209 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/rst
|
210 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/i
|
211 |
|
|
add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/o
|
212 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/r
|
213 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/c
|
214 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/rdbg
|
215 |
|
|
add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/exstg0/cdbg
|
216 |
|
|
add wave -noupdate -divider -height 50 DMSTG
|
217 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/clk
|
218 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/i.pstate.hold_r.hold
|
219 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/i.pstate.nextinsn_v
|
220 |
|
|
add wave -noupdate -format Literal -label r.pc_8 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/r.pctrl.insn.pc_8
|
221 |
|
|
add wave -noupdate -format Literal -label r.decinsn -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/r.pctrl.insn.decinsn
|
222 |
|
|
add wave -noupdate -divider { }
|
223 |
|
|
add wave -noupdate -divider { }
|
224 |
|
|
add wave -noupdate -format Literal -label .pctrl -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/r.pctrl
|
225 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/rst
|
226 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/i
|
227 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/o
|
228 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/r
|
229 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/c
|
230 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/rdbg
|
231 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/dmstg0/cdbg
|
232 |
|
|
add wave -noupdate -divider -height 50 MESTG
|
233 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/clk
|
234 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/i.pstate.hold_r.hold
|
235 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/i.pstate.nextinsn_v
|
236 |
|
|
add wave -noupdate -format Logic -label .valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r.pctrl.valid
|
237 |
|
|
add wave -noupdate -format Logic -label .flush_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/i.flush_v
|
238 |
|
|
add wave -noupdate -format Literal -label r.pc_8 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r.pctrl.insn.pc_8
|
239 |
|
|
add wave -noupdate -format Literal -label r.decinsn -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r.pctrl.insn.decinsn
|
240 |
|
|
add wave -noupdate -divider load/store
|
241 |
|
|
add wave -noupdate -format Logic -label r.meop_enable -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r.pctrl.me.meop_enable
|
242 |
|
|
add wave -noupdate -format Literal -label r.meop_param -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r.pctrl.me.meop_param
|
243 |
|
|
add wave -noupdate -format Literal -label {r.addr (data1)} -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r.pctrl.data1
|
244 |
|
|
add wave -noupdate -format Literal -label {r.data (dmstg)} -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/o.dci.data_re
|
245 |
|
|
add wave -noupdate -divider dcache
|
246 |
|
|
add wave -noupdate -format Logic -label dci.annul -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/o.dci.annul
|
247 |
|
|
add wave -noupdate -divider { }
|
248 |
|
|
add wave -noupdate -format Literal -label .pctrl -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r.pctrl
|
249 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/rst
|
250 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/i
|
251 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/o
|
252 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/r
|
253 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/c
|
254 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/rdbg
|
255 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/mestg0/cdbg
|
256 |
|
|
add wave -noupdate -divider -height 50 WRSTG
|
257 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/clk
|
258 |
|
|
add wave -noupdate -format Logic -label i.hold -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/i.pstate.hold_r.hold
|
259 |
|
|
add wave -noupdate -format Logic -label i.nextinsn_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/i.pstate.nextinsn_v
|
260 |
|
|
add wave -noupdate -format Logic -label .valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.pctrl.valid
|
261 |
|
|
add wave -noupdate -format Literal -label r.pc_8 -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.pctrl.insn.pc_8
|
262 |
|
|
add wave -noupdate -format Literal -label r.decinsn -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.pctrl.insn.decinsn
|
263 |
|
|
add wave -noupdate -divider { }
|
264 |
|
|
add wave -noupdate -format Literal -label r.wrop_rd -radix decimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.pctrl.wr.wrop_rd
|
265 |
|
|
add wave -noupdate -format Logic -label r.wrop_rdvalid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.pctrl.wr.wrop_rdvalid
|
266 |
|
|
add wave -noupdate -divider Branching
|
267 |
|
|
add wave -noupdate -format Logic -label o.toim_branch_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/o.toim_branch_v
|
268 |
|
|
add wave -noupdate -format Literal -label o.toim_branchaddr_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/o.toim_branchaddr_v
|
269 |
|
|
add wave -noupdate -divider {CPSR SPSR}
|
270 |
|
|
add wave -noupdate -format Literal -label o.toex_cpsr_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/o.toex_cpsr_v
|
271 |
|
|
add wave -noupdate -format Logic -label o.toex_cpsrset_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/o.toex_cpsrset_v
|
272 |
|
|
add wave -noupdate -format Literal -label r.spsr -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.spsr
|
273 |
|
|
add wave -noupdate -format Literal -label r.pctrl.ex_cpsr -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.pctrl.ex.ex_cpsr
|
274 |
|
|
add wave -noupdate -divider DCACHE
|
275 |
|
|
add wave -noupdate -format Logic -label dco.me_mexc -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/i.dco.me_mexc
|
276 |
|
|
add wave -noupdate -format Literal -label dco.wr_data -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/i.dco.wr_data
|
277 |
|
|
add wave -noupdate -divider { }
|
278 |
|
|
add wave -noupdate -format Literal -label .pctrl -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r.pctrl
|
279 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/rst
|
280 |
|
|
add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/i
|
281 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/o
|
282 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/r
|
283 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/c
|
284 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/rdbg
|
285 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/arm0/wrstg0/cdbg
|
286 |
|
|
TreeUpdate [SetDefaultTree]
|
287 |
|
|
WaveRestoreCursors {8860 ns}
|
288 |
|
|
WaveRestoreZoom {8603 ns} {9503 ns}
|
289 |
|
|
configure wave -namecolwidth 150
|
290 |
|
|
configure wave -valuecolwidth 100
|
291 |
|
|
configure wave -justifyvalue left
|
292 |
|
|
configure wave -signalnamewidth 0
|
293 |
|
|
configure wave -snapdistance 10
|
294 |
|
|
configure wave -datasetprefix 0
|