| 1 |
2 |
tarookumic |
onerror {resume}
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| 2 |
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quietly WaveActivateNextPane {} 0
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| 3 |
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add wave -noupdate -divider -height 30 DCACHE
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| 4 |
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/clk
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| 5 |
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add wave -noupdate -divider { }
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| 6 |
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add wave -noupdate -format Literal -label .state -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/r.state
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| 7 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/hold
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| 8 |
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add wave -noupdate -format Logic -label .hit -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.hit
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| 9 |
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add wave -noupdate -format Logic -label .valid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.valid
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| 10 |
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add wave -noupdate -format Logic -label .dirty -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.dirty
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| 11 |
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add wave -noupdate -format Logic -label .req -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.req
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| 12 |
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add wave -noupdate -divider in
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| 13 |
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add wave -noupdate -format Literal -label .addr_re -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/i.addr_re
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| 14 |
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add wave -noupdate -format Literal -label .data_re -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/i.data_re
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| 15 |
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add wave -noupdate -format Logic -label .read -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/i.param_r.read
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| 16 |
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add wave -noupdate -format Literal -label .param_r -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/i.param_r
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| 17 |
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add wave -noupdate -divider out
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| 18 |
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add wave -noupdate -format Literal -label .wr_data -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/o.wr_data
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| 19 |
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add wave -noupdate -divider {Cachemem in}
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| 20 |
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add wave -noupdate -format Literal -label .addr -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmi.addr
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| 21 |
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add wave -noupdate -format Literal -label .tag_line -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmi.tag_line
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| 22 |
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add wave -noupdate -format Literal -label .tag_write -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmi.tag_write
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| 23 |
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add wave -noupdate -format Literal -label .dat_line -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmi.dat_line
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| 24 |
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add wave -noupdate -format Literal -label .dat_write -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmi.dat_write
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| 25 |
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add wave -noupdate -divider {Cachemem out}
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| 26 |
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add wave -noupdate -format Literal -label .tag_line -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmo.tag_line
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| 27 |
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add wave -noupdate -format Literal -label .dat_line -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmo.dat_line
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| 28 |
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add wave -noupdate -divider Writeback
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| 29 |
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add wave -noupdate -format Literal -label r.dirty -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/r.dirty
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| 30 |
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add wave -noupdate -format Literal -label t.linepos -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.linepos
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| 31 |
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add wave -noupdate -format Literal -label t.linepos_lastbit -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.linepos_lastbit
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| 32 |
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add wave -noupdate -format Literal -label si.data -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/si.data
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| 33 |
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add wave -noupdate -format Literal -label so.res -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/so.res
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| 34 |
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add wave -noupdate -format Logic -label r.wbready -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/r.wbready
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| 35 |
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add wave -noupdate -format Logic -label r.wbnext -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/r.wbnext
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| 36 |
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add wave -noupdate -format Literal -label wbi.fifo_entry -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/wbi.fifo_entry
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| 37 |
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add wave -noupdate -format Logic -label wbi.fifo_write -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/wbi.fifo_write
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| 38 |
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add wave -noupdate -format Logic -label wbo.fifo_stored_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/wbo.fifo_stored_v
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| 39 |
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add wave -noupdate -divider SETS
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| 40 |
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add wave -noupdate -format Literal -label t.set -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.set
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| 41 |
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add wave -noupdate -format Literal -label t.setrep -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.setrep
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| 42 |
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add wave -noupdate -format Literal -label r.setrep -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/r.setrep
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| 43 |
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add wave -noupdate -format Literal -label t.sethit -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.sethit
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| 44 |
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add wave -noupdate -format Literal -label t.setvalid -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.setvalid
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| 45 |
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add wave -noupdate -format Literal -label t.sr_setfree -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.sr_setfree
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| 46 |
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add wave -noupdate -format Literal -label t.sr_setlock -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.sr_setlock
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| 47 |
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add wave -noupdate -format Logic -label t.sr_useset -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.sr_useset
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| 48 |
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add wave -noupdate -format Logic -label sro.sr_locked -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_locked
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| 49 |
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add wave -noupdate -format Logic -label sro.sr_free -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_free
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| 50 |
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add wave -noupdate -format Literal -label sro.sr_setrep_free -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_setrep_free
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| 51 |
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add wave -noupdate -format Literal -label sro.sr_setrep_repl -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_setrep_repl
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| 52 |
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add wave -noupdate -divider Multiplex
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| 53 |
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add wave -noupdate -format Literal -label .cmaddr_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.cmaddr_src
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| 54 |
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add wave -noupdate -format Literal -label .datain_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.datain_src
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| 55 |
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add wave -noupdate -format Literal -label .tvalid_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.tvalid_src
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| 56 |
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add wave -noupdate -format Literal -label .tdirty_src -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg.dbg.tdirty_src
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| 57 |
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add wave -noupdate -divider { }
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| 58 |
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add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/i
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| 59 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/o
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| 60 |
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/rst
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| 61 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/ctrl
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| 62 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmo
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| 63 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/dcmi
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| 64 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/wbi
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| 65 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/wbo
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| 66 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/r
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| 67 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/c
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| 68 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/rdbg
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| 69 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/si
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| 70 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/so
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| 71 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_setfree
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| 72 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_setlock
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| 73 |
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_useset
|
| 74 |
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_locked
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| 75 |
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_free
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| 76 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_setrep_free
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| 77 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/sr_setrep_repl
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| 78 |
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add wave -noupdate -divider -height 50 COUNTER
|
| 79 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cdbg
|
| 80 |
|
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/rst
|
| 81 |
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/clk
|
| 82 |
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add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/si
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| 83 |
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add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/so
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| 84 |
|
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/r
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| 85 |
|
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/c
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| 86 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/rdbg
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| 87 |
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/dc0/cnt0/cdbg
|
| 88 |
|
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add wave -noupdate -divider -height 50 {WRITE BUFFER}
|
| 89 |
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/clk
|
| 90 |
|
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add wave -noupdate -divider in
|
| 91 |
|
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add wave -noupdate -format Logic -label .fifo_write -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/i.fifo_write
|
| 92 |
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add wave -noupdate -format Literal -label .fifo_entry -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/i.fifo_entry
|
| 93 |
|
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add wave -noupdate -divider AMBA
|
| 94 |
|
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add wave -noupdate -format Logic -label o.req -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbi.req
|
| 95 |
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add wave -noupdate -format Logic -label o.read -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbi.read
|
| 96 |
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add wave -noupdate -format Literal -label o.address -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbi.address
|
| 97 |
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add wave -noupdate -format Logic -label i.ready -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbo.ready
|
| 98 |
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add wave -noupdate -format Logic -label i.grant -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbo.grant
|
| 99 |
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add wave -noupdate -format Literal -label i.data -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbo.data
|
| 100 |
|
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add wave -noupdate -divider out
|
| 101 |
|
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add wave -noupdate -format Logic -label .fifo_stored_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/o.fifo_stored_v
|
| 102 |
|
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add wave -noupdate -format Logic -label .empty_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/o.empty_v
|
| 103 |
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add wave -noupdate -divider { }
|
| 104 |
|
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/rst
|
| 105 |
|
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/i
|
| 106 |
|
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/o
|
| 107 |
|
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add wave -noupdate -format Literal -radix hexadecimal -expand /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbo
|
| 108 |
|
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/mcwbi
|
| 109 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/r
|
| 110 |
|
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/c
|
| 111 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/rdbg
|
| 112 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/cdbg
|
| 113 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/wbfifoi
|
| 114 |
|
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/wbfifoo
|
| 115 |
|
|
add wave -noupdate -divider -height 50 {WB FIFO}
|
| 116 |
|
|
add wave -noupdate -format Logic /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/clk
|
| 117 |
|
|
add wave -noupdate -divider in
|
| 118 |
|
|
add wave -noupdate -format Literal -label .fifo_entry -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/i.fifo_entry
|
| 119 |
|
|
add wave -noupdate -format Logic -label .fifo_read -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/i.fifo_read
|
| 120 |
|
|
add wave -noupdate -format Logic -label .fifo_write -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/i.fifo_write
|
| 121 |
|
|
add wave -noupdate -divider out
|
| 122 |
|
|
add wave -noupdate -format Literal -label .fifo_entry -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/o.fifo_entry
|
| 123 |
|
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add wave -noupdate -format Logic -label .fifo_stored_v -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/o.fifo_stored_v
|
| 124 |
|
|
add wave -noupdate -format Logic -label .fifo_empty_r -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/o.fifo_empty_r
|
| 125 |
|
|
add wave -noupdate -divider { }
|
| 126 |
|
|
add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/rst
|
| 127 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/i
|
| 128 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/o
|
| 129 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/r
|
| 130 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/c
|
| 131 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/rdbg
|
| 132 |
|
|
add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/socarm/arm0/cache0/wb0/gfifo0/fifo0/cdbg
|
| 133 |
|
|
add wave -noupdate -divider { }
|
| 134 |
|
|
TreeUpdate [SetDefaultTree]
|
| 135 |
|
|
WaveRestoreCursors {10886 ns}
|
| 136 |
|
|
WaveRestoreZoom {10058 ns} {11490 ns}
|
| 137 |
|
|
configure wave -namecolwidth 150
|
| 138 |
|
|
configure wave -valuecolwidth 100
|
| 139 |
|
|
configure wave -justifyvalue left
|
| 140 |
|
|
configure wave -signalnamewidth 0
|
| 141 |
|
|
configure wave -snapdistance 10
|
| 142 |
|
|
configure wave -datasetprefix 0
|
