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URL https://opencores.org/ocsvn/core_arm/core_arm/trunk

Subversion Repositories core_arm

[/] [core_arm/] [trunk/] [vsim/] [mctrl] - Blame information for rev 2

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Line No. Rev Author Line
1 2 tarookumic
onerror {resume}
2
quietly WaveActivateNextPane {} 0
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add wave -noupdate -divider -height 50 MCTRL
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add wave -noupdate -divider {Cfg registers}
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add wave -noupdate -format Logic -label .psel -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/apbi.psel
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add wave -noupdate -format Literal -label .paddr -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/apbi.paddr
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add wave -noupdate -format Literal -label .mcfg1 -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/r.mcfg1
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add wave -noupdate -format Literal -label .mcfg2 -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/r.mcfg2
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add wave -noupdate -divider Amba
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/ahbsi
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/ahbso
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add wave -noupdate -divider { }
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/rst
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/clk
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/memi
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/memo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/apbi
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/apbo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/pioo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/wpo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sdo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/mctrlo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/r
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/ri
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/wrnout
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/promdata
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sdmo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sdi
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sdapbo
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add wave -noupdate -divider -height 50 {SDRAM Ctrl}
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add wave -noupdate -divider {CFG register}
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add wave -noupdate -format Logic -label .psel -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/apbi.psel
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add wave -noupdate -format Literal -label .paddr -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/apbi.paddr
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add wave -noupdate -format Literal -label .cfg -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/r.cfg
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add wave -noupdate -divider { }
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/rst
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add wave -noupdate -format Logic -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/clk
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/sdi
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/sdo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/apbi
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/apbo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/wpo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/sdmo
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/r
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add wave -noupdate -format Literal -radix hexadecimal /tbench_config/tb0/c0/carm0/mctrl0/sd0/sdctrl/ri
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {3378 ns}
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WaveRestoreZoom {6303 ns} {8719 ns}
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configure wave -namecolwidth 150
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configure wave -valuecolwidth 100
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configure wave -justifyvalue left
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configure wave -signalnamewidth 0
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configure wave -snapdistance 10
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configure wave -datasetprefix 0

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