Subversion Repositories cpu16

module shifter (

        a,

        b,

        n_in,

        v_in,

        z_in,

        c_in,

        distance,

        func,

        result,

        n,

        v,

        z,

        c

        );

        input signed [15:0] a,b;

        input n_in;

        input v_in;

        input z_in;

        input c_in;

        input [3:0] distance;

        input [1:0] func;

        output [15:0] result;

        output n,v,z,c;

        // hack / workaround to make sure carry / msb gets propagated correctly

        wire signed [16:0] x = { a, c_in };

        reg [15:0] result;

        reg result_c;

        always @(*)

                case(func)

                        2'd0 : { result_c, result } = { c_in, b };      // mov / lui

                        2'd1 : { result, result_c } = x >>> distance;   // sra

                        default : { result_c, result } = { c_in, a } << distance;       // sll

                endcase

        // flags

        reg n,v,z,c;

        always @(*)

                begin

                        if ( func )

                                begin   // shifts update accordingly

                                        n = result[15];

                                        z = ~|result;

                                        c = result_c;

                                        v = a[15] ^ result[15];

                                end

                        else    // mov / lui don't change flags as they're frequently used to create literals / masks / addresses

                                begin

                                        n = n_in;

                                        v = v_in;

                                        z = z_in;

                                        c = c_in;

                                end

                end

endmodule