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samiam9512 |
8080 Compatible CPU: Overview
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Details
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Name: cpu8080
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Created: 04-Oct-2006 23:44:45
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Updated: 06-Oct-2006 22:16:26
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Project maintainer
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Scott A. Moore
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Description
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This is an 8080 core I created as a project to get to know Verilog.
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The 8080 was the second in the series 8008->8080->Z80. It was the first
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commercially available single chip CPU (disregarding the required clock and
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demultiplexor chips). Besides being an interesting project, it also can serve as
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a very compact core, suitable for a supervisor role on an FPGA with other
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blocks. It has extensive support, all freely available, including assemblers,
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compilers, an operating system (CP/M).
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Although the Z80 is a more popular core due to being a superset of the 8080, the
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Z80 takes considerably more chip real estate. Its likely that more than 50% of
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available software is 8080 only, since the Z80 was often used to run 8080 code.
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For example, the CP/M OS itself was 8080 only code.
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This means that the 8080 can be an attractive core if you want the great support
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of this processor series, but need it to fit in less space.
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The core is fully instruction compatible with 8080, but not signal compatible.
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The original 8080 was a multiplexed nightmare. one of the original selling
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points of the Z80 was its cleanup of the signals, and the 8080 itself had a
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companion chip that demultiplexed it.
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There are a few other similar chips on opencores. This one is a bit different
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because it is only 8080, and is in native Verilog (not a translation). Further,
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the goal was to get it down to the minimum in both source size and synthesized
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size.
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I also suspect there is a preverse advantage to running this core: its original
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manufacturer no longer makes it, or any compatible chip, and it has probally
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passed from any IP protection long ago. However, as usual, Should warn that I
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have not verified any legal status on this processor and do not speak from any
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knowledge or authority on the matter.
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Features
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Instruction set: 8080
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Data size: 8 bit
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Address: 16 bit
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Instruction: 8 bit
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Language: Verilog
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License: BSD
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Created under: Xilinx ISE, free webpack edition
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Device: xc3c1000-4ft256
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Slices: 1104
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Slice flip flops: 296
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4 input LUTs: 2082
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Bonded IOBs: 33
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GCLKs: 1
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The CPU works entirely on positive clock edges and signals, but could be
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reconfigured easily. It has wait state ability, and simple interrupt
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request/acknowledge structure. The original 8080 method of fetching an external
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instruction to satisfy the interrupt is preserved, and it is left up to an
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external interrupt controller to provide vectoring.
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I have no problem with, and in fact encourage, commercial use, modifications
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(public and private), etc.
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Status
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This project was synthesized and simulated, but has not yet been tried on real
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hardware, I am going to obtain a FPGA evaluator board for that step.
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The wait state and interrupt capability, as of this writing, have not been
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verified.
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It includes an elementary test bench with an instruction ROM, and RAM. Each of
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the instructions of the 8080 has been given a walkthrough in simulation, and
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verified to give the correct flags and results. Not all registers have been
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tried with all instructions. The next step is I will make a full instruction
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test that will go through all modes, to be loaded into the testbench rom, then
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simulated, and (hopefully) used to create an automated regression test for the
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CPU.
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I expect to do several more edits to merge code in the CPU in attempts to make
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it use less real estate and less source lines. I also plan to create an interrupt
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controller, select controller and other add-ons towards the goal of a system
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that runs on the target eval board. I am thinking towards running this on the
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eval board, which includes VGA and keyboard boards, as a "virtual Altair" (an
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early home computer using the 8080), that includes a serial I/O emulator and
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enough resources to run CP/M.
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I have no plans to extend the processor after that. The Z80 appears to be well
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served here, so I won't be extending the core to cover that space. The 12
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instructions that remain undefined in the 8080 can be useful to the embedded
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designer to implement custom instructions.
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If the core seems to be written by someone versed in CPU design, but stunningly
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ignorant on Verilog matters, its because that is essentially the situation. I
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used to design ICs at the schematic level, before all this HDL stuff, and
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figgured I would try it out.
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If you can see areas in the design where gates can be saved, by all means let me
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know, and I'll get it put in there.
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Development systems
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There is TONS of software available for the 8080. The best way to go about it is
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to run a CP/M simulator on your host machine. Here are a few:
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http://www.schorn.ch/cpm/intro.html
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http://www.moria.de/~michael/yaze-cpm3/
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For development systems, try these forums:
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http://www.retroarchive.org
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http://www.cpm.z80.de/
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This includes CP/M, assemblers, a basic compiler, the original Microsoft Basic
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interpreter, Fortan compilers, Cobol, C (of course), Pascal, Modula, Algol, and
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Ada.
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You can find a lot more with a simple search.
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CP/M itself is a good, small operating system to run on your target if you wish.
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It can be adapted to your target hardware with a very simple BIOS, which can run
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using a flash memory as the "disk" for it. The entire system fits in less than
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256kb (yes, actually less than a meg), which was the common size of a floppy
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disk back when this CPU was popular.
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Documentation
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Here are some locations that have the original 8080 documentation:
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http://vt100.net/mirror/harte/Intel%208080%20Manual/
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http://www.hartetechnologies.com/manuals/Intel%208080%20Manual/
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http://www.imsai.net/whatsnew.htm
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http://www.classiccmp.org/dunfield/heath/index.htm
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That last link contains the "8080 Assembly language programming manual", which
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is the book that I used to construct cpu8080, from my original coffee stained
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edition, bought in 1977.
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For people interested in the difference between the 8080 and its predecessor,
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the 8008, the following site is available:
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http://www.bitsavers.org/pdf/intel/MCS8/
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Legal notice
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The 8080 CPU implemented here was created as a not for profit student project.
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I don't know if its use will violate patents, copyrights, trademark rights or
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other rights. The source files were created entirely by me, but their use,
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commercial or otherwise, and any legal, consequences that arise, are entirely
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the responsibility of the user. I specifically deny that this core is usable for
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life support systems, or any other system that can or will cause, directly or
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indirectly, any harm to persons or property.
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THESE SOURCE FILES ARE PROVIDED "AS IS" AND WITHOUT ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT
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LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND
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FITNESS FOR A PARTICULAR PURPOSE.
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CVS Format
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The CVS repository is under cpu8080.
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I'll apologize in advance, but repository is basically a dump of my Xilinx ISE
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directory. This is not the clean way to do it, but it does have the advantage
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that if you are running ISE, you can download the entire thing and just go. Here
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is a list of the important files in the directory:
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readme.txt - A copy of this text
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cpu8080.txt - The documentation for the project, in plain ASCII.
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cpu8080.v - The 8080 core
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testbench.v - The testbench for the core. Also contains the peripherals for the
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core, such as the peripheral select controller, the interrupt controller, the
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test ROM, RAM, and anything else required.
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The other files are the testbench running files, like the stimulus package. I
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don't even know what half of them are, sorry, I only started using the system 2
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weeks ago!
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Shameless plug
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For people who want ask me questions, or find out more about what I am doing, my
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information is:
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Email: samiam95124@m...
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Web page: www.moorecad.com
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Disclaimer: The above web page does include commercial content, ads, rants, etc.
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