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[/] [cpu8080/] [trunk/] [project/] [cpu8080_html/] [fit/] [logic_legXbr.htm] - Blame information for rev 33

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<html><body><pre>
I/O Style - OD    - OpenDrain
          - PU    - Pullup
          - KPR   - Keeper
          - S     - SchmittTrigger
          - DG    - DataGate
Reg Use   - LATCH - Transparent latch
          - DFF   - D-flip-flop
          - DEFF  - D-flip-flop with clock enable
          - TFF   - T-flip-flop
          - TDFF  - Dual-edge-triggered T-flip-flop
          - DDFF  - Dual-edge-triggered flip-flop
          - DDEFF - Dual-edge-triggered flip-flop with clock enable
          /S (after any above flop/latch type) indicates initial state is Set
</pre></body></html>

Line No.	Rev	Author	Line
1	2	samiam9512	`<html><body><pre>`
2			`I/O Style - OD - OpenDrain`
3			`- PU - Pullup`
4			`- KPR - Keeper`
5			`- S - SchmittTrigger`
6			`- DG - DataGate`
7			`Reg Use - LATCH - Transparent latch`
8			`- DFF - D-flip-flop`
9			`- DEFF - D-flip-flop with clock enable`
10			`- TFF - T-flip-flop`
11			`- TDFF - Dual-edge-triggered T-flip-flop`
12			`- DDFF - Dual-edge-triggered flip-flop`
13			`- DDEFF - Dual-edge-triggered flip-flop with clock enable`
14			`/S (after any above flop/latch type) indicates initial state is Set`
15			`</pre></body></html>`

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[/] [cpu8080/] [trunk/] [project/] [cpu8080_html/] [fit/] [logic_legXbr.htm] - Blame information for rev 33