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[/] [cpu8080/] [trunk/] [project/] [cpu8080_html/] [fit/] [optionsdoc.htm] - Blame information for rev 33

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<body>
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<h1>Compiler Options</h1>
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<p class="whs1">The Compiler
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 Options page provides all the fitter options settings for the device family
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 the fitter has selected.</p>
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<h1 class="whs2">Fitter Options</h1>
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<p class="whs3"><a href="#Basic Tab"
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                                                                style="font-family: arial, sans-serif; font-size: 10pt;"><span
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 style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">Basic Tab</a></FONT></span></p>
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<p class="whs4"><a href="#XPLA Advanced Options"
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                                                                style="font-family: arial, sans-serif; font-size: 10pt;"><span
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 style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">XPLA3 Advanced
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 Options</a></FONT></span></p>
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<p class="whs5"><a href="#CoolRunner-II Advanced Options"
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                                                                style="font-family: arial, sans-serif; font-size: 10pt;"><span
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 style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">CoolRunner-II
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 Advanced Options</a></FONT></span></p>
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<p class="whs6"><a href="#XC9500/XL/XV Advanced Options"
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                                                                style="font-family: arial, sans-serif; font-size: 10pt;">XC9500/XL/XV
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 Advanced Options</a></p>
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<h2 class="whs7"><a name="Basic Tab"></a>Basic
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 Tab</h2>
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<p class=whs1
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        style="font-family: arial, sans-serif; font-size: 10pt;">The CPLD devices
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 have the following fitter <span style="font-weight: bold;"><B><b>Implementation
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 Options </B></span><span style="font-weight: bold;"><B>available</B></span></b> in
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 the <span style="font-weight: bold;"><B>Basic</B></span> tab:</p>
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<ul>
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        <li class=kadov-h4><h4 class="whs8">Use
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 Multi-Level Logic Optimization</h4></li>
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</ul>
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<p class="whs9">This option simplifies the total number
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 of logic expressions in a design, and then collapses the logic in order
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 to meet user objectives such as density, speed and timing constraints.
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 This optimization targets CPLD architecture, making it possible to collapse
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 to the macrocell limits, reduce levels of logic, and minimize the total
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 number of p-terms.</p>
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<p class="whs10">Multi-level Logic Optimization optimizes
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 all combinatorial logic arcs spanning from an input pad or register output
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 to an output pad or register input.</p>
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<p class="whs11">Multi-level Logic Optimization operates
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 on combinatorial logic according to the following rules.</p>
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<p class="whs12">If timing constraints are set, the program
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 optimizes for speed to meet timing constraints.</p>
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<p class="whs13">If timing constraints are not set, the
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 program optimizes either for speed or density, depending on the user setting
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 for the <span style="font-weight: bold;"><B>Use Timing Optimization</B></span>
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 option.</p>
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<ul>
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        <ul class=whs1
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                type=disc>
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                <ul class=whs2
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                        style="list-style: circle;"
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                        type=circle>
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                        <li class=kadov-p><p class="whs14">If
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 <span style="font-weight: bold;"><B>Use Timing Optimization</B></span> is turned
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 on, the combinatorial logic will be mapped for speed.</p></li>
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                        <li class=kadov-p-Cwhs3><p class=whs3
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                                                                                style="font-family: arial; font-size: 10pt;">If
276 
 <span style="font-weight: bold;"><B>Use Timing Optimization</B></span> is turned
277 
 off, the combinatorial logic will be mapped for density. The goal of optimization
278 
 will then be to reduce the total number of p-terms.</p></li>
279 
                </ul>
280 
        </ul>
281 
</ul>
282 
 
283 
<p class="whs15"><font style="font-family: arial; font-size: 10pt;"
284 
                                                                        face=arial
285 
                                                                        size=2><span style="font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">Logic
286 
 marked with the </FONT></span><span style="font-weight: bold;"><B><b style="font-size: 10pt;">NOREDUCE</b></B></span><span
287 
 style="font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;"> property will not be extracted or optimized.</FONT></span></font></p>
288 
 
289 
<p class=whs3
290 
        style="font-family: arial, sans-serif;
291 
                        font-size: 10pt;
292 
                        font-weight: bold;
293 
                        margin-left: 40px;"><span style="font-family: arial; font-weight: normal;">By
294 
 default, this option is on.</span> </p>
295 
 
296 
<ul>
297 
 
298 
        <li class=kadov-p-Cwhs3><p class=whs3
299 
                                                                style="font-family: arial, sans-serif;
300 
                                                                                font-size: 10pt;
301 
                                                                                font-weight: bold;"><b style="font-weight: bold;"><span
302 
 style="font-weight: bold;"><B>Use Timing Constraints -- </B></span><span style="font-weight: normal;">This
303 
 option instructs the fitter use Timing Constraints when fitting the design.
304 
 <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->If this
305 
 box is not checked, the fitter will ignore timing constraints, if necessary.</span></b></p></li>
306 
 
307 
        <li class=kadov-p-Cwhs3><p class=whs3
308 
                                                                style="font-family: arial, sans-serif; font-size: 10pt;"><b
309 
 style="font-weight: bold;"><span style="font-weight: bold;"><B>Enable WYSIWYG
310 
 Mode -- (CoolRunner only) </B></span><span style="font-weight: normal;">T</span></b>he
311 
 goal of the WYSIWYG options is to have a netlist reflect the user's specifications,
312 
 as much as possible. All the nodes declared in the HDL design are preserved.
313 
 By default, this property is set to Off (Checkbox is not checked) When
314 
 this property is On (checkbox is checked), XST:</p></li>
315 
 
316 
        <ul>
317 
 
318 
                <li style="list-style: circle;"
319 
                        type=circle
320 
                        class=kadov-p-Cwhs3><p class=whs3
321 
                                                                        style="font-family: arial, sans-serif; font-size: 10pt;">Preserves
322 
 all the user internal signals (nodes)</p></li>
323 
 
324 
                <li style="list-style: circle;"
325 
                        type=circle
326 
                        class=kadov-p-Cwhs3><p class=whs3
327 
                                                                        style="font-family: arial, sans-serif; font-size: 10pt;">Creates
328 
 source_node constraints in NGC file for all these nodes.</p></li>
329 
 
330 
                <li style="list-style: circle;"
331 
                        type=circle
332 
                        class=kadov-p-Cwhs3><p class=whs3
333 
                                                                        style="font-family: arial, sans-serif; font-size: 10pt;">Skips
334 
 the design optimization (collapse, factorization). Only the Boolean equation
335 
 minimization is performed.</p></li>
336 
        </ul>
337 
 
338 
        <li class=kadov-p-Cwhs3><p class=whs3
339 
                                                                style="font-family: arial, sans-serif; font-size: 10pt;"><b><span
340 
 style="font-weight: bold;"><B>Optimization Style</B></span></b>-- The Optimization
341 
 Method allows you to select from one of two basic optimization strategies:
342 
 <span style="font-weight: bold;"><B><b>Density</b></B></span> or <span style="font-weight: bold;"><B><b>Speed</b></B></span>.
343 
 <span style="font-weight: bold;"><B><b>Density</b></B></span> focuses on solely
344 
 on density, and <span style="font-weight: bold;"><B><b>Speed</b></B></span> focuses
345 
 solely on speed.</p></li>
346 
 
347 
        <li class=kadov-p><p class="whs16"><span
348 
 style="font-weight: bold;"><B>Location Constraints</B></span> -- The Try selection
349 
 will attempt to fit the design with the pin assignments specified in the
350 
 design source. If the design cannot be fit with these pin assignments,
351 
 the fitter will remove the location constraints and attempt to fit the
352 
 design with no location constraints. A warning message will tell the user
353 
 if the location constraints have been removed.</p></li>
354 
 
355 
        <ul class=whs5
356 
                style="list-style: circle;"
357 
                type=circle>
358 
 
359 
                <li class=kadov-p><p class="whs17">The
360 
 <span style="font-weight: bold;"><B><b>Try</b></B></span> selection will attempt
361 
 to fit the design with the pin assignments specified in the design source.
362 
 If the design cannot be fit with these pin assignments, the fitter will
363 
 ignore the pin assignments.</p></li>
364 
        </ul>
365 
 
366 
        <li style="list-style: circle;"
367 
                type=circle
368 
                class=kadov-p-Cwhs6><p class=whs6
369 
                                                                style="font-family: arial, sans-serif; font-size: 10pt;">The
370 
 <span style="font-weight: bold;"><B>On </B></span>selection will attempt to fit
371 
 the design with the pin assignments specified in the design source. If
372 
 the design cannot be fit with these pin assignments, the fitter will notify
373 
 the user that the device could not fit. It will not unlock the pins under
374 
 this option.</p></li>
375 
 
376 
        <li style="list-style: circle;"
377 
                type=circle
378 
                class=kadov-p-Cwhs7><p class=whs7
379 
                                                                style="font-family: arial, sans-serif; font-size: 10pt;">The
380 
 <span style="font-weight: bold;"><B>Off</B></span> selection will attempt to
381 
 fit the design and will ignore the pin assignments specified in the design
382 
 source. If the design can be fit with no pre-assigned pins, the fitter
383 
 will assign pins, which can be viewed in the fitter report (filename.fit).
384 
 The user should take these pin assignments and incorporate them back into
385 
 the design source file. The user will be notified whether the fitting
386 
 operation was successful.</p></li>
387 
 
388 
        <li class=kadov-p-Cwhs8><p class=whs8
389 
                                                                style="font-family: arial, sans-serif;
390 
                                                                                font-size: 10pt;
391 
                                                                                font-weight: bold;"><b><span style="font-weight: bold;"><B>Output
392 
 Slew Rate -- </B></span></b><span style="font-weight: normal;">Use this option
393 
 to control the default output slew rate. You can control the transition
394 
 time of device output pins by setting the slew rate to Slow or Fast. Limiting
395 
 the slew rate (Slow) reduces output switching surges in the device. The
396 
 default is Fast.</span></p></li>
397 
</ul>
398 
 
399 
<p class="whs18"><span style="font-weight: bold;"><B>Note</B></span>:
400 
 Any explicit slew rate control properties in the design or constraints
401 
 file take precedence over this Output Slew Rate setting. </p>
402 
 
403 
<ul>
404 
 
405 
        <li class=kadov-p-Cwhs8><p class=whs8
406 
                                                                style="font-family: arial, sans-serif;
407 
                                                                                font-size: 10pt;
408 
                                                                                font-weight: bold;"><b style="font-weight: bold;"><span
409 
 style="font-weight: bold;"><B>FF Initial State -- </B></span><span style="font-weight: normal;">Sets
410 
 the initial state for all Flip-Flops. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->The
411 
 options are Low, High and FPGA.</span></b></p></li>
412 
 
413 
        <li class=kadov-p-Cwhs8><p class=whs8
414 
                                                                style="font-family: arial, sans-serif;
415 
                                                                                font-size: 10pt;
416 
                                                                                font-weight: bold;"><b><span style="font-weight: bold;"><B>Collapsing
417 
 P-Term Limit -- </B></span></b><span style="font-weight: normal;">This option
418 
 controls the degree to which the fitter flattens a design netlist. A logic
419 
 gate can collapse forward into a subsequent gate only if the number of
420 
 product terms in the resulting logic function does not exceed the p-term
421 
 limit. If the path delay of a logic function is not acceptable, increase
422 
 the p-term limit to allow the larger functions to be further flattened.
423 
 Choose a number from 3 to 48.</span> </p></li>
424 
 
425 
        <li class=kadov-p-Cwhs8><p class=whs8
426 
                                                                style="font-family: arial, sans-serif;
427 
                                                                                font-size: 10pt;
428 
                                                                                font-weight: bold;"><b><span style="font-weight: bold;"><B>Collapsing
429 
 Input Limit -- </B></span></b><span style="font-weight: normal;">This is a
430 
 secondary option for controlling the degree to which the fitter flattens
431 
 a design netlist. A logic gate can collapse forward into a subsequent
432 
 gate only if the number of inputs in the resulting logic function does
433 
 not exceed the input limit. If the design fails to fit the target device
434 
 because flattening uses up too many of the function block inputs, decrease
435 
 the input limit to prevent flattening of certain high fan-in functions.
436 
 </span><!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}--></p></li>
437 
</ul>
438 
 
439 
<h2 class="whs19"><b><span
440 
 style="font-weight: bold;"><B><a name="XPLA Advanced Options"></a>XPLA Advanced
441 
 Options</B></span></b></h2>
442 
 
443 
<p class="whs20"><b><span style="font-weight: normal;">The
444 
 following options are available under XPLA </span><span style="font-weight: bold;"><B>Implementation
445 
 Options</B></span><span style="font-weight: normal;">, </span><span style="font-weight: bold;"><B>Advanced</B></span><span
446 
 style="font-weight: normal;"> tab.</span></b></p>
447 
 
448 
<ul>
449 
 
450 
        <li class=kadov-p-Cwhs8><p class=whs8
451 
                                                                style="font-family: arial, sans-serif;
452 
                                                                                font-size: 10pt;
453 
                                                                                font-weight: bold;">Enable Fast
454 
 Input Registers -<span style="font-weight: normal;">- Enables the use
455 
 of the Fast Input path in XPLA3 devices.</span></p></li>
456 
 
457 
        <li class=kadov-p-Cwhs8><p class=whs8
458 
                                                                style="font-family: arial, sans-serif;
459 
                                                                                font-size: 10pt;
460 
                                                                                font-weight: bold;">Enable Use
461 
 of Foldback NANDs -- <span style="font-weight: normal;">When selected,
462 
 the software will use foldback NANDs. This increases the capability to
463 
 fit a design, sometimes at the expense of speed.</span></p></li>
464 
 
465 
        <li class=kadov-p-Cwhs8><p class=whs8
466 
                                                                style="font-family: arial, sans-serif; font-size: 10pt;"><span
467 
 style="font-weight: bold;"><B>Reserve JTAG Pins for ISP -- </B></span>Checking
468 
 this box will instruct the fitter to reserve JTAG pins.</p></li>
469 
</ul>
470 
 
471 
<h2 class="whs21"><a name="CoolRunner-II Advanced Options"></a>CoolRunner-II
472 
 Advanced Options</h2>
473 
 
474 
<p class="whs22">The following
475 
 options are found under the Advanced tab for CoolRunner-II devices.</p>
476 
 
477 
<ul type="disc" class="whs23">
478 
 
479 
        <li class=kadov-h4><h4 class="whs24">Use
480 
 Global Clock(s) -- <span style="font-weight: normal;">Select this option
481 
 to allow the fitter to assign input pins used as clocks to dedicated global
482 
 clock (GCK) pins of the device. If this option is disabled, only pins
483 
 identified with the BUFG=CLK property in the design (or UCF file) will
484 
 be assigned to GCK device pins. By default, this option is on.</span>
485 
 </h4></li>
486 
 
487 
        <li class=kadov-p><p class="whs25"><span
488 
 style="font-weight: bold;"><B>Use Global Output Enable(s)</B></span> -- Select
489 
 this option to allow the fitter to assign input pins used as output enable
490 
 control to dedicated global OE (GTS) pins of the device. If this option
491 
 is disabled, only pins identified with the BUFG=OE property in the design
492 
 (or UCF file) will be assigned to GTS device pins. By default, this option
493 
 is on. </p></li>
494 
 
495 
        <li class=kadov-p><p class="whs26"><span
496 
 style="font-weight: bold;"><B>Use Global Set/Reset</B></span> -- Select this
497 
 option to allow the fitter to assign input pins used as register asynchronous
498 
 reset or preset control to the dedicated global set/reset (GSR) pin of
499 
 the device. If this option is disabled, only a pin identified with the
500 
 BUFG=SR property in the design (or UCF file) will be assigned to the GSR
501 
 device pin. By default, this option is on.</p></li>
502 
 
503 
        <li class=kadov-p><p class="whs27"><span
504 
 style="font-weight: bold;"><B>Enable Fast Input Registers</B></span> -- Enables
505 
 fast input registers.</p></li>
506 
 
507 
        <li class=kadov-p><p class="whs28"><span
508 
 style="font-weight: bold;"><B>Ignore DATA_GATE Attributes</B></span> -- Data
509 
 Gate is a power saving property that can be used in CoolRunner-II designs.
510 
 <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->This option
511 
 allows you to turn Data Gate off in case you want the fitter to ignore
512 
 data gate.</p></li>
513 
 
514 
        <li class=kadov-p><p class="whs29"><span
515 
 style="font-weight: bold;"><B>Tristate Outputs Termination Node</B></span> --
516 
 The Tristate Output Termination Mode globally sets all tristate outputs
517 
 to the specified termination mode. By default, this field is set to Pullup..
518 
 <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->The options
519 
 are Pullup, Keeper and Float.</p></li>
520 
 
521 
        <li class=kadov-p><p class="whs30"><span
522 
 style="font-weight: bold;"><B>Create Programmable Ground Pins on Unused I/O</B></span>
523 
 -- The Create Programmable GND Pins on Unused I/O property controls the
524 
 option to indicate that you want all unused I/O pads to be configured
525 
 as ground pins. This can reduce ground bounce. By default, this option
526 
 is set to ground. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->The
527 
 options are Ground, Pullup, Keeper and Float.</p></li>
528 
 
529 
        <li class=kadov-p>
530 
        <p class="whs31"><span style="font-weight: bold;"><B>Default
531 
 Output Voltage Standard</B></span> -- set a default voltage standard for CoolRunner-II
532 
 device pins.</p>
533 
 
534 
        <p class="whs32">IOSTANDARD
535 
 names supported by CoolRunner-II are:</p>
536 
 
537 
        <!--(Table)=====================================================-->
538 
        <table x-use-null-cells width="84.797%" cellspacing="0" class="whs33">
539 
        <col class="whs34">
540 
        <col class="whs35">
541 
        <col class="whs36">
542 
        <col class="whs37">
543 
 
544 
        <tr valign=top>
545 
        <td width="20.209%" class="whs38">
546 
        <p class="whs39">I/O Standard</td>
547 
        <td width="16.192%" class="whs40">
548 
        <p align="center" class="whs41">VCC<span style="vertical-align: Sub;">IO</span></td>
549 
        <td width="22.217%" class="whs42">
550 
        <p align="center" class="whs43">Input V<span style="vertical-align: Sub;">REF</span></td>
551 
        <td width="41.383%" class="whs44">
552 
        <p align="center" class="whs45">Board Termination Voltage (V<span style="vertical-align: Sub;">TT</span>)</td></tr>
553 
 
554 
        <tr valign=top>
555 
        <td width="20.209%" class="whs46">
556 
        <p class="whs47">LVTTL </td>
557 
        <td width="16.192%" class="whs48">
558 
        <p align="center" class="whs49">3.3V</td>
559 
        <td width="22.217%" class="whs50">
560 
        <p align="center" class="whs51">N/A</td>
561 
        <td width="41.383%" class="whs52">
562 
        <p align="center" class="whs53">N/A</td></tr>
563 
 
564 
        <tr valign=top>
565 
        <td width="20.209%" class="whs54">
566 
        <p class="whs55">LVCMOS33</td>
567 
        <td width="16.192%" class="whs56">
568 
        <p align="center" class="whs57">3.3V</td>
569 
        <td width="22.217%" class="whs58">
570 
        <p align="center" class="whs59">N/A</td>
571 
        <td width="41.383%" class="whs60">
572 
        <p align="center" class="whs61">N/A</td></tr>
573 
 
574 
        <tr valign=top>
575 
        <td width="20.209%" class="whs62">
576 
        <p class="whs63">LVCMOS25</td>
577 
        <td width="16.192%" class="whs64">
578 
        <p align="center" class="whs65">2.5V</td>
579 
        <td width="22.217%" class="whs66">
580 
        <p align="center" class="whs67">N/A</td>
581 
        <td width="41.383%" class="whs68">
582 
        <p align="center" class="whs69">N/A</td></tr>
583 
 
584 
        <tr valign=top>
585 
        <td width="20.209%" class="whs70">
586 
        <p class="whs71">LVCMOS18</td>
587 
        <td width="16.192%" class="whs72">
588 
        <p align="center" class="whs73">1.8V</td>
589 
        <td width="22.217%" class="whs74">
590 
        <p align="center" class="whs75">N/A</td>
591 
        <td width="41.383%" class="whs76">
592 
        <p align="center" class="whs77">N/A</td></tr>
593 
 
594 
        <tr valign=top>
595 
        <td width="20.209%" class="whs78">
596 
        <p class="whs79">LVCMOS15</td>
597 
        <td width="16.192%" class="whs80">
598 
        <p align="center" class="whs81">1.5V</td>
599 
        <td width="22.217%" class="whs82">
600 
        <p align="center" class="whs83">N/A</td>
601 
        <td width="41.383%" class="whs84">
602 
        <p align="center" class="whs85">N/A</td></tr>
603 
 
604 
        <tr valign=top>
605 
        <td width="20.209%" class="whs86">
606 
        <p class="whs87">HSTL_I</td>
607 
        <td width="16.192%" class="whs88">
608 
        <p align="center" class="whs89">1.5V</td>
609 
        <td width="22.217%" class="whs90">
610 
        <p align="center" class="whs91">0.75V</td>
611 
        <td width="41.383%" class="whs92">
612 
        <p align="center" class="whs93">0.75V</td></tr>
613 
 
614 
        <tr valign=top>
615 
        <td width="20.209%" class="whs94">
616 
        <p class="whs95">SSTL2_I</td>
617 
        <td width="16.192%" class="whs96">
618 
        <p align="center" class="whs97">2.5V</td>
619 
        <td width="22.217%" class="whs98">
620 
        <p align="center" class="whs99">1.25V</td>
621 
        <td width="41.383%" class="whs100">
622 
        <p align="center" class="whs101">1.25V</td></tr>
623 
 
624 
        <tr valign=top>
625 
        <td width="20.209%" class="whs102">
626 
        <p class="whs103">SSTL3_I</td>
627 
        <td width="16.192%" class="whs104">
628 
        <p align="center" class="whs105">3.3V</td>
629 
        <td width="22.217%" class="whs106">
630 
        <p align="center" class="whs107">1.5V</td>
631 
        <td width="41.383%" class="whs108">
632 
        <p align="center" class="whs109">1.5V</td></tr>
633 
        </table>
634 
 
635 
        <p class="whs110">The software
636 
 automatically groups outputs with similar IOSTANDARD settings into the
637 
 same bank when no location constraints are specified. </p>
638 
        </li>
639 
</ul>
640 
 
641 
<h2 class="whs111"><a name="XC9500/XL/XV Advanced Options"></a>XC9500/XL/XV
642 
 Advanced Options</h2>
643 
 
644 
<p class="whs112">The following
645 
 options are found under the Advanced tab for XC9500/XL/XV. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Note
646 
 that additional options for XC9500 only are also described below.</p>
647 
 
648 
<ul type="disc" class="whs113">
649 
 
650 
        <li class=kadov-h4><h4 class="whs114">Use
651 
 Global Clock(s) -- <span style="font-weight: normal;">Select this option
652 
 to allow the fitter to assign input pins used as clocks to dedicated global
653 
 clock (GCK) pins of the device. If this option is disabled, only pins
654 
 identified with the BUFG=CLK property in the design (or UCF file) will
655 
 be assigned to GCK device pins. By default, this option is on.</span>
656 
 </h4></li>
657 
 
658 
        <li class=kadov-p><p class="whs115"><span
659 
 style="font-weight: bold;"><B>Use Global Output Enable(s)</B></span> -- Select
660 
 this option to allow the fitter to assign input pins used as output enable
661 
 control to dedicated global OE (GTS) pins of the device. If this option
662 
 is disabled, only pins identified with the BUFG=OE property in the design
663 
 (or UCF file) will be assigned to GTS device pins. By default, this option
664 
 is on. </p></li>
665 
 
666 
        <li class=kadov-p><p class="whs116"><span
667 
 style="font-weight: bold;"><B>Use Global Set/Reset</B></span> -- Select this
668 
 option to allow the fitter to assign input pins used as register asynchronous
669 
 reset or preset control to the dedicated global set/reset (GSR) pin of
670 
 the device. If this option is disabled, only a pin identified with the
671 
 BUFG=SR property in the design (or UCF file) will be assigned to the GSR
672 
 device pin. By default, this option is on.</p></li>
673 
 
674 
        <li class=kadov-p><p class="whs117"><span
675 
 style="font-weight: bold;"><B>Create Programmable Ground Pins on Unused I/O</B></span>
676 
 -- Select this option to indicate that you want all unused I/O pads to
677 
 be configured as ground pins. This can reduce ground bounce. By default,
678 
 this option is off.</p></li>
679 
 
680 
        <li class=kadov-p><p class="whs118"><span
681 
 style="font-weight: bold;"><B>Macrocell Power Setting</B></span> -- Use this
682 
 option to control device power consumption. Select Low or Standard to
683 
 set the default power mode for the macrocells used to implement the design.
684 
 Select Timing Driven to automatically reduce power on paths covered by
685 
 timing specifications that can meet speed requirements while operating
686 
 in low power. The default is Standard, which results in highest speed.</p></li>
687 
</ul>
688 
 
689 
<p class="whs119">Note: Any explicit power control (PWR_MODE)
690 
 properties in the design or constraints file take precedence over this
691 
 Macrocell Power Setting. </p>
692 
 
693 
<ul type="disc" class="whs120">
694 
 
695 
        <li class=kadov-p><p class="whs121"><span
696 
 style="font-weight: bold;"><B>Enable FASTConnect/UIM Optimization (XC9500
697 
 only)</B></span> -- Enables optimization of the FASTConnect/UIM for XC9500
698 
 devices.</p></li>
699 
 
700 
        <li class=kadov-h4><h4 class="whs122">Use
701 
 Local Feedback (XC9500 only)</h4></li>
702 
</ul>
703 
 
704 
<p class="whs123">Select this option to enable the software
705 
 to use local macrocell feedback whenever possible. The local feedback
706 
 path, running from each macrocell output to an input of the same function
707 
 block, has shorter propagation delay than the global feedback path. The
708 
 fitter always tries to use local macrocell feedback (if possible) to satisfy
709 
 timing constraints. This option allows the fitter to use local feedback
710 
 to generally improve timing on remaining paths. Using local feedback can
711 
 speed up your design but could also make it difficult to maintain the
712 
 same timing after a design change. By default, this option is on.</p>
713 
 
714 
 
715 
<!--(HR)============================================================-->
716 
<hr class=whs4
717 
        style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
718 
        align=center>
719 
 
720 
 
721 
<p class="whs124"><b><span style="font-weight: bold;"><B>Note:
722 
 </B></span></b>To force the fitter to use local feedback, manually map both
723 
 the source and load functions into the same function block using the property
724 
 <span style="font-weight: bold;"><B><b>LOC=FB</b></B></span><span style="font-style: italic;"><I><i>nn</i></I></span>,
725 
 then apply a timespec across the path.&nbsp;</p>
726 
 
727 
 
728 
<!--(HR)============================================================-->
729 
<hr class=whs5
730 
        style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
731 
        align=center>
732 
 
733 
 
734 
<p class="whs125"><span><FONT SIZE=2 style="font-size:10pt;"><b style="font-weight: bold;">Note:
735 
 </b></FONT></span>The XC9536 device does not have local feedback.</p>
736 
 
737 
 
738 
<!--(HR)============================================================-->
739 
<hr class=whs6
740 
        style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
741 
        align=center>
742 
 
743 
 
744 
<ul type="disc" class="whs126">
745 
 
746 
        <li class=kadov-h4><h4 class="whs127">Use
747 
 Pin Feedback (XC9500 only)</h4></li>
748 
</ul>
749 
 
750 
<p class="whs128">Select this option to enable the software
751 
 to use I/O pin feedback whenever possible. The pin feedback path has slightly
752 
 shorter propagation delay than the global feedback path. If this option
753 
 is enabled, the software uses the pin feedback path instead of the global
754 
 feedback path for macrocell signals that do not drive 3-state outputs
755 
 or slew-rate-limited outputs, and where the associated I/O pin is not
756 
 used as input-only. By default, this option is on.</p>
757 
 
758 
</body>
759 
 
760 
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