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[/] [cpu8080/] [trunk/] [project/] [cpu8080_tbw.ant] - Blame information for rev 33

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Line No. Rev Author Line
1 11 samiam9512 
////////////////////////////////////////////////////////////////////////////////
2 
// Copyright (c) 1995-2003 Xilinx, Inc.
3 
// All Right Reserved.
4 
////////////////////////////////////////////////////////////////////////////////
5 
//   ____  ____
6 
//  /   /\/   /
7 
// /___/  \  /    Vendor: Xilinx
8 
// \   \   \/     Version : 8.2.02i
9 
//  \   \         Application : ISE
10 
//  /   /         Filename : cpu8080_tbw.ant
11 30 samiam9512 
// /___/   /\     Timestamp : Sat Nov 18 22:47:07 2006
12 11 samiam9512 
// \   \  /  \
13 
//  \___\/\___\
14 
//
15 
//Command:
16 
//Design Name: cpu8080_tbw
17 
//Device: Xilinx
18 
//
19 
`timescale 1ns/1ps
20 
 
21 
module cpu8080_tbw;
22 
    wire [15:0] addr;
23 
    reg [7:0] data$inout$reg = 8'b00000000;
24 
    wire [7:0] data = data$inout$reg;
25 
    wire readmem;
26 
    wire writemem;
27 
    wire readio;
28 
    wire writeio;
29 
    wire intr;
30 
    wire inta;
31 18 samiam9512 
    wire waitr;
32 11 samiam9512 
    wire [2:0] r;
33 
    wire [2:0] g;
34 
    wire [2:0] b;
35 
    wire hsync_n;
36 
    wire vsync_n;
37 18 samiam9512 
    reg ps2_clk = 1'b0;
38 
    reg ps2_data = 1'b0;
39 
    reg reset_n = 1'b0;
40 11 samiam9512 
    reg clock = 1'b0;
41 28 samiam9512 
    wire [7:0] diag;
42 11 samiam9512 
 
43 
    parameter PERIOD = 40;
44 
    parameter real DUTY_CYCLE = 0.5;
45 
    parameter OFFSET = 100;
46 
 
47 
    initial    // Clock process for clock
48 
    begin
49 
        #OFFSET;
50 
        forever
51 
        begin
52 
            clock = 1'b0;
53 
            #(PERIOD-(PERIOD*DUTY_CYCLE)) clock = 1'b1;
54 
            #(PERIOD*DUTY_CYCLE);
55 
        end
56 
    end
57 
 
58 
    testbench UUT (
59 
        .addr(addr),
60 
        .data(data),
61 
        .readmem(readmem),
62 
        .writemem(writemem),
63 
        .readio(readio),
64 
        .writeio(writeio),
65 
        .intr(intr),
66 
        .inta(inta),
67 
        .waitr(waitr),
68 
        .r(r),
69 
        .g(g),
70 
        .b(b),
71 
        .hsync_n(hsync_n),
72 
        .vsync_n(vsync_n),
73 18 samiam9512 
        .ps2_clk(ps2_clk),
74 
        .ps2_data(ps2_data),
75 11 samiam9512 
        .reset_n(reset_n),
76 28 samiam9512 
        .clock(clock),
77 
        .diag(diag));
78 11 samiam9512 
 
79 
    integer TX_FILE = 0;
80 
    integer TX_ERROR = 0;
81 
 
82 
    initial begin    // Annotation process for clock clock
83 
        #0;
84 
        ANNOTATE_addr;
85 
        ANNOTATE_readmem;
86 
        ANNOTATE_writemem;
87 
        ANNOTATE_readio;
88 
        ANNOTATE_writeio;
89 
        ANNOTATE_intr;
90 
        ANNOTATE_inta;
91 18 samiam9512 
        ANNOTATE_waitr;
92 11 samiam9512 
        ANNOTATE_r;
93 
        ANNOTATE_g;
94 
        ANNOTATE_b;
95 
        ANNOTATE_hsync_n;
96 
        ANNOTATE_vsync_n;
97 28 samiam9512 
        ANNOTATE_diag;
98 11 samiam9512 
        #OFFSET;
99 
        forever begin
100 
            #30;
101 
            ANNOTATE_addr;
102 
            ANNOTATE_readmem;
103 
            ANNOTATE_writemem;
104 
            ANNOTATE_readio;
105 
            ANNOTATE_writeio;
106 
            ANNOTATE_intr;
107 
            ANNOTATE_inta;
108 18 samiam9512 
            ANNOTATE_waitr;
109 11 samiam9512 
            ANNOTATE_r;
110 
            ANNOTATE_g;
111 
            ANNOTATE_b;
112 
            ANNOTATE_hsync_n;
113 
            ANNOTATE_vsync_n;
114 28 samiam9512 
            ANNOTATE_diag;
115 11 samiam9512 
            #10;
116 
        end
117 
    end
118 
 
119 
    initial begin  // Open the annotations file...
120 
        TX_FILE = $fopen("C:\\Xilinx\\ISEexamples\\cpu8080\\cpu8080_tbw.ano");
121 28 samiam9512 
        #200040 // Final time:  200040 ns
122 11 samiam9512 
        $display("Success! Annotation Simulation Complete.");
123 
        $fdisplay(TX_FILE, "Total[%d]", TX_ERROR);
124 
        $fclose(TX_FILE);
125 
        $finish;
126 
    end
127 
 
128 
    initial begin
129 
        // -------------  Current Time:  110ns
130 
        #110;
131 18 samiam9512 
        ps2_clk = 1'b1;
132 
        ps2_data = 1'b1;
133 28 samiam9512 
        reset_n = 1'b0;
134 11 samiam9512 
        reset_n = 1'b1;
135 
        // -------------------------------------
136 18 samiam9512 
        // -------------  Current Time:  390ns
137 
        #280;
138 
        ps2_data = 1'b0;
139 
        // -------------------------------------
140 
        // -------------  Current Time:  510ns
141 
        #120;
142 
        ps2_clk = 1'b0;
143 
        // -------------------------------------
144 
        // -------------  Current Time:  590ns
145 
        #80;
146 
        ps2_clk = 1'b0;
147 
        // -------------------------------------
148 
        // -------------  Current Time:  670ns
149 
        #80;
150 
        ps2_clk = 1'b1;
151 
        // -------------------------------------
152 
        // -------------  Current Time:  830ns
153 
        #160;
154 
        ps2_clk = 1'b0;
155 
        // -------------------------------------
156 
        // -------------  Current Time:  990ns
157 
        #160;
158 
        ps2_clk = 1'b1;
159 
        // -------------------------------------
160 
        // -------------  Current Time:  1150ns
161 
        #160;
162 
        ps2_clk = 1'b0;
163 
        // -------------------------------------
164 
        // -------------  Current Time:  1310ns
165 
        #160;
166 
        ps2_clk = 1'b1;
167 
        // -------------------------------------
168 
        // -------------  Current Time:  1470ns
169 
        #160;
170 
        ps2_clk = 1'b0;
171 
        // -------------------------------------
172 
        // -------------  Current Time:  1630ns
173 
        #160;
174 
        ps2_clk = 1'b1;
175 
        ps2_data = 1'b0;
176 
        // -------------------------------------
177 
        // -------------  Current Time:  1790ns
178 
        #160;
179 
        ps2_clk = 1'b0;
180 
        // -------------------------------------
181 
        // -------------  Current Time:  1950ns
182 
        #160;
183 
        ps2_clk = 1'b1;
184 
        // -------------------------------------
185 
        // -------------  Current Time:  1990ns
186 
        #40;
187 
        ps2_data = 1'b1;
188 
        // -------------------------------------
189 
        // -------------  Current Time:  2110ns
190 
        #120;
191 
        ps2_clk = 1'b0;
192 
        // -------------------------------------
193 
        // -------------  Current Time:  2270ns
194 
        #160;
195 
        ps2_clk = 1'b1;
196 
        // -------------------------------------
197 
        // -------------  Current Time:  2430ns
198 
        #160;
199 
        ps2_clk = 1'b0;
200 
        // -------------------------------------
201 
        // -------------  Current Time:  2590ns
202 
        #160;
203 
        ps2_clk = 1'b1;
204 
        // -------------------------------------
205 
        // -------------  Current Time:  2750ns
206 
        #160;
207 
        ps2_clk = 1'b0;
208 
        // -------------------------------------
209 
        // -------------  Current Time:  2910ns
210 
        #160;
211 
        ps2_clk = 1'b1;
212 
        // -------------------------------------
213 
        // -------------  Current Time:  3070ns
214 
        #160;
215 
        ps2_clk = 1'b0;
216 
        // -------------------------------------
217 
        // -------------  Current Time:  3230ns
218 
        #160;
219 
        ps2_clk = 1'b1;
220 
        // -------------------------------------
221 
        // -------------  Current Time:  3310ns
222 
        #80;
223 
        ps2_data = 1'b0;
224 
        // -------------------------------------
225 
        // -------------  Current Time:  3390ns
226 
        #80;
227 
        ps2_clk = 1'b0;
228 
        // -------------------------------------
229 
        // -------------  Current Time:  3550ns
230 
        #160;
231 
        ps2_clk = 1'b1;
232 
        // -------------------------------------
233 
        // -------------  Current Time:  3590ns
234 
        #40;
235 
        ps2_data = 1'b1;
236 
        // -------------------------------------
237 
        // -------------  Current Time:  3710ns
238 
        #120;
239 
        ps2_clk = 1'b0;
240 
        // -------------------------------------
241 
        // -------------  Current Time:  3870ns
242 
        #160;
243 
        ps2_clk = 1'b1;
244 
        // -------------------------------------
245 
        // -------------  Current Time:  5910ns
246 
        #2040;
247 
        ps2_data = 1'b0;
248 
        // -------------------------------------
249 
        // -------------  Current Time:  6070ns
250 
        #160;
251 
        ps2_clk = 1'b0;
252 
        // -------------------------------------
253 
        // -------------  Current Time:  6230ns
254 
        #160;
255 
        ps2_clk = 1'b1;
256 
        // -------------------------------------
257 
        // -------------  Current Time:  6390ns
258 
        #160;
259 
        ps2_clk = 1'b0;
260 
        // -------------------------------------
261 
        // -------------  Current Time:  6550ns
262 
        #160;
263 
        ps2_clk = 1'b1;
264 
        // -------------------------------------
265 
        // -------------  Current Time:  6630ns
266 
        #80;
267 
        ps2_data = 1'b1;
268 
        // -------------------------------------
269 
        // -------------  Current Time:  6710ns
270 
        #80;
271 
        ps2_clk = 1'b0;
272 
        // -------------------------------------
273 
        // -------------  Current Time:  6870ns
274 
        #160;
275 
        ps2_clk = 1'b1;
276 
        // -------------------------------------
277 
        // -------------  Current Time:  6910ns
278 
        #40;
279 
        ps2_data = 1'b0;
280 
        // -------------------------------------
281 
        // -------------  Current Time:  7030ns
282 
        #120;
283 
        ps2_clk = 1'b0;
284 
        // -------------------------------------
285 
        // -------------  Current Time:  7190ns
286 
        #160;
287 
        ps2_clk = 1'b1;
288 
        // -------------------------------------
289 
        // -------------  Current Time:  7350ns
290 
        #160;
291 
        ps2_clk = 1'b0;
292 
        // -------------------------------------
293 
        // -------------  Current Time:  7510ns
294 
        #160;
295 
        ps2_clk = 1'b1;
296 
        // -------------------------------------
297 
        // -------------  Current Time:  7550ns
298 
        #40;
299 
        ps2_data = 1'b1;
300 
        // -------------------------------------
301 
        // -------------  Current Time:  7670ns
302 
        #120;
303 
        ps2_clk = 1'b0;
304 
        // -------------------------------------
305 
        // -------------  Current Time:  7830ns
306 
        #160;
307 
        ps2_clk = 1'b1;
308 
        // -------------------------------------
309 
        // -------------  Current Time:  7910ns
310 
        #80;
311 
        ps2_data = 1'b0;
312 
        // -------------------------------------
313 
        // -------------  Current Time:  7990ns
314 
        #80;
315 
        ps2_clk = 1'b0;
316 
        // -------------------------------------
317 
        // -------------  Current Time:  8150ns
318 
        #160;
319 
        ps2_clk = 1'b1;
320 
        // -------------------------------------
321 
        // -------------  Current Time:  8310ns
322 
        #160;
323 
        ps2_clk = 1'b0;
324 
        // -------------------------------------
325 
        // -------------  Current Time:  8470ns
326 
        #160;
327 
        ps2_clk = 1'b1;
328 
        // -------------------------------------
329 
        // -------------  Current Time:  8630ns
330 
        #160;
331 
        ps2_clk = 1'b0;
332 
        // -------------------------------------
333 
        // -------------  Current Time:  8790ns
334 
        #160;
335 
        ps2_clk = 1'b1;
336 
        // -------------------------------------
337 
        // -------------  Current Time:  8950ns
338 
        #160;
339 
        ps2_clk = 1'b0;
340 
        // -------------------------------------
341 
        // -------------  Current Time:  9110ns
342 
        #160;
343 
        ps2_clk = 1'b1;
344 
        // -------------------------------------
345 
        // -------------  Current Time:  9190ns
346 
        #80;
347 
        ps2_data = 1'b1;
348 
        // -------------------------------------
349 
        // -------------  Current Time:  9270ns
350 
        #80;
351 
        ps2_clk = 1'b0;
352 
        // -------------------------------------
353 
        // -------------  Current Time:  9430ns
354 
        #160;
355 
        ps2_clk = 1'b1;
356 
        // -------------------------------------
357 11 samiam9512 
    end
358 
 
359 
    task ANNOTATE_addr;
360 
        #0 begin
361 
            $fdisplay(TX_FILE, "Annotate[%d,addr,%b]", $time, addr);
362 
            $fflush(TX_FILE);
363 
            TX_ERROR = TX_ERROR + 1;
364 
        end
365 
    endtask
366 
 
367 
    task ANNOTATE_readmem;
368 
        #0 begin
369 
            $fdisplay(TX_FILE, "Annotate[%d,readmem,%b]", $time, readmem);
370 
            $fflush(TX_FILE);
371 
            TX_ERROR = TX_ERROR + 1;
372 
        end
373 
    endtask
374 
 
375 
    task ANNOTATE_writemem;
376 
        #0 begin
377 
            $fdisplay(TX_FILE, "Annotate[%d,writemem,%b]", $time, writemem);
378 
            $fflush(TX_FILE);
379 
            TX_ERROR = TX_ERROR + 1;
380 
        end
381 
    endtask
382 
 
383 
    task ANNOTATE_readio;
384 
        #0 begin
385 
            $fdisplay(TX_FILE, "Annotate[%d,readio,%b]", $time, readio);
386 
            $fflush(TX_FILE);
387 
            TX_ERROR = TX_ERROR + 1;
388 
        end
389 
    endtask
390 
 
391 
    task ANNOTATE_writeio;
392 
        #0 begin
393 
            $fdisplay(TX_FILE, "Annotate[%d,writeio,%b]", $time, writeio);
394 
            $fflush(TX_FILE);
395 
            TX_ERROR = TX_ERROR + 1;
396 
        end
397 
    endtask
398 
 
399 
    task ANNOTATE_intr;
400 
        #0 begin
401 
            $fdisplay(TX_FILE, "Annotate[%d,intr,%b]", $time, intr);
402 
            $fflush(TX_FILE);
403 
            TX_ERROR = TX_ERROR + 1;
404 
        end
405 
    endtask
406 
 
407 
    task ANNOTATE_inta;
408 
        #0 begin
409 
            $fdisplay(TX_FILE, "Annotate[%d,inta,%b]", $time, inta);
410 
            $fflush(TX_FILE);
411 
            TX_ERROR = TX_ERROR + 1;
412 
        end
413 
    endtask
414 
 
415 18 samiam9512 
    task ANNOTATE_waitr;
416 
        #0 begin
417 
            $fdisplay(TX_FILE, "Annotate[%d,waitr,%b]", $time, waitr);
418 
            $fflush(TX_FILE);
419 
            TX_ERROR = TX_ERROR + 1;
420 
        end
421 
    endtask
422 
 
423 11 samiam9512 
    task ANNOTATE_r;
424 
        #0 begin
425 
            $fdisplay(TX_FILE, "Annotate[%d,r,%b]", $time, r);
426 
            $fflush(TX_FILE);
427 
            TX_ERROR = TX_ERROR + 1;
428 
        end
429 
    endtask
430 
 
431 
    task ANNOTATE_g;
432 
        #0 begin
433 
            $fdisplay(TX_FILE, "Annotate[%d,g,%b]", $time, g);
434 
            $fflush(TX_FILE);
435 
            TX_ERROR = TX_ERROR + 1;
436 
        end
437 
    endtask
438 
 
439 
    task ANNOTATE_b;
440 
        #0 begin
441 
            $fdisplay(TX_FILE, "Annotate[%d,b,%b]", $time, b);
442 
            $fflush(TX_FILE);
443 
            TX_ERROR = TX_ERROR + 1;
444 
        end
445 
    endtask
446 
 
447 
    task ANNOTATE_hsync_n;
448 
        #0 begin
449 
            $fdisplay(TX_FILE, "Annotate[%d,hsync_n,%b]", $time, hsync_n);
450 
            $fflush(TX_FILE);
451 
            TX_ERROR = TX_ERROR + 1;
452 
        end
453 
    endtask
454 
 
455 
    task ANNOTATE_vsync_n;
456 
        #0 begin
457 
            $fdisplay(TX_FILE, "Annotate[%d,vsync_n,%b]", $time, vsync_n);
458 
            $fflush(TX_FILE);
459 
            TX_ERROR = TX_ERROR + 1;
460 
        end
461 
    endtask
462 
 
463 28 samiam9512 
    task ANNOTATE_diag;
464 
        #0 begin
465 
            $fdisplay(TX_FILE, "Annotate[%d,diag,%b]", $time, diag);
466 
            $fflush(TX_FILE);
467 
            TX_ERROR = TX_ERROR + 1;
468 
        end
469 
    endtask
470 
 
471 11 samiam9512 
endmodule
472 
 

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