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[/] [cpu8080/] [trunk/] [project/] [cpu_tbw.ant] - Blame information for rev 11

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Line No. Rev Author Line
1 2 samiam9512
////////////////////////////////////////////////////////////////////////////////
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// Copyright (c) 1995-2003 Xilinx, Inc.
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// All Right Reserved.
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////////////////////////////////////////////////////////////////////////////////
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//   ____  ____
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//  /   /\/   /
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// /___/  \  /    Vendor: Xilinx
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// \   \   \/     Version : 8.2.02i
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//  \   \         Application : ISE
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//  /   /         Filename : cpu_tbw.ant
11 11 samiam9512
// /___/   /\     Timestamp : Sat Oct 28 09:12:59 2006
12 2 samiam9512
// \   \  /  \
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//  \___\/\___\
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//
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//Command:
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//Design Name: cpu_tbw
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//Device: Xilinx
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//
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`timescale 1ns/1ps
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module cpu_tbw;
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    wire [15:0] addr;
23 11 samiam9512
    reg [7:0] data$inout$reg = 8'bZ1Z00000;
24 2 samiam9512
    wire [7:0] data = data$inout$reg;
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    wire readmem;
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    wire writemem;
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    wire readio;
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    wire writeio;
29 9 samiam9512
    wire intr;
30 2 samiam9512
    wire inta;
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    reg waitr = 1'b0;
32 11 samiam9512
    wire [2:0] r;
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    wire [2:0] g;
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    wire [2:0] b;
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    wire hsync_n;
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    wire vsync_n;
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    reg reset = 1'b0;
38 2 samiam9512
    reg clock = 1'b0;
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    parameter PERIOD = 200;
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    parameter real DUTY_CYCLE = 0.5;
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    parameter OFFSET = 0;
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    initial    // Clock process for clock
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    begin
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        #OFFSET;
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        forever
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        begin
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            clock = 1'b0;
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            #(PERIOD-(PERIOD*DUTY_CYCLE)) clock = 1'b1;
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            #(PERIOD*DUTY_CYCLE);
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        end
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    end
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    testbench UUT (
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        .addr(addr),
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        .data(data),
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        .readmem(readmem),
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        .writemem(writemem),
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        .readio(readio),
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        .writeio(writeio),
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        .intr(intr),
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        .inta(inta),
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        .waitr(waitr),
65 11 samiam9512
        .r(r),
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        .g(g),
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        .b(b),
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        .hsync_n(hsync_n),
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        .vsync_n(vsync_n),
70 2 samiam9512
        .reset(reset),
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        .clock(clock));
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    integer TX_FILE = 0;
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    integer TX_ERROR = 0;
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    initial begin    // Annotation process for clock clock
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        #0;
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        ANNOTATE_addr;
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        ANNOTATE_readmem;
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        ANNOTATE_writemem;
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        ANNOTATE_readio;
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        ANNOTATE_writeio;
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        ANNOTATE_intr;
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        ANNOTATE_inta;
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        ANNOTATE_r;
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        ANNOTATE_g;
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        ANNOTATE_b;
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        ANNOTATE_hsync_n;
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        ANNOTATE_vsync_n;
90 2 samiam9512
        #OFFSET;
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        forever begin
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            #115;
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            ANNOTATE_addr;
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            ANNOTATE_readmem;
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            ANNOTATE_writemem;
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            ANNOTATE_readio;
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            ANNOTATE_writeio;
98 9 samiam9512
            ANNOTATE_intr;
99 2 samiam9512
            ANNOTATE_inta;
100 11 samiam9512
            ANNOTATE_r;
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            ANNOTATE_g;
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            ANNOTATE_b;
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            ANNOTATE_hsync_n;
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            ANNOTATE_vsync_n;
105 2 samiam9512
            #85;
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        end
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    end
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    initial begin  // Open the annotations file...
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        TX_FILE = $fopen("C:\\Xilinx\\ISEexamples\\cpu8080\\cpu_tbw.ano");
111 11 samiam9512
        #100200 // Final time:  100200 ns
112 2 samiam9512
        $display("Success! Annotation Simulation Complete.");
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        $fdisplay(TX_FILE, "Total[%d]", TX_ERROR);
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        $fclose(TX_FILE);
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        $finish;
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    end
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    initial begin
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        // -------------  Current Time:  85ns
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        #85;
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        reset = 1'b1;
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        reset = 1'b0;
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        // -------------------------------------
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    end
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    task ANNOTATE_addr;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,addr,%b]", $time, addr);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_readmem;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,readmem,%b]", $time, readmem);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_writemem;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,writemem,%b]", $time, writemem);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_readio;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,readio,%b]", $time, readio);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_writeio;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,writeio,%b]", $time, writeio);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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166 9 samiam9512
    task ANNOTATE_intr;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,intr,%b]", $time, intr);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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174 2 samiam9512
    task ANNOTATE_inta;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,inta,%b]", $time, inta);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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182 11 samiam9512
    task ANNOTATE_r;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,r,%b]", $time, r);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_g;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,g,%b]", $time, g);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_b;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,b,%b]", $time, b);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_hsync_n;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,hsync_n,%b]", $time, hsync_n);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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    task ANNOTATE_vsync_n;
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        #0 begin
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            $fdisplay(TX_FILE, "Annotate[%d,vsync_n,%b]", $time, vsync_n);
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            $fflush(TX_FILE);
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            TX_ERROR = TX_ERROR + 1;
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        end
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    endtask
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222 2 samiam9512
endmodule
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