Subversion Repositories cpu8080

////////////////////////////////////////////////////////////////////////////////

// Copyright (c) 1995-2003 Xilinx, Inc.

// All Right Reserved.

////////////////////////////////////////////////////////////////////////////////

//   ____  ____

//  /   /\/   /

// /___/  \  /    Vendor: Xilinx

// \   \   \/     Version : 8.2.02i

//  \   \         Application : ISE

//  /   /         Filename : cpu_tbw.ant

// /___/   /\     Timestamp : Sat Sep 23 19:23:16 2006

// \   \  /  \

//  \___\/\___\

//

//Command:

//Design Name: cpu_tbw

//Device: Xilinx

//

`timescale 1ns/1ps

module cpu_tbw;

    wire [15:0] addr;

    reg [7:0] data$inout$reg = 8'bZZZZZZZZ;

    wire [7:0] data = data$inout$reg;

    wire readmem;

    wire writemem;

    wire readio;

    wire writeio;

    reg intr = 1'b0;

    wire inta;

    reg waitr = 1'b0;

    reg reset = 1'b1;

    reg clock = 1'b0;

    parameter PERIOD = 200;

    parameter real DUTY_CYCLE = 0.5;

    parameter OFFSET = 0;

    initial    // Clock process for clock

    begin

        #OFFSET;

        forever

        begin

            clock = 1'b0;

            #(PERIOD-(PERIOD*DUTY_CYCLE)) clock = 1'b1;

            #(PERIOD*DUTY_CYCLE);

        end

    end

    testbench UUT (

        .addr(addr),

        .data(data),

        .readmem(readmem),

        .writemem(writemem),

        .readio(readio),

        .writeio(writeio),

        .intr(intr),

        .inta(inta),

        .waitr(waitr),

        .reset(reset),

        .clock(clock));

    integer TX_FILE = 0;

    integer TX_ERROR = 0;

    initial begin    // Annotation process for clock clock

        #0;

        ANNOTATE_addr;

        ANNOTATE_readmem;

        ANNOTATE_writemem;

        ANNOTATE_readio;

        ANNOTATE_writeio;

        ANNOTATE_inta;

        #OFFSET;

        forever begin

            #115;

            ANNOTATE_addr;

            ANNOTATE_readmem;

            ANNOTATE_writemem;

            ANNOTATE_readio;

            ANNOTATE_writeio;

            ANNOTATE_inta;

            #85;

        end

    end

    initial begin  // Open the annotations file...

        TX_FILE = $fopen("C:\\Xilinx\\ISEexamples\\cpu8080\\cpu_tbw.ano");

        #10200 // Final time:  10200 ns

        $display("Success! Annotation Simulation Complete.");

        $fdisplay(TX_FILE, "Total[%d]", TX_ERROR);

        $fclose(TX_FILE);

        $finish;

    end

    initial begin

        // -------------  Current Time:  485ns

        #485;

        reset = 1'b0;

        // -------------------------------------

    end

    task ANNOTATE_addr;

        #0 begin

            $fdisplay(TX_FILE, "Annotate[%d,addr,%b]", $time, addr);

            $fflush(TX_FILE);

            TX_ERROR = TX_ERROR + 1;

        end

    endtask

    task ANNOTATE_readmem;

        #0 begin

            $fdisplay(TX_FILE, "Annotate[%d,readmem,%b]", $time, readmem);

            $fflush(TX_FILE);

            TX_ERROR = TX_ERROR + 1;

        end

    endtask

    task ANNOTATE_writemem;

        #0 begin

            $fdisplay(TX_FILE, "Annotate[%d,writemem,%b]", $time, writemem);

            $fflush(TX_FILE);

            TX_ERROR = TX_ERROR + 1;

        end

    endtask

    task ANNOTATE_readio;

        #0 begin

            $fdisplay(TX_FILE, "Annotate[%d,readio,%b]", $time, readio);

            $fflush(TX_FILE);

            TX_ERROR = TX_ERROR + 1;

        end

    endtask

    task ANNOTATE_writeio;

        #0 begin

            $fdisplay(TX_FILE, "Annotate[%d,writeio,%b]", $time, writeio);

            $fflush(TX_FILE);

            TX_ERROR = TX_ERROR + 1;

        end

    endtask

    task ANNOTATE_inta;

        #0 begin

            $fdisplay(TX_FILE, "Annotate[%d,inta,%b]", $time, inta);

            $fflush(TX_FILE);

            TX_ERROR = TX_ERROR + 1;

        end

    endtask

endmodule