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[/] [cpu8080/] [trunk/] [project/] [cpu_tbw_gen.prj] - Blame information for rev 33

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Line No. Rev Author Line
1 11 samiam9512
vhdl work "common.vhd"
2
vhdl work "vga.vhd"
3
verilog work "vgachr.v"
4 2 samiam9512
verilog work "cpu8080.v"
5
verilog work "testbench.v"
6
verilog work "cpu_tbw.ant"
7
verilog work "C:/Xilinx/verilog/src/glbl.v"

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