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samiam9512 |
V3 45
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FL $XILINX/ISEexamples/cpu8080/vga.vhd 2006/10/31.09:40:20 I.33
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| 3 |
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PH work/vga_pckg 1162362489 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1162002891 CD vga
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EN work/vga 1162362490 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1162002891
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AR work/vga/vga_arch 1162362491 FL $XILINX/ISEexamples/cpu8080/vga.vhd EN work/vga 1162362490 \
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CP sync
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EN work/sync 1162362492 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1162002891
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AR work/sync/sync_arch 1162362493 FL $XILINX/ISEexamples/cpu8080/vga.vhd EN work/sync 1162362492
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FL $XILINX/ISEexamples/cpu8080/cpu_tbw.ant 2006/10/28.09:13:00 I.33
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MO work/cpu_tbw FL $XILINX/ISEexamples/cpu8080/cpu_tbw.ant MI testbench
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FL $XILINX/ISEexamples/cpu8080/cpu8080.v 2006/10/29.08:05:44 I.33
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| 18 |
2 |
samiam9512 |
MO work/cpu8080 FL $XILINX/ISEexamples/cpu8080/cpu8080.v MI alu
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| 19 |
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MO work/alu FL $XILINX/ISEexamples/cpu8080/cpu8080.v
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11 |
samiam9512 |
FL $XILINX/ISEexamples/cpu8080/vgachr.v 2006/10/31.23:18:10 I.33
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MO work/terminal FL $XILINX/ISEexamples/cpu8080/vgachr.v MI chrmemmap
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MO work/chrmemmap FL $XILINX/ISEexamples/cpu8080/vgachr.v MI chrrom MI vga
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MO work/chrrom FL $XILINX/ISEexamples/cpu8080/vgachr.v
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FL $XILINX/ISEexamples/cpu8080/cpu8080_tbw.tfw 2006/10/28.22:18:08 I.33
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| 25 |
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MO work/cpu8080_tbw FL $XILINX/ISEexamples/cpu8080/cpu8080_tbw.tfw \
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| 26 |
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MI testbench
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FL test.lst 2006/10/31.23:16:26 I.33
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| 28 |
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FL $XILINX/ISEexamples/cpu8080/testbench.v 2006/10/31.23:14:28 I.33 FL test.lst
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| 29 |
2 |
samiam9512 |
MO work/testbench FL $XILINX/ISEexamples/cpu8080/testbench.v MI cpu8080 \
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| 30 |
11 |
samiam9512 |
MI intcontrol MI ram MI rom MI select MI terminal
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| 31 |
2 |
samiam9512 |
MO work/select FL $XILINX/ISEexamples/cpu8080/testbench.v MI selectone
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| 32 |
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MO work/selectone FL $XILINX/ISEexamples/cpu8080/testbench.v
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9 |
samiam9512 |
MO work/intcontrol FL $XILINX/ISEexamples/cpu8080/testbench.v
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2 |
samiam9512 |
MO work/rom FL $XILINX/ISEexamples/cpu8080/testbench.v
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| 35 |
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MO work/ram FL $XILINX/ISEexamples/cpu8080/testbench.v
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FL $XILINX/verilog/src/glbl.v 2006/05/17.11:09:08 I.33
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| 37 |
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MO work/glbl FL $XILINX/verilog/src/glbl.v
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| 38 |
11 |
samiam9512 |
FL $XILINX/ISEexamples/cpu8080/common.vhd 2006/10/16.23:07:12 I.33
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| 39 |
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PH work/common 1162002890 FL $XILINX/ISEexamples/cpu8080/common.vhd \
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| 40 |
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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| 41 |
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PB work/common 1162002891 FL $XILINX/ISEexamples/cpu8080/common.vhd PH work/common 1162002890 \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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