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[/] [cpu8080/] [trunk/] [project/] [isim/] [work/] [sync/] [sync_arch.h] - Blame information for rev 24

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Line No. Rev Author Line
1 11 samiam9512
////////////////////////////////////////////////////////////////////////////////
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//   ____  ____   
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//  /   /\/   /  
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// /___/  \  /   
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// \   \   \/  
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//  \   \        Copyright (c) 2003-2004 Xilinx, Inc.
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//  /   /        All Right Reserved. 
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// /---/   /\     
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// \   \  /  \  
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//  \___\/\___\
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////////////////////////////////////////////////////////////////////////////////
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#ifndef H_Work_sync_sync_arch_H
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#define H_Work_sync_sync_arch_H
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#ifdef __MINGW32__
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#include "xsimMinGW.h"
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#else
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#include "xsim.h"
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#endif
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class Work_sync_sync_arch: public HSim__s6 {
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public:
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    HSim__s4 PE[5];
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    HSim__s1 SE[7];
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HSim__s4 C8;
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HSim__s4 Cc;
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HSim__s4 Cg;
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HSim__s4 Ck;
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HSim__s4 Cp;
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    HSim__s1 SA[8];
34 24 samiam9512
  char t0;
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  char *t1;
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HSimConstraints *c2;
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  char t3;
38 11 samiam9512
    Work_sync_sync_arch(const char * name);
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    ~Work_sync_sync_arch();
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    void constructObject();
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    void constructPorts();
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    void reset();
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    void architectureInstantiate(HSimConfigDecl* cfg);
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    virtual void vhdlArchImplement();
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};
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HSim__s6 *createWork_sync_sync_arch(const char *name);
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#endif

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