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[/] [cpu8080/] [trunk/] [project/] [test.asm] - Blame information for rev 9

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!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!
! Code for the test bench. This gets dumped and placed into testbench.v as byte
! definitions.
!
 
!
! Select controller defines
!
selmain: equ    $00             ! offset of main control register
sel1msk: equ    $02             ! offset of select 1 mask
sel1cmp: equ    $03             ! offset of select 1 compare
sel2msk: equ    $04             ! offset of select 1 mask
sel2cmp: equ    $05             ! offset of select 1 compare
sel3msk: equ    $06             ! offset of select 1 mask
sel3cmp: equ    $07             ! offset of select 1 compare
sel4msk: equ    $08             ! offset of select 1 mask
sel4cmp: equ    $09             ! offset of select 1 compare
!
! bits
!
selenb:  equ    $01             ! enable select
selio:   equ    $02                     ! I/O address or memory
 
!
! Note: select 1 is ROM, 2, is RAM, 3 is interrupt controller
!
 
!
! Where to place ROM and RAM for this test
!
rombas: equ             $0000
rambas: equ             rombas+1024
!
! Interrupt controller defines
!
intbas: equ             $10
intmsk: equ             intbas+$00          ! mask
intsts: equ             intbas+$01          ! status
intact: equ             intbas+$02      ! active interrupt
intpol: equ             intbas+$03              ! polarity select
intedg: equ             intbas+$04              ! edge/level select
intvec: equ             intbas+$05              ! vector base page
 
!
! Set up selectors
!
 
!
! ROM
!
        mvi             a,rombas shr 8  ! enable select 1 to 1kb at base
                out             sel1cmp
        mvi             a,($fc00 shr 8) or selenb
        out     sel1msk
!
! RAM
!
        mvi     a,rambas shr 8  ! enable select 2 to 1kb at base
        out     sel2cmp
        mvi     a,($fc00 shr 8) or selenb
        out     sel2msk
!
! ROM and RAM set up, exit bootstrap mode
!
        mvi     a,$00                   ! exit bootstrap mode
        out     selmain
!
                lxi             sp,rambas+1024  ! set stack to top of ram
!
! Interrupt controller
!
                mvi             a,intbas                ! enable interrupt controller for 8 addresses
                out             sel3cmp
                mvi             a,$f8 or selio or selenb
                out             sel3msk
!
! Set up interrupt controller for test
!
                mvi             a,$0100 shr 8   ! vector to page 1
                out             intvec
                mvi             a,$01                   ! enable interrupt 0
                out             intact
!
! Interrupt here
!
                nop
                nop
                hlt                                             ! and stop
!
! Locate to page 1
!
                alignp  256
                ret                                             ! return from interrupt

Line No.	Rev	Author	Line
1	9	samiam9512	`!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!`
2			`!`
3			`! Code for the test bench. This gets dumped and placed into testbench.v as byte`
4			`! definitions.`
5			`!`
6
7			`!`
8			`! Select controller defines`
9			`!`
10			`selmain: equ $00 ! offset of main control register`
11			`sel1msk: equ $02 ! offset of select 1 mask`
12			`sel1cmp: equ $03 ! offset of select 1 compare`
13			`sel2msk: equ $04 ! offset of select 1 mask`
14			`sel2cmp: equ $05 ! offset of select 1 compare`
15			`sel3msk: equ $06 ! offset of select 1 mask`
16			`sel3cmp: equ $07 ! offset of select 1 compare`
17			`sel4msk: equ $08 ! offset of select 1 mask`
18			`sel4cmp: equ $09 ! offset of select 1 compare`
19			`!`
20			`! bits`
21			`!`
22			`selenb: equ $01 ! enable select`
23			`selio: equ $02 ! I/O address or memory`
24
25			`!`
26			`! Note: select 1 is ROM, 2, is RAM, 3 is interrupt controller`
27			`!`
28
29			`!`
30			`! Where to place ROM and RAM for this test`
31			`!`
32			`rombas: equ $0000`
33			`rambas: equ rombas+1024`
34			`!`
35			`! Interrupt controller defines`
36			`!`
37			`intbas: equ $10`
38			`intmsk: equ intbas+$00 ! mask`
39			`intsts: equ intbas+$01 ! status`
40			`intact: equ intbas+$02 ! active interrupt`
41			`intpol: equ intbas+$03 ! polarity select`
42			`intedg: equ intbas+$04 ! edge/level select`
43			`intvec: equ intbas+$05 ! vector base page`
44
45			`!`
46			`! Set up selectors`
47			`!`
48
49			`!`
50			`! ROM`
51			`!`
52			`mvi a,rombas shr 8 ! enable select 1 to 1kb at base`
53			`out sel1cmp`
54			`mvi a,($fc00 shr 8) or selenb`
55			`out sel1msk`
56			`!`
57			`! RAM`
58			`!`
59			`mvi a,rambas shr 8 ! enable select 2 to 1kb at base`
60			`out sel2cmp`
61			`mvi a,($fc00 shr 8) or selenb`
62			`out sel2msk`
63			`!`
64			`! ROM and RAM set up, exit bootstrap mode`
65			`!`
66			`mvi a,$00 ! exit bootstrap mode`
67			`out selmain`
68			`!`
69			`lxi sp,rambas+1024 ! set stack to top of ram`
70			`!`
71			`! Interrupt controller`
72			`!`
73			`mvi a,intbas ! enable interrupt controller for 8 addresses`
74			`out sel3cmp`
75			`mvi a,$f8 or selio or selenb`
76			`out sel3msk`
77			`!`
78			`! Set up interrupt controller for test`
79			`!`
80			`mvi a,$0100 shr 8 ! vector to page 1`
81			`out intvec`
82			`mvi a,$01 ! enable interrupt 0`
83			`out intact`
84			`!`
85			`! Interrupt here`
86			`!`
87			`nop`
88			`nop`
89			`hlt ! and stop`
90			`!`
91			`! Locate to page 1`
92			`!`
93			`alignp 256`
94			`ret ! return from interrupt`

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[/] [cpu8080/] [trunk/] [project/] [test.asm] - Blame information for rev 9