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[/] [cpu8080/] [trunk/] [project/] [test2.asm] - Blame information for rev 33

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!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!
! Code for the test bench. This gets dumped and placed into testbench.v as byte
! definitions.
!
 
!
! Select controller defines
!
selmain: equ    $00             ! offset of main control register
sel1msk: equ    $02             ! offset of select 1 mask
sel1cmp: equ    $03             ! offset of select 1 compare
sel2msk: equ    $04             ! offset of select 1 mask
sel2cmp: equ    $05             ! offset of select 1 compare
sel3msk: equ    $06             ! offset of select 1 mask
sel3cmp: equ    $07             ! offset of select 1 compare
sel4msk: equ    $08             ! offset of select 1 mask
sel4cmp: equ    $09             ! offset of select 1 compare
!
! bits
!
selenb:  equ    $01             ! enable select
selio:   equ    $02             ! I/O address or memory
 
!
! Note: select 1 is ROM, 2, is RAM, 3 is interrupt controller, 4 is serial I/O.
!
 
!
! Where to place ROM and RAM for this test
!
rombas: equ     $0000
rambas: equ     rombas+1024
!
! Interrupt controller defines
!
intbas: equ     $10
intmsk: equ     intbas+$00      ! mask
intsts: equ     intbas+$01      ! status
intact: equ     intbas+$02      ! active interrupt
intpol: equ     intbas+$03      ! polarity select
intedg: equ     intbas+$04      ! edge/level select
intvec: equ     intbas+$05      ! vector base page
!
! Mits Serial I/O card
!
siobas: equ     $20
sioctl: equ     siobas+$00      ! control register
siodat: equ     siobas+$01      ! data
 
!
! Set up selectors
!
 
!
! ROM
!
        mvi     a,rombas shr 8  ! enable select 1 to 1kb at base
        out     sel1cmp
        mvi     a,($fc00 shr 8) or selenb
        out     sel1msk
!
! RAM
!
        mvi     a,rambas shr 8  ! enable select 2 to 1kb at base
        out     sel2cmp
        mvi     a,($fc00 shr 8) or selenb
        out     sel2msk
!
! ROM and RAM set up, exit bootstrap mode
!
        mvi     a,$00           ! exit bootstrap mode
        out     selmain
!
        lxi     sp,rambas+1024  ! set stack to top of ram
!
! Serial I/O
!
        mvi     a,siobas        ! enable interrupt controller for 4 addresses
        out     sel4cmp
        mvi     a,$fc or selio or selenb
        out     sel4msk
!
! Print "hello, world" and stop
!
        lxi     h,helstr        ! index string
loop:
        mov     a,m             ! get character
        inx     h               ! next character
        ora     a               ! check end of string
        jz      endstr          ! yes, skip
        call    wrtout          ! output character
        jmp     loop            ! loop next character
endstr:
!
! Copy characters from input to output
!
echo:
        in      sioctl          ! check character waiting
        ani     $20
        jz      echo            ! no, wait
        in      siodat          ! yes, get character
        call    wrtout          ! output
        jmp     echo            ! loop forever
 
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!
! Serial output routine
!
! Outputs the character in a.
!
wrtout:
        push    psw             ! save character to output
wrtout01:
        in      sioctl          ! get output ready status /n
        ani     $80             ! mask
        jnz     wrtout01        ! no, loop
        pop     psw             ! restore character
        out     siodat          ! output
        ret                     ! return to caller
!
! String to print
!
helstr:
        defb    'HELLO, FPGA WORLD\cr\lf', 0
 
 

Line No.	Rev	Author	Line
1	24	samiam9512	`!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!`
2			`!`
3			`! Code for the test bench. This gets dumped and placed into testbench.v as byte`
4			`! definitions.`
5			`!`
6
7			`!`
8			`! Select controller defines`
9			`!`
10			`selmain: equ $00 ! offset of main control register`
11			`sel1msk: equ $02 ! offset of select 1 mask`
12			`sel1cmp: equ $03 ! offset of select 1 compare`
13			`sel2msk: equ $04 ! offset of select 1 mask`
14			`sel2cmp: equ $05 ! offset of select 1 compare`
15			`sel3msk: equ $06 ! offset of select 1 mask`
16			`sel3cmp: equ $07 ! offset of select 1 compare`
17			`sel4msk: equ $08 ! offset of select 1 mask`
18			`sel4cmp: equ $09 ! offset of select 1 compare`
19			`!`
20			`! bits`
21			`!`
22			`selenb: equ $01 ! enable select`
23			`selio: equ $02 ! I/O address or memory`
24
25			`!`
26			`! Note: select 1 is ROM, 2, is RAM, 3 is interrupt controller, 4 is serial I/O.`
27			`!`
28
29			`!`
30			`! Where to place ROM and RAM for this test`
31			`!`
32			`rombas: equ $0000`
33			`rambas: equ rombas+1024`
34			`!`
35			`! Interrupt controller defines`
36			`!`
37			`intbas: equ $10`
38			`intmsk: equ intbas+$00 ! mask`
39			`intsts: equ intbas+$01 ! status`
40			`intact: equ intbas+$02 ! active interrupt`
41			`intpol: equ intbas+$03 ! polarity select`
42			`intedg: equ intbas+$04 ! edge/level select`
43			`intvec: equ intbas+$05 ! vector base page`
44			`!`
45			`! Mits Serial I/O card`
46			`!`
47			`siobas: equ $20`
48			`sioctl: equ siobas+$00 ! control register`
49			`siodat: equ siobas+$01 ! data`
50
51			`!`
52			`! Set up selectors`
53			`!`
54
55			`!`
56			`! ROM`
57			`!`
58			`mvi a,rombas shr 8 ! enable select 1 to 1kb at base`
59			`out sel1cmp`
60			`mvi a,($fc00 shr 8) or selenb`
61			`out sel1msk`
62			`!`
63			`! RAM`
64			`!`
65			`mvi a,rambas shr 8 ! enable select 2 to 1kb at base`
66			`out sel2cmp`
67			`mvi a,($fc00 shr 8) or selenb`
68			`out sel2msk`
69			`!`
70			`! ROM and RAM set up, exit bootstrap mode`
71			`!`
72			`mvi a,$00 ! exit bootstrap mode`
73			`out selmain`
74			`!`
75			`lxi sp,rambas+1024 ! set stack to top of ram`
76			`!`
77			`! Serial I/O`
78			`!`
79			`mvi a,siobas ! enable interrupt controller for 4 addresses`
80			`out sel4cmp`
81			`mvi a,$fc or selio or selenb`
82			`out sel4msk`
83			`!`
84			`! Print "hello, world" and stop`
85			`!`
86			`lxi h,helstr ! index string`
87			`loop:`
88			`mov a,m ! get character`
89			`inx h ! next character`
90			`ora a ! check end of string`
91			`jz endstr ! yes, skip`
92			`call wrtout ! output character`
93			`jmp loop ! loop next character`
94			`endstr:`
95			`!`
96			`! Copy characters from input to output`
97			`!`
98			`echo:`
99			`in sioctl ! check character waiting`
100			`ani $20`
101			`jz echo ! no, wait`
102			`in siodat ! yes, get character`
103			`call wrtout ! output`
104			`jmp echo ! loop forever`
105
106			`!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!`
107			`!`
108			`! Serial output routine`
109			`!`
110			`! Outputs the character in a.`
111			`!`
112			`wrtout:`
113			`push psw ! save character to output`
114			`wrtout01:`
115			`in sioctl ! get output ready status /n`
116			`ani $80 ! mask`
117			`jnz wrtout01 ! no, loop`
118			`pop psw ! restore character`
119			`out siodat ! output`
120			`ret ! return to caller`
121			`!`
122			`! String to print`
123			`!`
124			`helstr:`
125			`defb 'HELLO, FPGA WORLD\cr\lf', 0`
126
127

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[/] [cpu8080/] [trunk/] [project/] [test2.asm] - Blame information for rev 33