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samiam9512 |
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Release 8.2.02i Trace
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Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved.
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C:\Xilinx\bin\nt\trce.exe -ise C:/Xilinx/ISEexamples/cpu8080/cpu8080.ise
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-intstyle ise -e 3 -l 3 -s 4 -xml testbench testbench.ncd -o testbench.twr
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testbench.pcf -ucf cpu8080.ucf
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Design file: testbench.ncd
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Physical constraint file: testbench.pcf
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Device,speed: xc3s1000,-4 (PRODUCTION 1.39 2006-07-07)
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Report level: error report
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Environment Variable Effect
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-------------------- ------
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NONE No environment variables were set
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--------------------------------------------------------------------------------
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INFO:Timing:2698 - No timing constraints found, doing default enumeration.
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INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
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option. All paths that are not constrained will be reported in the
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unconstrained paths section(s) of the report.
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Data Sheet report:
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-----------------
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All values displayed in nanoseconds (ns)
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Setup/Hold to clock clock
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------------+------------+------------+------------------+--------+
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| Setup to | Hold to | | Clock |
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Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
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------------+------------+------------+------------------+--------+
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samiam9512 |
data<0> | 3.965(R)| -0.309(R)|clock_BUFGP | 0.000|
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| 3.199(F)| -0.202(F)|clock_BUFGP | 0.000|
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data<1> | 3.965(R)| -0.033(R)|clock_BUFGP | 0.000|
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| 3.694(F)| -0.028(F)|clock_BUFGP | 0.000|
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data<2> | 3.806(R)| -0.275(R)|clock_BUFGP | 0.000|
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| 3.822(F)| -0.542(F)|clock_BUFGP | 0.000|
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data<3> | 4.663(R)| -0.401(R)|clock_BUFGP | 0.000|
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| 4.530(F)| 0.157(F)|clock_BUFGP | 0.000|
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data<4> | 3.888(R)| -0.848(R)|clock_BUFGP | 0.000|
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| 4.667(F)| -0.763(F)|clock_BUFGP | 0.000|
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data<5> | 5.123(R)| -0.710(R)|clock_BUFGP | 0.000|
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| 2.118(F)| 0.337(F)|clock_BUFGP | 0.000|
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data<6> | 4.367(R)| -0.691(R)|clock_BUFGP | 0.000|
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| 3.737(F)| 0.118(F)|clock_BUFGP | 0.000|
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data<7> | 4.557(R)| 0.085(R)|clock_BUFGP | 0.000|
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| 2.327(F)| 0.669(F)|clock_BUFGP | 0.000|
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samiam9512 |
ps2_clk | 3.956(R)| -1.538(R)|clock_BUFGP | 0.000|
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ps2_data | 3.986(R)| -1.572(R)|clock_BUFGP | 0.000|
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samiam9512 |
------------+------------+------------+------------------+--------+
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Clock clock to Pad
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------------+------------+------------------+--------+
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| clk (edge) | | Clock |
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Destination | to PAD |Internal Clock(s) | Phase |
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------------+------------+------------------+--------+
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samiam9512 |
addr<0> | 11.887(R)|clock_BUFGP | 0.000|
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addr<1> | 11.680(R)|clock_BUFGP | 0.000|
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addr<2> | 12.448(R)|clock_BUFGP | 0.000|
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addr<3> | 12.087(R)|clock_BUFGP | 0.000|
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addr<4> | 11.631(R)|clock_BUFGP | 0.000|
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addr<5> | 11.367(R)|clock_BUFGP | 0.000|
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addr<6> | 11.240(R)|clock_BUFGP | 0.000|
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addr<7> | 11.104(R)|clock_BUFGP | 0.000|
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addr<8> | 13.222(R)|clock_BUFGP | 0.000|
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addr<9> | 13.102(R)|clock_BUFGP | 0.000|
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addr<10> | 11.433(R)|clock_BUFGP | 0.000|
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addr<11> | 11.752(R)|clock_BUFGP | 0.000|
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addr<12> | 11.557(R)|clock_BUFGP | 0.000|
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addr<13> | 11.823(R)|clock_BUFGP | 0.000|
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addr<14> | 12.086(R)|clock_BUFGP | 0.000|
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addr<15> | 10.479(R)|clock_BUFGP | 0.000|
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b<0> | 11.912(R)|clock_BUFGP | 0.000|
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b<1> | 13.348(R)|clock_BUFGP | 0.000|
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b<2> | 13.713(R)|clock_BUFGP | 0.000|
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data<0> | 21.980(R)|clock_BUFGP | 0.000|
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| 15.405(F)|clock_BUFGP | 0.000|
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data<1> | 21.150(R)|clock_BUFGP | 0.000|
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| 14.607(F)|clock_BUFGP | 0.000|
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data<2> | 22.440(R)|clock_BUFGP | 0.000|
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| 14.185(F)|clock_BUFGP | 0.000|
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data<3> | 21.021(R)|clock_BUFGP | 0.000|
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| 14.202(F)|clock_BUFGP | 0.000|
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data<4> | 21.733(R)|clock_BUFGP | 0.000|
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| 13.899(F)|clock_BUFGP | 0.000|
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data<5> | 23.040(R)|clock_BUFGP | 0.000|
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| 14.577(F)|clock_BUFGP | 0.000|
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data<6> | 21.711(R)|clock_BUFGP | 0.000|
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| 14.012(F)|clock_BUFGP | 0.000|
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data<7> | 20.985(R)|clock_BUFGP | 0.000|
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| 13.492(F)|clock_BUFGP | 0.000|
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diag<0> | 12.417(R)|clock_BUFGP | 0.000|
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diag<1> | 13.438(R)|clock_BUFGP | 0.000|
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diag<2> | 11.244(R)|clock_BUFGP | 0.000|
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diag<5> | 12.405(R)|clock_BUFGP | 0.000|
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diag<6> | 10.522(R)|clock_BUFGP | 0.000|
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diag<7> | 11.767(R)|clock_BUFGP | 0.000|
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g<0> | 12.302(R)|clock_BUFGP | 0.000|
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g<1> | 13.004(R)|clock_BUFGP | 0.000|
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g<2> | 16.784(R)|clock_BUFGP | 0.000|
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samiam9512 |
hsync_n | 7.261(R)|clock_BUFGP | 0.000|
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samiam9512 |
inta | 15.668(R)|clock_BUFGP | 0.000|
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intr | 15.964(F)|clock_BUFGP | 0.000|
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r<0> | 12.282(R)|clock_BUFGP | 0.000|
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r<1> | 13.004(R)|clock_BUFGP | 0.000|
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r<2> | 16.890(R)|clock_BUFGP | 0.000|
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readio | 11.788(R)|clock_BUFGP | 0.000|
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readmem | 11.248(R)|clock_BUFGP | 0.000|
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vsync_n | 12.408(R)|clock_BUFGP | 0.000|
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writeio | 12.165(R)|clock_BUFGP | 0.000|
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writemem | 9.619(R)|clock_BUFGP | 0.000|
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samiam9512 |
------------+------------+------------------+--------+
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Clock reset_n to Pad
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------------+------------+------------------+--------+
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| clk (edge) | | Clock |
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Destination | to PAD |Internal Clock(s) | Phase |
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------------+------------+------------------+--------+
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samiam9512 |
data<0> | 18.520(F)|reset_n_BUFGP | 0.000|
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data<1> | 17.029(F)|reset_n_BUFGP | 0.000|
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data<2> | 19.000(F)|reset_n_BUFGP | 0.000|
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data<3> | 18.089(F)|reset_n_BUFGP | 0.000|
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data<4> | 16.333(F)|reset_n_BUFGP | 0.000|
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data<5> | 17.180(F)|reset_n_BUFGP | 0.000|
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data<6> | 15.601(F)|reset_n_BUFGP | 0.000|
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data<7> | 15.365(F)|reset_n_BUFGP | 0.000|
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samiam9512 |
------------+------------+------------------+--------+
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Clock to Setup on destination clock clock
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---------------+---------+---------+---------+---------+
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| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
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Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
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---------------+---------+---------+---------+---------+
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samiam9512 |
clock | 19.080| 8.157| 9.474| 9.681|
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reset_n | 14.538| 14.538| 8.148| 8.148|
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samiam9512 |
---------------+---------+---------+---------+---------+
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samiam9512 |
Clock to Setup on destination clock reset_n
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---------------+---------+---------+---------+---------+
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| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
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Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
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---------------+---------+---------+---------+---------+
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samiam9512 |
clock | | | 9.853| |
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samiam9512 |
---------------+---------+---------+---------+---------+
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samiam9512 |
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samiam9512 |
Pad to Pad
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---------------+---------------+---------+
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Source Pad |Destination Pad| Delay |
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---------------+---------------+---------+
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samiam9512 |
ps2_clk |diag<3> | 6.287|
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ps2_data |diag<4> | 6.287|
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samiam9512 |
---------------+---------------+---------+
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samiam9512 |
Analysis completed Sat Nov 18 17:16:24 2006
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samiam9512 |
--------------------------------------------------------------------------------
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Trace Settings:
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-------------------------
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Trace Settings
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samiam9512 |
Peak Memory Usage: 183 MB
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samiam9512 |
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