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[/] [cpu8080/] [trunk/] [project/] [testbench.xst] - Blame information for rev 33

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Line No. Rev Author Line
1 2 samiam9512
set -tmpdir "./xst/projnav.tmp"
2 28 samiam9512
set -xsthdpdir "./xst"
3
run
4 2 samiam9512
-ifn testbench.prj
5
-ifmt mixed
6 28 samiam9512
-ofn testbench
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-ofmt NGC
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-p xc3s1000-4-ft256
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-top testbench
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-opt_mode Speed
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-opt_level 1
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-iuc NO
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-lso testbench.lso
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-keep_hierarchy NO
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-rtlview Yes
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-glob_opt AllClockNets
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-read_cores YES
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-write_timing_constraints NO
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-cross_clock_analysis NO
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-hierarchy_separator /
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-bus_delimiter <>
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-case maintain
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-slice_utilization_ratio 100
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-verilog2001 YES
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-fsm_extract YES -fsm_encoding Auto
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-safe_implementation No
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-fsm_style lut
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-ram_extract Yes
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-ram_style Auto
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-rom_extract Yes
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-mux_style Auto
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-decoder_extract YES
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-priority_extract YES
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-shreg_extract YES
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-shift_extract YES
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-xor_collapse YES
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-rom_style Auto
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-mux_extract YES
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-resource_sharing YES
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-mult_style auto
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-iobuf YES
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-max_fanout 500
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-bufg 8
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-register_duplication YES
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-register_balancing No
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-slice_packing YES
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-optimize_primitives NO
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-use_clock_enable Yes
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-use_sync_set Yes
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-use_sync_reset Yes
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-iob auto
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-equivalent_register_removal YES
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-slice_utilization_ratio_maxmargin 5

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