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samiam9512 |
<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>
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<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
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<TABLE BORDER CELLSPACING=0 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
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<TD COLSPAN='4'><B>CPU8080 Project Status</B></TD></TR>
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<TR ALIGN=LEFT>
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<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
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<TD>cpu8080.ise</TD>
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<TD BGCOLOR='#FFFF99'><B>Current State:</B></TD>
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<TD>Synthesized</TD>
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</TR>
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<TR ALIGN=LEFT>
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<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
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<TD>testbench</TD>
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<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>
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<TD ALIGN=LEFT>No Errors</TD>
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</TR>
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<TR ALIGN=LEFT>
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<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD>
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<TD>xc3s200-5pq208</TD>
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<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
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<TD ALIGN=LEFT>No Warnings</TD>
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</TR>
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<TR ALIGN=LEFT>
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<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD>
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<TD>ISE 8.2.02i</TD>
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<TD BGCOLOR='#FFFF99'><UL><LI><B>Updated:</B></LI></UL></TD>
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<TD>Fri Oct 6 08:33:24 2006</TD>
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</TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>CPU8080 Partition Summary</B></TD></TR>
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<TR><TD COLSPAN='4'>No partition information was found.</TD></TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>Device Utilization Summary (estimated values)</B></TD></TR>
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<TR ALIGN=CENTER BGCOLOR='#FFFF99'>
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<TD ALIGN=LEFT><B>Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD></TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slices</TD>
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<TD ALIGN=RIGHT>1139</TD>
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<TD ALIGN=RIGHT>1920</TD>
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<TD ALIGN=RIGHT>59%</TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Flip Flops</TD>
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<TD ALIGN=RIGHT>371</TD>
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<TD ALIGN=RIGHT>3840</TD>
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<TD ALIGN=RIGHT>9%</TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of 4 input LUTs</TD>
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<TD ALIGN=RIGHT>2153</TD>
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<TD ALIGN=RIGHT>3840</TD>
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<TD ALIGN=RIGHT>56%</TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded IOBs</TD>
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<TD ALIGN=RIGHT>33</TD>
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<TD ALIGN=RIGHT>141</TD>
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<TD ALIGN=RIGHT>23%</TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BRAMs</TD>
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<TD ALIGN=RIGHT>1</TD>
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<TD ALIGN=RIGHT>12</TD>
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<TD ALIGN=RIGHT>8%</TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GCLKs</TD>
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<TD ALIGN=RIGHT>2</TD>
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<TD ALIGN=RIGHT>8</TD>
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<TD ALIGN=RIGHT>25%</TD>
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</TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='6'><B>Detailed Reports</B></TD></TR>
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<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
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<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT><B>Infos</B></TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Thu Oct 5 23:01:08 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
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<TR ALIGN=LEFT><TD>Translation Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR>
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<TR ALIGN=LEFT><TD>Map Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR>
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<TR ALIGN=LEFT><TD>Place and Route Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR>
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<TR ALIGN=LEFT><TD>Static Timing Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR>
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<TR ALIGN=LEFT><TD>Bitgen Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='3'><B>Secondary Reports</B></TD></TR>
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<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD></TR>
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<TR ALIGN=LEFT><TD>Xplorer Report</TD><TD> </TD><TD> </TD></TR>
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</TABLE>
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</BODY></HTML>
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