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[/] [cpu_lecture/] [trunk/] [Makefile] - Blame information for rev 12

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Line No. Rev Author Line
1 3 jsauermann
PROJECT=avr_core
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# the vhdl source files (except testbench)
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#
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FILES           += src/*.vhd
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# the testbench sources and binary.
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#
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SIMFILES        = test/test_tb.vhd test/RAMB4_S4_S4.vhd
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SIMTOP          = testbench
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# When to stop the simulation
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#
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# GHDL_SIM_OPT  = --assert-level=error
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GHDL_SIM_OPT    = --stop-time=40us
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SIMDIR          = simu
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FLAGS           = --ieee=synopsys --warn-no-vital-generic -fexplicit --std=93c
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all:
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        make compile
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        make run 2>& 1 | grep -v std_logic_arith
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        make view
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compile:
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        @mkdir -p simu
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        @echo -----------------------------------------------------------------
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        ghdl -i $(FLAGS) --workdir=simu --work=work $(SIMFILES) $(FILES)
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        @echo
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        @echo -----------------------------------------------------------------
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        ghdl -m $(FLAGS) --workdir=simu --work=work $(SIMTOP)
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        @echo
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        @mv $(SIMTOP) simu/$(SIMTOP)
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run:
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        @$(SIMDIR)/$(SIMTOP) $(GHDL_SIM_OPT) --vcdgz=$(SIMDIR)/$(SIMTOP).vcdgz
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view:
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        gunzip --stdout $(SIMDIR)/$(SIMTOP).vcdgz | gtkwave --vcd gtkwave.save
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clean:
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        ghdl --clean --workdir=simu
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