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-------------------------------------------------------------------------------
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--
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-- Copyright (C) 2009, 2010 Dr. Juergen Sauermann
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--
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-- This code is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This code is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this code (see the file named COPYING).
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-- If not, see http://www.gnu.org/licenses/.
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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-- Module Name: segment7 - Behavioral
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-- Create Date: 12:52:16 11/11/2009
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-- Description: a 7 segment LED display interface.
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--
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-------------------------------------------------------------------------------
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--
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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entity segment7 is
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port ( I_CLK : in std_logic;
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I_CLR : in std_logic;
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I_OPC : in std_logic_vector(15 downto 0);
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I_PC : in std_logic_vector(15 downto 0);
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Q_7_SEGMENT : out std_logic_vector( 6 downto 0));
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end segment7;
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-- Signal Loc Alt
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---------------------------
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-- SEG_LED(0) V3 A
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-- SEG_LED(1) V4 B
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-- SEG_LED(2) W3 C
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-- SEG_LED(3) T4 D
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-- SEG_LED(4) T3 E
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-- SEG_LED(5) U3 F
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-- SEG_LED(6) U4 G
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--
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architecture Behavioral of segment7 is
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function lmap(VAL: std_logic_vector( 3 downto 0))
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return std_logic_vector is
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begin
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case VAL is -- 6543210
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when "0000" => return "0111111"; -- 0
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when "0001" => return "0000110"; -- 1
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when "0010" => return "1011011"; -- 2
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when "0011" => return "1001111"; -- 3
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when "0100" => return "1100110"; -- 4 ----A---- ----0----
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when "0101" => return "1101101"; -- 5 | | | |
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when "0110" => return "1111101"; -- 6 F B 5 1
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when "0111" => return "0000111"; -- 7 | | | |
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when "1000" => return "1111111"; -- 8 +---G---+ +---6---+
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when "1001" => return "1101111"; -- 9 | | | |
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when "1010" => return "1110111"; -- A E C 4 2
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when "1011" => return "1111100"; -- b | | | |
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when "1100" => return "0111001"; -- C ----D---- ----3----
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when "1101" => return "1011110"; -- d
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when "1110" => return "1111001"; -- E
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when others => return "1110001"; -- F
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end case;
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end;
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signal L_CNT : std_logic_vector(27 downto 0);
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signal L_OPC : std_logic_vector(15 downto 0);
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signal L_PC : std_logic_vector(15 downto 0);
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signal L_POS : std_logic_vector( 3 downto 0);
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begin
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process(I_CLK) -- 20 MHz
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begin
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if (rising_edge(I_CLK)) then
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if (I_CLR = '1') then
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L_POS <= "0000";
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L_CNT <= X"0000000";
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Q_7_SEGMENT <= "1111111";
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else
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L_CNT <= L_CNT + X"0000001";
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if (L_CNT = X"0C00000") then
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Q_7_SEGMENT <= "1111111"; -- blank
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elsif (L_CNT = X"1000000") then
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L_CNT <= X"0000000";
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L_POS <= L_POS + "0001";
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case L_POS is
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when "0000" => -- blank
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Q_7_SEGMENT <= "1111111";
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when "0001" =>
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L_PC <= I_PC; -- sample PC
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L_OPC <= I_OPC; -- sample OPC
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Q_7_SEGMENT <= not lmap(L_PC(15 downto 12));
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when "0010" =>
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Q_7_SEGMENT <= not lmap(L_PC(11 downto 8));
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when "0011" =>
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Q_7_SEGMENT <= not lmap(L_PC( 7 downto 4));
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when "0100" =>
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Q_7_SEGMENT <= not lmap(L_PC( 3 downto 0));
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when "0101" => -- minus
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Q_7_SEGMENT <= "0111111";
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when "0110" =>
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Q_7_SEGMENT <= not lmap(L_OPC(15 downto 12));
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when "0111" =>
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Q_7_SEGMENT <= not lmap(L_OPC(11 downto 8));
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when "1000" =>
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Q_7_SEGMENT <= not lmap(L_OPC( 7 downto 4));
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when "1001" =>
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Q_7_SEGMENT <= not lmap(L_OPC( 3 downto 0));
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L_POS <= "0000";
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when others =>
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L_POS <= "0000";
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end case;
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end if;
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end if;
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end if;
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end process;
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end Behavioral;
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