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[/] [cryptosorter/] [trunk/] [memocodeDesignContest2008/] [ctrl/] [build/] [Makefile] - Blame information for rev 6

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BSC_COMP = bsc
 
ctrldir = ..
plbdir = ../../xup/PLBMaster
bramdir = ../../../memocodeDesignContest07/hardware/BRAMTarget/
feederdir = ../../../memocodeDesignContest07/hardware/Feeder
commondir = ../../xup/Common
memo_common_dir = ../../common
external_memory_dir = ../../xup/ExternalMemory
sortdir = ../../sort
aesdir  = ../../aesCore/bsv
sort_fifos = ../../sort/BRAMLevelFIFOAdders
sort_muxes = ../../sort/BRAMLevelFIFOMuxes
alfred_bram = ../../sort/BRAM_v
 
v_dir   = ../../aesCore/verilog/rtl/verilog
pv_dir  = ../../aesCorePipelined
#coregen_dir = ../../aesCore/verilog/rtl/coregen/aesDataFifo
#corelib_dir = ../../common/verilog/src/XilinxCoreLib
#prim_dir =  ../../common/verilog/src/uni9000/
#unisim_dir =  ../../common/verilog/src/unisims/
sim_base = ../../common/verilog/
ref_dir = ../ref_pc
 
VER_OPTS =  +RTS -K100000000 --RTS -u -v -verilog -aggressive-conditions -dschedule -show-schedule -show-rule-rel \* \* -vdir .
SIM_OPTS =  +RTS -K100000000 --RTS -u -v -sim -aggressive-conditions -show-schedule
SRCDIRS = :$(plbdir):$(commondir):$(memo_common_dir):$(external_memory_dir):$(bramdir):$(ctrldir):$(sortdir):$(aesdir):$(sort_fifos):$(bram_target_dir):$(sort_muxes):$(alfred_bram)
 
#--------------------------------------------------------------------
# Build targets
#--------------------------------------------------------------------
#Need to fix up MAXRECORD
mkTH.v: $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=10 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=10 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv > out.log
 
vsim: mkTH.v
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir)$(sim_base):$(alfred_bram) -e mkTH *.v >> out.log
 
mkEMTB.v: $(ctrldir)/mkTester.bsv
        $(BSC_COMP) $(VER_OPTS) -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkEMTB $(ctrldir)/mkTester.bsv
 
 
emtb: mkEMTB.v
        $(BSC_COMP) $(VER_OPTS) -p +$(SRCDIRS) -vsim iverilog -e mkEMTB mkEMTB.v
 
 
ftb:
        $(BSC_COMP) $(SIM_OPTS) -bdir . -p +$(SRCDIRS) -g mk421TB $(ctrldir)/mkTester.bsv
        $(BSC_COMP) $(SIM_OPTS) -bdir . -e mk421TB *.ba
 
smoke:
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=10 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=10 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=11 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=11 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=12 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=12 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=13 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=13 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=14 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=14 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        cp $(coregen_dir)/*.mif .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=15 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=15 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        cp $(coregen_dir)/*.mif .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=16 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=16 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        cp $(coregen_dir)/*.mif .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=17 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=17 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        cp $(coregen_dir)/*.mif .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
        touch $(ctrldir)/mkCtrl.bsv
        gcc -o aes.exe -DLOGVAL=18 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c
        ./aes.exe
        $(BSC_COMP) $(VER_OPTS) -D LogArrayLen=18 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv
        cp $(v_dir)/*.v .
        cp $(coregen_dir)/*.mif .
        $(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \
                +:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v
        ./a.out
 
 
 
 
#--------------------------------------------------------------------
# Clean up
#--------------------------------------------------------------------
 
clean :
        rm -rf $(junk) *~ \#* *.cxx *.ba *.o *.h *.bi *.bo *.bsv *.v *.log *.so a.out

Line No.	Rev	Author	Line
1	3	kfleming
2			`BSC_COMP = bsc`
3
4			`ctrldir = ..`
5			`plbdir = ../../xup/PLBMaster`
6			`bramdir = ../../../memocodeDesignContest07/hardware/BRAMTarget/`
7			`feederdir = ../../../memocodeDesignContest07/hardware/Feeder`
8			`commondir = ../../xup/Common`
9			`memo_common_dir = ../../common`
10			`external_memory_dir = ../../xup/ExternalMemory`
11			`sortdir = ../../sort`
12			`aesdir = ../../aesCore/bsv`
13			`sort_fifos = ../../sort/BRAMLevelFIFOAdders`
14			`sort_muxes = ../../sort/BRAMLevelFIFOMuxes`
15			`alfred_bram = ../../sort/BRAM_v`
16
17			`v_dir = ../../aesCore/verilog/rtl/verilog`
18			`pv_dir = ../../aesCorePipelined`
19			`#coregen_dir = ../../aesCore/verilog/rtl/coregen/aesDataFifo`
20			`#corelib_dir = ../../common/verilog/src/XilinxCoreLib`
21			`#prim_dir = ../../common/verilog/src/uni9000/`
22			`#unisim_dir = ../../common/verilog/src/unisims/`
23			`sim_base = ../../common/verilog/`
24			`ref_dir = ../ref_pc`
25
26			`VER_OPTS = +RTS -K100000000 --RTS -u -v -verilog -aggressive-conditions -dschedule -show-schedule -show-rule-rel \* \* -vdir .`
27			`SIM_OPTS = +RTS -K100000000 --RTS -u -v -sim -aggressive-conditions -show-schedule`
28			`SRCDIRS = :$(plbdir):$(commondir):$(memo_common_dir):$(external_memory_dir):$(bramdir):$(ctrldir):$(sortdir):$(aesdir):$(sort_fifos):$(bram_target_dir):$(sort_muxes):$(alfred_bram)`
29
30			`#--------------------------------------------------------------------`
31			`# Build targets`
32			`#--------------------------------------------------------------------`
33			`#Need to fix up MAXRECORD`
34			`mkTH.v: $(ctrldir)/mkCtrl.bsv`
35			`gcc -o aes.exe -DLOGVAL=10 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
36			`./aes.exe`
37			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=10 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv > out.log`
38
39			`vsim: mkTH.v`
40			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
41			`+:$(v_dir):$(pv_dir):$(commondir)$(sim_base):$(alfred_bram) -e mkTH *.v >> out.log`
42
43			`mkEMTB.v: $(ctrldir)/mkTester.bsv`
44			`$(BSC_COMP) $(VER_OPTS) -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkEMTB $(ctrldir)/mkTester.bsv`
45
46
47			`emtb: mkEMTB.v`
48			`$(BSC_COMP) $(VER_OPTS) -p +$(SRCDIRS) -vsim iverilog -e mkEMTB mkEMTB.v`
49
50
51			`ftb:`
52			`$(BSC_COMP) $(SIM_OPTS) -bdir . -p +$(SRCDIRS) -g mk421TB $(ctrldir)/mkTester.bsv`
53			`$(BSC_COMP) $(SIM_OPTS) -bdir . -e mk421TB *.ba`
54
55			`smoke:`
56			`touch $(ctrldir)/mkCtrl.bsv`
57			`gcc -o aes.exe -DLOGVAL=10 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
58			`./aes.exe`
59			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=10 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
60			`cp $(v_dir)/*.v .`
61			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
62			`+:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v`
63			`./a.out`
64
65
66			`touch $(ctrldir)/mkCtrl.bsv`
67			`gcc -o aes.exe -DLOGVAL=11 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
68			`./aes.exe`
69			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=11 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
70			`cp $(v_dir)/*.v .`
71			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
72			`+:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v`
73			`./a.out`
74
75
76			`touch $(ctrldir)/mkCtrl.bsv`
77			`gcc -o aes.exe -DLOGVAL=12 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
78			`./aes.exe`
79			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=12 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
80			`cp $(v_dir)/*.v .`
81			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
82			`+:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v`
83			`./a.out`
84
85
86			`touch $(ctrldir)/mkCtrl.bsv`
87			`gcc -o aes.exe -DLOGVAL=13 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
88			`./aes.exe`
89			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=13 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
90			`cp $(v_dir)/*.v .`
91			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
92			`+:$(v_dir):$(pv_dir):$(commondir):$(sim_base):$(alfred_bram) -e mkTH *.v`
93			`./a.out`
94
95
96			`touch $(ctrldir)/mkCtrl.bsv`
97			`gcc -o aes.exe -DLOGVAL=14 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
98			`./aes.exe`
99			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=14 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
100			`cp $(v_dir)/*.v .`
101			`cp $(coregen_dir)/*.mif .`
102			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
103			`+:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v`
104			`./a.out`
105
106
107			`touch $(ctrldir)/mkCtrl.bsv`
108			`gcc -o aes.exe -DLOGVAL=15 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
109			`./aes.exe`
110			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=15 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
111			`cp $(v_dir)/*.v .`
112			`cp $(coregen_dir)/*.mif .`
113			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
114			`+:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v`
115			`./a.out`
116
117
118			`touch $(ctrldir)/mkCtrl.bsv`
119			`gcc -o aes.exe -DLOGVAL=16 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
120			`./aes.exe`
121			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=16 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
122			`cp $(v_dir)/*.v .`
123			`cp $(coregen_dir)/*.mif .`
124			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
125			`+:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v`
126			`./a.out`
127
128
129			`touch $(ctrldir)/mkCtrl.bsv`
130			`gcc -o aes.exe -DLOGVAL=17 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
131			`./aes.exe`
132			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=17 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
133			`cp $(v_dir)/*.v .`
134			`cp $(coregen_dir)/*.mif .`
135			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
136			`+:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v`
137			`./a.out`
138
139			`touch $(ctrldir)/mkCtrl.bsv`
140			`gcc -o aes.exe -DLOGVAL=18 -I$(ref_dir) ../gen_test_array.c $(ref_dir)/recordio.c $(ref_dir)/aes_core.c`
141			`./aes.exe`
142			`$(BSC_COMP) $(VER_OPTS) -D LogArrayLen=18 -v -scheduler-effort 1 -bdir . -p +$(SRCDIRS) -g mkTH $(ctrldir)/mkCtrl.bsv`
143			`cp $(v_dir)/*.v .`
144			`cp $(coregen_dir)/*.mif .`
145			`$(BSC_COMP) $(VER_OPTS) -vsim iverilog -p \`
146			`+:$(v_dir):$(pv_dir):$(commondir):$(coregen_dir):$(corelib_dir):$(prim_dir):$(unisim_dir):$(sim_base):$(alfred_bram) -e mkTH *.v`
147			`./a.out`
148
149
150
151
152			`#--------------------------------------------------------------------`
153			`# Clean up`
154			`#--------------------------------------------------------------------`
155
156			`clean :`
157			`rm -rf $(junk) ~ \# .cxx .ba .o .h .bi .bo .bsv .v .log .so a.out`

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[/] [cryptosorter/] [trunk/] [memocodeDesignContest2008/] [ctrl/] [build/] [Makefile] - Blame information for rev 6