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[/] [cryptosorter/] [trunk/] [readme.txt] - Blame information for rev 6
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There are many files included in this distribution. However, the following
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files implement the core functionality of the design and should be examined
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to get a flavor of the design operation. All path names are given relative
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to the base directory.
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memocodeDesignContest07/hardware/Feeder/BRAMFeeder.bsv
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memocodeDesignContest2008/aesCores/bsv/aesCipherTop.bsv - controller for aesCores
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memocodeDesignContest2008/sort/Sort.bsv - Builds a full sort treee from VLevel FIFOs
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memocodeDesignContest2008/sort/BRAMLevelFIFOAdders/BRAMVLevelFIFO.bsv - time multiplexes a BRAM between multiple
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logical fifos. This is the key module in the sort tree.
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memocodeDesignContest2008/ctrl/mkCtrl.bsv - control module orchestrating memory, the sorter, and the aes.
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memocodeDesignContest2008/xup/PLBMaster/PLBMaster.bsv - Parametric PLB bus master
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memocodeDesignContest2008/xup/Top/Sorter.bsv - top level module
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If you would like to build the code, there are a few useful targets to
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consider. The xup directory contains several fpga implementations.
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These were built using Xilinx EDK 9.2. The precise build recipe is below:
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cd memocodeDesignContest2008/xup/build/
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make top_verilog
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Of course, this merely builds the hardware. Some effort is required to
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place a working copy on the fpga. Please email the project owners for
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details on how to do this.
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