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[/] [csa/] [trunk/] [bench/] [decrypt_tb.v] - Blame information for rev 49

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1 18 simon111
 
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// this is the test bench for decrypt module
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`include "../bench/timescale.v"
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module decrypt_tb;
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reg clk;
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reg rst;
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integer bytes;
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integer out_bytes;
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integer offset;
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reg      [  8*8-1   : 0]  even_cw;
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reg      [  8*8-1   : 0]  odd_cw;
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reg      [    8-1   : 0]  encrypted_byte;
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reg      [8*8-1:0]    ck;
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reg                   even_odd;
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reg                   en;
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reg                   key_en;
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reg      [  8-1:0]    enc;
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wire     [  8-1:0]    dec;
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wire                  valid;
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initial
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begin
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        $read_data(
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                                "../test_dat/decrypt.in"
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                               ,even_cw
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                  );
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        $read_data(
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                                "../test_dat/decrypt.in"
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                               ,8
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                               ,odd_cw
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                  );
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        encrypted_byte=8'h00; // or can not read data
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        out_bytes = 1;
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        en=0;
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        key_en=0;
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        repeat(14)@(posedge clk);
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        // set even cw 
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        @(posedge clk);
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        ck=even_cw;
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        en=0;
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        even_odd=0;
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        @(posedge clk);
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        key_en=1;
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        @(posedge clk);
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        key_en=0;
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        repeat (11) @(posedge clk);
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        // set odd key
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        @(posedge clk);
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        ck=odd_cw;
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        en=0;
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        even_odd=1;
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        @(posedge clk);
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        key_en=1;
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        @(posedge clk);
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        key_en=0;
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        repeat (11)@(posedge clk);
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        repeat(4)@(posedge clk);
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        // decrypt
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        for(bytes=1;bytes<=188;bytes=bytes+1)
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        begin
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                offset=16+(bytes-1);
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                $read_data(
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                                   "../test_dat/decrypt.in"
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                                ,  offset
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                                ,  encrypted_byte
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                        );
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                enc=encrypted_byte;
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                en=1;
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              //  @(posedge clk);
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              //  en=0;
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                @(posedge clk);
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        end
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        repeat(44) @(posedge clk);
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        $stop;
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end
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always @(posedge clk)
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        if(valid)
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        begin
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                if(out_bytes==1)
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                begin
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        $write_data(
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                                 "../test_dat/decrypt.out.v"
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                                ,dec
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                   );
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                end
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                else
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                begin
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        $write_data(
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                                 "../test_dat/decrypt.out.v"
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                                ,"a"
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                                ,dec
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                   );
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                end
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                out_bytes=out_bytes+1;
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        end
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decrypt b(
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                  .clk        (clk)
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                , .rst        (rst)
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                , .ck         (ck)
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                , .key_en     (key_en)
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                , .even_odd   (even_odd)
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                , .en         (en)
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                , .encrypted  (enc)
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                , .decrypted  (dec)
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                , .valid      (valid)
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                );
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initial
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begin
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        clk<=1'b0;
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        forever #5 clk=~clk;
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end
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initial
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begin
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        rst<=1'b1;
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        @(posedge clk);
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        @(posedge clk);
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        rst=1'h0;
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end
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endmodule

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