OpenCores
URL https://opencores.org/ocsvn/darkriscv/darkriscv/trunk

Subversion Repositories darkriscv

[/] [darkriscv/] [trunk/] [Makefile] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 marcelos
#
2
# Copyright (c) 2018, Marcelo Samsoniuk
3
# All rights reserved.
4
#
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions are met:
7
#
8
# * Redistributions of source code must retain the above copyright notice, this
9
#   list of conditions and the following disclaimer.
10
#
11
# * Redistributions in binary form must reproduce the above copyright notice,
12
#   this list of conditions and the following disclaimer in the documentation
13
#   and/or other materials provided with the distribution.
14
#
15
# * Neither the name of the copyright holder nor the names of its
16
#   contributors may be used to endorse or promote products derived from
17
#   this software without specific prior written permission.
18
#
19
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
23
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25
# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26
# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
#
30
# ===8<--------------------------------------------------------- cut here!
31
#
32
# This the root makefile and the function of this file is call other
33
# makefiles. Of course, you need first set the GCC compiler path/name, the
34
# simulator path/name and the board model:
35
#
36
   ARCH = rv32e
37
#  ARCH = rv32i
38
#ENDIAN = _le
39
#ENDIAN = _be
40
HARVARD = 1
41
# CROSS = riscv-elf
42
# CROSS = riscv32-unknown-elf
43
# CROSS = riscv32-embedded-elf
44
  CROSS = riscv32-embedded$(ENDIAN)-elf
45
#CCPATH = /usr/local/share/toolchain-$(CROSS)/bin
46
 CCPATH = /usr/local/share/gcc-$(CROSS)/bin/
47
 ICARUS = /usr/local/bin/iverilog
48
#BOARD  = avnet_microboard_lx9
49
#BOARD  = xilinx_ac701_a200
50
#BOARD  = qmtech_sdram_lx16
51
#BOARD  = lattice_brevia2_xp2
52
#BOARD = piswords_rs485_lx9
53
#BOARD = digilent_spartan3_s200
54
BOARD = aliexpress_hpc40gbe_k420
55
 
56
# now you can just type 'make'
57
 
58
ifdef HARVARD
59
        MTYPE = HARVARD=1
60
        ROM = src/darksocv.rom.mem                  # requires gcc for riscv
61
        RAM = src/darksocv.ram.mem                  # requires gcc for riscv
62
else
63
        MEM = src/darksocv.mem
64
endif
65
 
66
SIM = sim/darksocv.vcd                      # requires icarus verilog
67
BIT = tmp/darksocv.bit                      # requires FPGA build tool
68
 
69
default: all
70
 
71
all:
72
        make -C src all             CROSS=$(CROSS) CCPATH=$(CCPATH) ARCH=$(ARCH) $(MTYPE)
73
        make -C sim all             ICARUS=$(ICARUS) $(MTYPE)
74
        make -C boards all          BOARD=$(BOARD) $(MTYPE)
75
 
76
install:
77
        make -C boards install      BOARD=$(BOARD)
78
 
79
clean:
80
        make -C src clean
81
        make -C sim clean
82
        make -C boards clean        BOARD=$(BOARD)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.