Subversion Repositories darkriscv

# Copyright (c) 2018, Marcelo Samsoniuk

# All rights reserved.

#

# Redistribution and use in source and binary forms, with or without

# modification, are permitted provided that the following conditions are met:

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# * Redistributions of source code must retain the above copyright notice, this

#   list of conditions and the following disclaimer.

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#   this list of conditions and the following disclaimer in the documentation

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#   this software without specific prior written permission.

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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

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#NET "CLK" TNM_NET = CLK;

# without cache controller

#TIMESPEC TS_CLK = PERIOD "CLK" 75MHz HIGH 50%;

# with cache controller

#TIMESPEC TS_CLK = PERIOD "CLK" 75MHz HIGH 50%;

# AVNET board LX9 microboard

NET XCLK            LOC = C10 | PERIOD = 100MHz HIGH 50%;

#NET XCLK            LOC = K15 | PERIOD = 66MHz HIGH 50%;

#NET XCLK            LOC = V10 | PERIOD = 40MHz HIGH 50%;

NET XRES            LOC = V4  | PULLDOWN;

NET UART_RXD        LOC = R7;

NET UART_TXD        LOC = T7;

NET LED[3]          LOC = P4;

NET LED[2]          LOC = L6;

NET LED[1]          LOC = F5;

NET LED[0]          LOC = C2;

NET DEBUG[3]        LOC = H12; # J4-1

NET DEBUG[2]        LOC = G13; # J4-2

NET DEBUG[1]        LOC = E16; # J4-3

NET DEBUG[0]        LOC = E18; # J4-4