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[/] [darkriscv/] [trunk/] [boards/] [avnet_microboard_lx9/] [darksocv.ucf] - Blame information for rev 2

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1 2 marcelos
# Copyright (c) 2018, Marcelo Samsoniuk
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# * Redistributions of source code must retain the above copyright notice, this
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#   list of conditions and the following disclaimer.
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#
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# * Redistributions in binary form must reproduce the above copyright notice,
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#   this list of conditions and the following disclaimer in the documentation
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#   and/or other materials provided with the distribution.
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#
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# * Neither the name of the copyright holder nor the names of its
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#   contributors may be used to endorse or promote products derived from
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#   this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#NET "CLK" TNM_NET = CLK;
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# without cache controller
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#TIMESPEC TS_CLK = PERIOD "CLK" 75MHz HIGH 50%;
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# with cache controller
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#TIMESPEC TS_CLK = PERIOD "CLK" 75MHz HIGH 50%;
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# AVNET board LX9 microboard
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NET XCLK            LOC = C10 | PERIOD = 100MHz HIGH 50%;
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#NET XCLK            LOC = K15 | PERIOD = 66MHz HIGH 50%;
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#NET XCLK            LOC = V10 | PERIOD = 40MHz HIGH 50%;
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NET XRES            LOC = V4  | PULLDOWN;
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NET UART_RXD        LOC = R7;
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NET UART_TXD        LOC = T7;
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NET LED[3]          LOC = P4;
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NET LED[2]          LOC = L6;
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NET LED[1]          LOC = F5;
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NET LED[0]          LOC = C2;
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NET DEBUG[3]        LOC = H12; # J4-1
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NET DEBUG[2]        LOC = G13; # J4-2
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NET DEBUG[1]        LOC = E16; # J4-3
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NET DEBUG[0]        LOC = E18; # J4-4

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