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[/] [dbg_interface/] [trunk/] [rtl/] [verilog/] [dbg_wb_defines.v] - Blame information for rev 138

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//////////////////////////////////////////////////////////////////////
////                                                              ////
////  dbg_wb_defines.v                                            ////
////                                                              ////
////                                                              ////
////  This file is part of the SoC/OpenRISC Development Interface ////
////  http://www.opencores.org/projects/DebugInterface/           ////
////                                                              ////
////  Author(s):                                                  ////
////       Igor Mohor (igorm@opencores.org)                       ////
////                                                              ////
////                                                              ////
////  All additional information is avaliable in the README.txt   ////
////  file.                                                       ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2000 - 2004 Authors                            ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
////                                                              ////
//// This source file is free software; you can redistribute it   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any   ////
//// later version.                                               ////
////                                                              ////
//// This source is distributed in the hope that it will be       ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// PURPOSE.  See the GNU Lesser General Public License for more ////
//// details.                                                     ////
////                                                              ////
//// You should have received a copy of the GNU Lesser General    ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
//
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.4  2004/01/16 14:51:33  mohor
// cpu registers added.
//
// Revision 1.3  2004/01/08 17:53:36  mohor
// tmp version.
//
// Revision 1.2  2004/01/06 17:15:19  mohor
// temp3 version.
//
// Revision 1.1  2003/12/23 15:09:04  mohor
// New directory structure. New version of the debug interface.
//
//
//
 
// Defining length of the command
`define DBG_WB_CMD_LEN        3'd3
`define DBG_WB_CMD_CNT_WIDTH  3
 
// Defining length of the address
`define DBG_WB_ADR_LEN        6'd32
 
// Defining length of the length register
`define DBG_WB_LEN_LEN        5'd16
 
// Defining length of the CRC
`define DBG_WB_CRC_LEN        6'd32
 
// Defining commands for wishbone
`define WB_STATUS     3'h0
`define WB_WRITE8     3'h1
`define WB_WRITE16    3'h2
`define WB_WRITE32    3'h3
`define WB_GO         3'h4
`define WB_READ8      3'h5
`define WB_READ16     3'h6
`define WB_READ32     3'h7
 
 
// Length of status
`define DBG_WB_STATUS_LEN     4
 
 

Line No.	Rev	Author	Line
1	82	mohor	`//////////////////////////////////////////////////////////////////////`
2			`//// ////`
3			`//// dbg_wb_defines.v ////`
4			`//// ////`
5			`//// ////`
6			`//// This file is part of the SoC/OpenRISC Development Interface ////`
7			`//// http://www.opencores.org/projects/DebugInterface/ ////`
8			`//// ////`
9			`//// Author(s): ////`
10			`//// Igor Mohor (igorm@opencores.org) ////`
11			`//// ////`
12			`//// ////`
13			`//// All additional information is avaliable in the README.txt ////`
14			`//// file. ////`
15			`//// ////`
16			`//////////////////////////////////////////////////////////////////////`
17			`//// ////`
18	138	igorm	`//// Copyright (C) 2000 - 2004 Authors ////`
19	82	mohor	`//// ////`
20			`//// This source file may be used and distributed without ////`
21			`//// restriction provided that this copyright statement is not ////`
22			`//// removed from the file and that any derivative work contains ////`
23			`//// the original copyright notice and the associated disclaimer. ////`
24			`//// ////`
25			`//// This source file is free software; you can redistribute it ////`
26			`//// and/or modify it under the terms of the GNU Lesser General ////`
27			`//// Public License as published by the Free Software Foundation; ////`
28			`//// either version 2.1 of the License, or (at your option) any ////`
29			`//// later version. ////`
30			`//// ////`
31			`//// This source is distributed in the hope that it will be ////`
32			`//// useful, but WITHOUT ANY WARRANTY; without even the implied ////`
33			`//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////`
34			`//// PURPOSE. See the GNU Lesser General Public License for more ////`
35			`//// details. ////`
36			`//// ////`
37			`//// You should have received a copy of the GNU Lesser General ////`
38			`//// Public License along with this source; if not, download it ////`
39			`//// from http://www.opencores.org/lgpl.shtml ////`
40			`//// ////`
41			`//////////////////////////////////////////////////////////////////////`
42			`//`
43			`// CVS Revision History`
44			`//`
45			`// $Log: not supported by cvs2svn $`
46	138	igorm	`// Revision 1.4 2004/01/16 14:51:33 mohor`
47			`// cpu registers added.`
48			`//`
49	99	mohor	`// Revision 1.3 2004/01/08 17:53:36 mohor`
50			`// tmp version.`
51			`//`
52	90	mohor	`// Revision 1.2 2004/01/06 17:15:19 mohor`
53			`// temp3 version.`
54			`//`
55	88	mohor	`// Revision 1.1 2003/12/23 15:09:04 mohor`
56			`// New directory structure. New version of the debug interface.`
57	82	mohor	`//`
58			`//`
59	88	mohor	`//`
60	82	mohor
61	138	igorm	`// Defining length of the command`
62			`define DBG_WB_CMD_LEN 3'd3
63			`define DBG_WB_CMD_CNT_WIDTH 3
64	82	mohor
65	138	igorm	`// Defining length of the address`
66			`define DBG_WB_ADR_LEN 6'd32
67
68			`// Defining length of the length register`
69			`define DBG_WB_LEN_LEN 5'd16
70
71			`// Defining length of the CRC`
72			`define DBG_WB_CRC_LEN 6'd32
73
74	82	mohor	`// Defining commands for wishbone`
75			`define WB_STATUS 3'h0
76			`define WB_WRITE8 3'h1
77			`define WB_WRITE16 3'h2
78			`define WB_WRITE32 3'h3
79			`define WB_GO 3'h4
80			`define WB_READ8 3'h5
81			`define WB_READ16 3'h6
82			`define WB_READ32 3'h7
83
84
85			`// Length of status`
86	138	igorm	`define DBG_WB_STATUS_LEN 4
87	82	mohor
88	138	igorm

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[/] [dbg_interface/] [trunk/] [rtl/] [verilog/] [dbg_wb_defines.v] - Blame information for rev 138