OpenCores
URL https://opencores.org/ocsvn/dblclockfft/dblclockfft/trunk

Subversion Repositories dblclockfft

[/] [dblclockfft/] [trunk/] [sw/] [Makefile] - Blame information for rev 19

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 16 dgisselq
############################################################################/
2
##
3
## Filename:    fftgen.v
4
##
5
## Project:     A Doubletime Pipelined FFT
6
##
7
## Purpose:     This is the main Makefile for the FFT core generator.
8
##              It is very simple in its construction, the most complicated
9
##              parts being the building of the Verilator simulation--a
10
##              step that may not be required for your project.
11
##
12
##              To build the FFT generator, just type 'make' on a line
13
##              by itself.  For a quick tutorial in how to run the
14
##              generator, just type './fftgen -h' to read the usage()
15
##              statement.
16
##
17
## Creator:     Dan Gisselquist, Ph.D.
18
##              Gisselquist Tecnology, LLC
19
##
20
##########################################################################/
21
##
22
## Copyright (C) 2015, Gisselquist Technology, LLC
23
##
24
## This program is free software (firmware): you can redistribute it and/or
25
## modify it under the terms of  the GNU General Public License as published
26
## by the Free Software Foundation, either version 3 of the License, or (at
27
## your option) any later version.
28
##
29
## This program is distributed in the hope that it will be useful, but WITHOUT
30
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
31
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
32
## for more details.
33
##
34
## You should have received a copy of the GNU General Public License along
35
## with this program.  (It's in the $(ROOT)/doc directory, run make with no
36
## target there if the PDF file isn't present.)  If not, see
37
##  for a copy.
38
##
39
## License:     GPL, v3, as defined and found on www.gnu.org,
40
##              http:##www.gnu.org/licenses/gpl.html
41
##
42
##
43
##########################################################################/
44
##
45
##
46 2 dgisselq
# This is really simple ...
47
all: fftgen
48
CORED := fft-core
49
OBJDR := $(CORED)/obj_dir
50
 
51
fftgen: fftgen.o
52
        $(CXX) $< -o $@
53
 
54
%.o: %.cpp
55
        $(CXX) -c $< -o $@
56
 
57 5 dgisselq
.PHONY: test
58 6 dgisselq
test: fft ifft shiftaddmpy butterfly dblreverse qtrstage dblstage fftstage_o2048
59 3 dgisselq
 
60 16 dgisselq
#
61
# Although these parameters, a 2048 point FFT of 16 bits input, aren't
62
# the only parameters the FFT can do, they are the ones that the test
63
# benches depend upon.  If you change these, and you are welcome to do so,
64
# you may need to adjust the test benches if you wish to prove that your
65
# changes work.
66
#
67 5 dgisselq
.PHONY: fft
68
fft: fftgen
69 19 dgisselq
        ./fftgen -f 2048 -n 16 -x 3
70 2 dgisselq
        cd $(CORED)/; verilator -cc fftmain.v
71
        cd $(OBJDR); make -f Vfftmain.mk
72 3 dgisselq
 
73 5 dgisselq
.PHONY: ifft
74
ifft: fftgen
75 19 dgisselq
        ./fftgen -f 2048 -1 -n 22
76 2 dgisselq
        cd $(CORED)/; verilator -cc ifftmain.v
77
        cd $(OBJDR); make -f Vifftmain.mk
78
 
79 3 dgisselq
.PHONY: shiftaddmpy
80
shiftaddmpy: $(OBJDR)/Vshiftaddmpy__ALL.a
81
 
82 6 dgisselq
$(CORED)/shiftaddmpy.v: fft
83 2 dgisselq
$(OBJDR)/Vshiftaddmpy.cpp $(OBJDR)/Vshiftaddmpy.h: $(CORED)/shiftaddmpy.v
84
        cd $(CORED)/; verilator -cc shiftaddmpy.v
85 3 dgisselq
$(OBJDR)/Vshiftaddmpy__ALL.a: $(OBJDR)/Vshiftaddmpy.h
86
$(OBJDR)/Vshiftaddmpy__ALL.a: $(OBJDR)/Vshiftaddmpy.cpp
87 2 dgisselq
        cd $(OBJDR)/; make -f Vshiftaddmpy.mk
88
 
89 3 dgisselq
.PHONY: butterfly
90
butterfly: $(OBJDR)/Vbutterfly__ALL.a
91
 
92 5 dgisselq
$(CORED)/butterfly.v: fft
93 2 dgisselq
$(OBJDR)/Vbutterfly.cpp $(OBJDR)/Vbutterfly.h: $(CORED)/butterfly.v
94
        cd $(CORED)/; verilator -cc butterfly.v
95
$(OBJDR)/Vbutterfly__ALL.a: $(OBJDR)/Vbutterfly.h
96
$(OBJDR)/Vbutterfly__ALL.a: $(OBJDR)/Vbutterfly.cpp
97
        cd $(OBJDR)/; make -f Vbutterfly.mk
98
 
99 3 dgisselq
.PHONY: dblreverse
100
dblreverse: $(OBJDR)/Vdblreverse__ALL.a
101
 
102 5 dgisselq
$(CORED)/dblreverse.v: fft
103 2 dgisselq
$(OBJDR)/Vdblreverse.cpp $(OBJDR)/Vdblreverse.h: $(CORED)/dblreverse.v
104
        cd $(CORED)/; verilator -cc dblreverse.v
105
$(OBJDR)/Vdblreverse__ALL.a: $(OBJDR)/Vdblreverse.h
106
$(OBJDR)/Vdblreverse__ALL.a: $(OBJDR)/Vdblreverse.cpp
107
        cd $(OBJDR)/; make -f Vdblreverse.mk
108
 
109 3 dgisselq
.PHONY: qtrstage
110
qtrstage: $(OBJDR)/Vqtrstage__ALL.a
111
 
112 5 dgisselq
$(CORED)/qtrstage.v: fft
113 2 dgisselq
$(OBJDR)/Vqtrstage.cpp $(OBJDR)/Vqtrstage.h: $(CORED)/qtrstage.v
114
        cd $(CORED)/; verilator -cc qtrstage.v
115
$(OBJDR)/Vqtrstage__ALL.a: $(OBJDR)/Vqtrstage.h
116
$(OBJDR)/Vqtrstage__ALL.a: $(OBJDR)/Vqtrstage.cpp
117
        cd $(OBJDR)/; make -f Vqtrstage.mk
118
 
119 3 dgisselq
.PHONY: dblstage
120
dblstage: $(OBJDR)/Vdblstage__ALL.a
121
 
122 5 dgisselq
$(CORED)/dblstage.v: fft
123 2 dgisselq
$(OBJDR)/Vdblstage.cpp $(OBJDR)/Vdblstage.h: $(CORED)/dblstage.v
124
        cd $(CORED)/; verilator -cc dblstage.v
125
$(OBJDR)/Vdblstage__ALL.a: $(OBJDR)/Vdblstage.h
126
$(OBJDR)/Vdblstage__ALL.a: $(OBJDR)/Vdblstage.cpp
127
        cd $(OBJDR)/; make -f Vdblstage.mk
128
 
129 6 dgisselq
.PHONY: fftstage_o2048
130
dblstage: $(OBJDR)/Vfftstage_o2048__ALL.a
131
 
132
$(CORED)/fftstage_o2048.v: fft
133
$(OBJDR)/Vfftstage_o2048.cpp $(OBJDR)/Vfftstage_o2048.h: $(CORED)/fftstage_o2048.v
134
        cd $(CORED)/; verilator -cc fftstage_o2048.v
135
$(OBJDR)/Vfftstage_o2048__ALL.a: $(OBJDR)/Vfftstage_o2048.h
136
$(OBJDR)/Vfftstage_o2048__ALL.a: $(OBJDR)/Vfftstage_o2048.cpp
137
        cd $(OBJDR)/; make -f Vfftstage_o2048.mk
138
 
139 5 dgisselq
.PHONY: clean
140 2 dgisselq
clean:
141
        rm fftgen fftgen.o
142
        rm -rf $(CORED)
143
 
144
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.