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[/] [dblclockfft/] [trunk/] [sw/] [fftgen.cpp] - Blame information for rev 14

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1 2 dgisselq 
#include <stdio.h>
2 
#include <stdlib.h>
3 
#include <unistd.h>
4 
#include <sys/stat.h>
5 
#include <string.h>
6 14 dgisselq 
#include <string>
7 2 dgisselq 
#include <math.h>
8 
#include <ctype.h>
9 
#include <assert.h>
10 
 
11 
#define COREDIR "fft-core"
12 
 
13 
const char      cpyleft[] =
14 
"///////////////////////////////////////////////////////////////////////////\n"
15 
"//\n"
16 
"// Copyright (C) 2015, Gisselquist Technology, LLC\n"
17 
"//\n"
18 
"// This program is free software (firmware): you can redistribute it and/or\n"
19 
"// modify it under the terms of  the GNU General Public License as published\n"
20 
"// by the Free Software Foundation, either version 3 of the License, or (at\n"
21 
"// your option) any later version.\n"
22 
"//\n"
23 
"// This program is distributed in the hope that it will be useful, but WITHOUT\n"
24 
"// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or\n"
25 
"// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License\n"
26 
"// for more details.\n"
27 
"//\n"
28 
"// You should have received a copy of the GNU General Public License along\n"
29 5 dgisselq 
"// with this program.  (It's in the $(ROOT)/doc directory, run make with no\n"
30 
"// target there if the PDF file isn\'t present.)  If not, see\n"
31 
"// <http://www.gnu.org/licenses/> for a copy.\n"
32 
"//\n"
33 2 dgisselq 
"// License:    GPL, v3, as defined and found on www.gnu.org,\n"
34 
"//             http://www.gnu.org/licenses/gpl.html\n"
35 
"//\n"
36 
"//\n"
37 
"///////////////////////////////////////////////////////////////////////////\n";
38 14 dgisselq 
const char      prjname[] = "A Doubletime Pipelined FFT";
39 2 dgisselq 
const char      creator[] =     "// Creator:    Dan Gisselquist, Ph.D.\n"
40 
                                "//             Gisselquist Tecnology, LLC\n";
41 
 
42 
int     lgval(int vl) {
43 
        int     lg;
44 
 
45 
        for(lg=1; (1<<lg) < vl; lg++)
46 
                ;
47 
        return lg;
48 
}
49 
 
50 
int     nextlg(int vl) {
51 
        int     r;
52 
 
53 
        for(r=1; r<vl; r<<=1)
54 
                ;
55 
        return r;
56 
}
57 
 
58 14 dgisselq 
int     bflydelay(int nbits, int xtra) {
59 2 dgisselq 
        int     cbits = nbits + xtra;
60 14 dgisselq 
        int     delay;
61 2 dgisselq 
        if (nbits+1<cbits)
62 5 dgisselq 
                delay = nbits+4;
63 2 dgisselq 
        else
64 5 dgisselq 
                delay = cbits+3;
65 14 dgisselq 
        return delay;
66 2 dgisselq 
}
67 
 
68 14 dgisselq 
int     lgdelay(int nbits, int xtra) {
69 
        // The butterfly code needs to compare a valid address, of this
70 
        // many bits, with an address two greater.  This guarantees we
71 
        // have enough bits for that comparison.  We'll also end up with
72 
        // more storage space to look for these values, but without a
73 
        // redesign that's just what we'll deal with.
74 
        return lgval(bflydelay(nbits, xtra)+3);
75 
}
76 
 
77 2 dgisselq 
void    build_quarters(const char *fname) {
78 
        FILE    *fp = fopen(fname, "w");
79 
        if (NULL == fp) {
80 
                fprintf(stderr, "Could not open \'%s\' for writing\n", fname);
81 
                perror("O/S Err was:");
82 
                return;
83 
        }
84 
 
85 
        fprintf(fp,
86 
"///////////////////////////////////////////////////////////////////////////\n"
87 
"//\n"
88 
"// Filename:   qtrstage.v\n"
89 
"//             \n"
90 
"// Project:    %s\n"
91 
"//\n"
92 5 dgisselq 
"// Purpose:    This file encapsulates the 4 point stage of a decimation in\n"
93 
"//             frequency FFT.  This particular implementation is optimized\n"
94 
"//             so that all of the multiplies are accomplished by additions\n"
95 
"//             and multiplexers only.\n"
96 
"//\n"
97 2 dgisselq 
"//\n%s"
98 
"//\n",
99 
                prjname, creator);
100 
        fprintf(fp, "%s", cpyleft);
101 
 
102 
        fprintf(fp,
103 
"module\tqtrstage(i_clk, i_rst, i_ce, i_sync, i_data, o_data, o_sync);\n"
104 5 dgisselq 
        "\tparameter    IWIDTH=16, OWIDTH=IWIDTH+1;\n"
105 
        "\t// Parameters specific to the core that should be changed when this\n"
106 
        "\t// core is built ... Note that the minimum LGSPAN is 2.  Smaller \n"
107 
        "\t// spans must use the fftdoubles stage.\n"
108 9 dgisselq 
        "\tparameter\tLGWIDTH=8, ODD=0, INVERSE=0,SHIFT=0,ROUND=0;\n"
109 5 dgisselq 
        "\tinput\t                              i_clk, i_rst, i_ce, i_sync;\n"
110 
        "\tinput\t      [(2*IWIDTH-1):0]        i_data;\n"
111 
        "\toutput\treg  [(2*OWIDTH-1):0]        o_data;\n"
112 
        "\toutput\treg                          o_sync;\n"
113 14 dgisselq 
        "\t\n");
114 
        fprintf(fp,
115 5 dgisselq 
        "\treg\t        wait_for_sync;\n"
116 
        "\treg\t[2:0]   pipeline;\n"
117 2 dgisselq 
"\n"
118 5 dgisselq 
        "\treg\t[(IWIDTH):0]    sum_r, sum_i, diff_r, diff_i;\n"
119 14 dgisselq 
        "\twire\t[(IWIDTH):0]   n_diff_r, n_diff_i;\n"
120 
        "\tassign n_diff_r = -diff_r;\n"
121 5 dgisselq 
        "\tassign n_diff_i = -diff_i;\n"
122 2 dgisselq 
"\n"
123 5 dgisselq 
        "\treg\t[(2*OWIDTH-1):0]        ob_a;\n"
124 
        "\twire\t[(2*OWIDTH-1):0]       ob_b;\n"
125 
        "\treg\t[(OWIDTH-1):0]          ob_b_r, ob_b_i;\n"
126 
        "\tassign       ob_b = { ob_b_r, ob_b_i };\n"
127 2 dgisselq 
"\n"
128 5 dgisselq 
        "\treg\t[(LGWIDTH-1):0]         iaddr;\n"
129 
        "\treg\t[(2*IWIDTH-1):0]        imem;\n"
130 2 dgisselq 
"\n"
131 5 dgisselq 
        "\twire\tsigned\t[(IWIDTH-1):0]\timem_r, imem_i;\n"
132 
        "\tassign\timem_r = imem[(2*IWIDTH-1):(IWIDTH)];\n"
133 
        "\tassign\timem_i = imem[(IWIDTH-1):0];\n"
134 2 dgisselq 
"\n"
135 5 dgisselq 
        "\twire\tsigned\t[(IWIDTH-1):0]\ti_data_r, i_data_i;\n"
136 
        "\tassign\ti_data_r = i_data[(2*IWIDTH-1):(IWIDTH)];\n"
137 
        "\tassign\ti_data_i = i_data[(IWIDTH-1):0];\n"
138 2 dgisselq 
"\n"
139 5 dgisselq 
        "\treg  [(2*OWIDTH-1):0]        omem;\n"
140 14 dgisselq 
"\n");
141 
        fprintf(fp,
142 5 dgisselq 
        "\twire [(IWIDTH-1):0]  rnd;\n"
143 9 dgisselq 
        "\tgenerate\n"
144 
        "\tif ((ROUND)&&((IWIDTH+1-OWIDTH-SHIFT)>0))\n"
145 
                "\t\tassign rnd = { {(IWIDTH-1){1'b0}}, 1'b1 };\n"
146 
        "\telse\n"
147 
                "\t\tassign rnd = { {(IWIDTH){1'b0}}};\n"
148 
        "\tendgenerate\n"
149 2 dgisselq 
"\n"
150 5 dgisselq 
        "\talways @(posedge i_clk)\n"
151 
                "\t\tif (i_rst)\n"
152 
                "\t\tbegin\n"
153 
                        "\t\t\twait_for_sync <= 1'b1;\n"
154 
                        "\t\t\tiaddr <= 0;\n"
155 
                        "\t\t\tpipeline <= 3'b000;\n"
156 
                "\t\tend\n"
157 
                "\t\telse if ((i_ce)&&((~wait_for_sync)||(i_sync)))\n"
158 
                "\t\tbegin\n"
159 
                        "\t\t\t// Always\n"
160 
                        "\t\t\timem <= i_data;\n"
161 
                        "\t\t\tiaddr <= iaddr + 1;\n"
162 
                        "\t\t\twait_for_sync <= 1'b0;\n"
163 2 dgisselq 
"\n"
164 5 dgisselq 
                        "\t\t\t// In sequence, clock = 0\n"
165 
                        "\t\t\tif (iaddr[0])\n"
166 
                        "\t\t\tbegin\n"
167 
                                "\t\t\t\tsum_r  <= imem_r + i_data_r + rnd;\n"
168 
                                "\t\t\t\tsum_i  <= imem_i + i_data_i + rnd;\n"
169 
                                "\t\t\t\tdiff_r <= imem_r - i_data_r + rnd;\n"
170 
                                "\t\t\t\tdiff_i <= imem_i - i_data_i + rnd;\n"
171 2 dgisselq 
"\n"
172 5 dgisselq 
                        "\t\t\t\tpipeline[2:0] <= { pipeline[1:0], 1'b1 };\n"
173 
                        "\t\t\tend else\n"
174 
                        "\t\t\t\tpipeline[2:0] <= { pipeline[1:0], 1'b0 };\n"
175 2 dgisselq 
"\n"
176 5 dgisselq 
                        "\t\t\t// In sequence, clock = 1\n"
177 
                        "\t\t\tif (pipeline[1])\n"
178 
                        "\t\t\tbegin\n"
179 9 dgisselq 
"\t\t\t\tob_a <= { sum_r[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)],\n"
180 
        "\t\t\t\t\t\tsum_i[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)] };\n"
181 5 dgisselq 
                                "\t\t\t\t// on Even, W = e^{-j2pi 1/4 0} = 1\n"
182 9 dgisselq 
                                "\t\t\t\tif (ODD == 0)\n"
183 5 dgisselq 
                                "\t\t\t\tbegin\n"
184 2 dgisselq 
"\t\t\t\t\tob_b_r <= diff_r[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
185 
"\t\t\t\t\tob_b_i <= diff_i[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
186 9 dgisselq 
// "\t\t\t\t\tob_b_r <=   { (OWIDTH) {1'b0} };\n"
187 
// "\t\t\t\t\tob_b_i <=   { (OWIDTH) {1'b0} };\n"
188 14 dgisselq 
                                "\t\t\t\tend else if (INVERSE==0) begin\n"
189 2 dgisselq 
"\t\t\t\t\t// on Odd, W = e^{-j2pi 1/4} = -j\n"
190 
"\t\t\t\t\tob_b_r <=   diff_i[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
191 14 dgisselq 
"\t\t\t\t\tob_b_i <= n_diff_r[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
192 9 dgisselq 
// "\t\t\t\t\tob_b_r <=   { (OWIDTH) {1'b0} };\n"
193 
// "\t\t\t\t\tob_b_i <=   { (OWIDTH) {1'b0} };\n"
194 5 dgisselq 
                                "\t\t\t\tend else begin\n"
195 2 dgisselq 
"\t\t\t\t\t// on Odd, W = e^{j2pi 1/4} = j\n"
196 
"\t\t\t\t\tob_b_r <= n_diff_i[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
197 
"\t\t\t\t\tob_b_i <=   diff_r[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
198 9 dgisselq 
// "\t\t\t\t\tob_b_r <=   { (OWIDTH) {1'b0} };\n"
199 
// "\t\t\t\t\tob_b_i <=   { (OWIDTH) {1'b0} };\n"
200 
 
201 5 dgisselq 
                                "\t\t\t\tend\n"
202 
                                "\t\t\t\t// (wire) ob_b <= { ob_b_r, ob_b_i };\n"
203 
                        "\t\t\tend\n"
204 
                        "\t\t\t// In sequence, clock = 2\n"
205 
                        "\t\t\tif (pipeline[2])\n"
206 
                        "\t\t\tbegin\n"
207 
                                "\t\t\t\tomem <= ob_b;\n"
208 
                                "\t\t\t\to_data <= ob_a;\n"
209 
                        "\t\t\tend else\n"
210 
                                "\t\t\t\to_data <= omem;\n"
211 6 dgisselq 
                        "\t\t\t// Don\'t forget in the sync check that we are running\n"
212 
                        "\t\t\t// at two clocks per sample.  Thus we need to\n"
213 
                        "\t\t\t// produce a sync every 2^(LGWIDTH-1) clocks.\n"
214 
                        "\t\t\to_sync <= &(~iaddr[(LGWIDTH-2):3]) && (iaddr[2:0] == 3'b100);\n"
215 5 dgisselq 
                "\t\tend\n"
216 2 dgisselq 
"endmodule\n");
217 
}
218 
 
219 
void    build_dblstage(const char *fname) {
220 
        FILE    *fp = fopen(fname, "w");
221 
        if (NULL == fp) {
222 
                fprintf(stderr, "Could not open \'%s\' for writing\n", fname);
223 
                perror("O/S Err was:");
224 
                return;
225 
        }
226 
 
227 
        fprintf(fp,
228 
"///////////////////////////////////////////////////////////////////////////\n"
229 
"//\n"
230 
"// Filename:   dblstage.v\n"
231 
"//\n"
232 
"// Project:    %s\n"
233 
"//\n"
234 
"// Purpose:    This is part of an FPGA implementation that will process\n"
235 5 dgisselq 
"//             the final stage of a decimate-in-frequency FFT, running\n"
236 
"//             through the data at two samples per clock.  If you notice\n"
237 
"//             from the derivation of an FFT, the only time both even and\n"
238 
"//             odd samples are used at the same time is in this stage.\n"
239 
"//             Therefore, other than this stage and these twiddles, all of\n"
240 
"//             the other stages can run two stages at a time at one sample\n"
241 
"//             per clock.\n"
242 2 dgisselq 
"//\n"
243 
"//             In this implementation, the output is valid one clock after\n"
244 
"//             the input is valid.  The output also accumulates one bit\n"
245 
"//             above and beyond the number of bits in the input.\n"
246 
"//             \n"
247 
"//             i_clk   A system clock\n"
248 6 dgisselq 
"//             i_rst   A synchronous reset\n"
249 2 dgisselq 
"//             i_ce    Circuit enable--nothing happens unless this line is high\n"
250 6 dgisselq 
"//             i_sync  A synchronization signal, high once per FFT at the start\n"
251 2 dgisselq 
"//             i_left  The first (even) complex sample input.  The higher order\n"
252 
"//                     bits contain the real portion, low order bits the\n"
253 
"//                     imaginary portion, all in two\'s complement.\n"
254 
"//             i_right The next (odd) complex sample input, same format as\n"
255 
"//                     i_left.\n"
256 
"//             o_left  The first (even) complex output.\n"
257 
"//             o_right The next (odd) complex output.\n"
258 6 dgisselq 
"//             o_sync  Output synchronization signal.\n"
259 2 dgisselq 
"//\n%s"
260 
"//\n", prjname, creator);
261 
 
262 
        fprintf(fp, "%s", cpyleft);
263 
        fprintf(fp,
264 9 dgisselq 
"module\tdblstage(i_clk, i_rst, i_ce, i_sync, i_left, i_right, o_left, o_right, o_sync);\n"
265 5 dgisselq 
        "\tparameter\tIWIDTH=16,OWIDTH=IWIDTH+1, SHIFT=0;\n"
266 6 dgisselq 
        "\tinput\t\ti_clk, i_rst, i_ce, i_sync;\n"
267 5 dgisselq 
        "\tinput\t\t[(2*IWIDTH-1):0]\ti_left, i_right;\n"
268 6 dgisselq 
        "\toutput\twire\t[(2*OWIDTH-1):0]\to_left, o_right;\n"
269 
        "\toutput\treg\t\t\to_sync;\n"
270 2 dgisselq 
"\n"
271 5 dgisselq 
        "\twire\tsigned\t[(IWIDTH-1):0]\ti_in_0r, i_in_0i, i_in_1r, i_in_1i;\n"
272 
        "\tassign\ti_in_0r = i_left[(2*IWIDTH-1):(IWIDTH)]; \n"
273 
        "\tassign\ti_in_0i = i_left[(IWIDTH-1):0]; \n"
274 
        "\tassign\ti_in_1r = i_right[(2*IWIDTH-1):(IWIDTH)]; \n"
275 
        "\tassign\ti_in_1i = i_right[(IWIDTH-1):0]; \n"
276 
        "\twire\t[(OWIDTH-1):0]\t\to_out_0r, o_out_0i,\n"
277 
                                "\t\t\t\t\to_out_1r, o_out_1i;\n"
278 2 dgisselq 
"\n"
279 5 dgisselq 
        "\t// Don't forget that we accumulate a bit by adding two values\n"
280 
        "\t// together. Therefore our intermediate value must have one more\n"
281 
        "\t// bit than the two originals.\n"
282 
        "\treg\t[IWIDTH:0]\tout_0r, out_0i, out_1r, out_1i;\n"
283 2 dgisselq 
"\n"
284 6 dgisselq 
        "\treg\twait_for_sync;\n"
285 
"\n"
286 5 dgisselq 
        "\talways @(posedge i_clk)\n"
287 6 dgisselq 
                "\t\tif (i_rst)\n"
288 
                        "\t\t\twait_for_sync <= 1'b1;\n"
289 
                "\t\telse if ((i_ce)&&((~wait_for_sync)||(i_sync)))\n"
290 5 dgisselq 
                "\t\tbegin\n"
291 6 dgisselq 
                        "\t\t\twait_for_sync <= 1'b0;\n"
292 
                        "\t\t\t//\n"
293 5 dgisselq 
                        "\t\t\tout_0r <= i_in_0r + i_in_1r;\n"
294 
                        "\t\t\tout_0i <= i_in_0i + i_in_1i;\n"
295 
                        "\t\t\t//\n"
296 
                        "\t\t\tout_1r <= i_in_0r - i_in_1r;\n"
297 
                        "\t\t\tout_1i <= i_in_0i - i_in_1i;\n"
298 6 dgisselq 
                        "\t\t\t//\n"
299 
                        "\t\t\to_sync <= i_sync;\n"
300 5 dgisselq 
                "\t\tend\n"
301 2 dgisselq 
"\n"
302 5 dgisselq 
        "\t// Now, if the master control program doesn't want to keep all of\n"
303 
        "\t// our bits, we can shift down to OWIDTH bits here.\n"
304 
        "\tassign\to_out_0r = out_0r[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
305 
        "\tassign\to_out_0i = out_0i[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
306 
        "\tassign\to_out_1r = out_1r[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
307 
        "\tassign\to_out_1i = out_1i[(IWIDTH-SHIFT):(IWIDTH+1-OWIDTH-SHIFT)];\n"
308 2 dgisselq 
"\n"
309 5 dgisselq 
        "\tassign\to_left  = { o_out_0r, o_out_0i };\n"
310 
        "\tassign\to_right = { o_out_1r, o_out_1i };\n"
311 2 dgisselq 
"\n"
312 
"endmodule\n");
313 
        fclose(fp);
314 
}
315 
 
316 
void    build_multiply(const char *fname) {
317 
        FILE    *fp = fopen(fname, "w");
318 
        if (NULL == fp) {
319 
                fprintf(stderr, "Could not open \'%s\' for writing\n", fname);
320 
                perror("O/S Err was:");
321 
                return;
322 
        }
323 
 
324 
        fprintf(fp,
325 
"///////////////////////////////////////////////////////////////////////////\n"
326 
"//\n"
327 
"// Filename:   shiftaddmpy.v\n"
328 
"//\n"
329 
"// Project:    %s\n"
330 
"//\n"
331 
"// Purpose:    A portable shift and add multiply.\n"
332 
"//\n"
333 
"//             While both Xilinx and Altera will offer single clock \n"
334 
"//             multiplies, this simple approach will multiply two numbers\n"
335 
"//             on any architecture.  The result maintains the full width\n"
336 
"//             of the multiply, there are no extra stuff bits, no rounding,\n"
337 
"//             no shifted bits, etc.\n"
338 
"//\n"
339 
"//             Further, for those applications that can support it, this\n"
340 
"//             multiply is pipelined and will produce one answer per clock.\n"
341 
"//\n"
342 
"//             For minimal processing delay, make the first parameter\n"
343 
"//             the one with the least bits, so that AWIDTH <= BWIDTH.\n"
344 
"//\n"
345 
"//             The processing delay in this multiply is (AWIDTH+1) cycles.\n"
346 
"//             That is, if the data is present on the input at clock t=0,\n"
347 
"//             the result will be present on the output at time t=AWIDTH+1;\n"
348 
"//\n"
349 
"//\n%s"
350 
"//\n", prjname, creator);
351 
 
352 
        fprintf(fp, "%s", cpyleft);
353 
        fprintf(fp,
354 
"module shiftaddmpy(i_clk, i_ce, i_a, i_b, o_r);\n"
355 
        "\tparameter\tAWIDTH=16,BWIDTH=AWIDTH;\n"
356 
        "\tinput\t\t\t\t\ti_clk, i_ce;\n"
357 
        "\tinput\t\t[(AWIDTH-1):0]\t\ti_a;\n"
358 
        "\tinput\t\t[(BWIDTH-1):0]\t\ti_b;\n"
359 
        "\toutput\treg\t[(AWIDTH+BWIDTH-1):0]\to_r;\n"
360 
"\n"
361 
        "\treg\t[(AWIDTH-1):0]\tu_a;\n"
362 
        "\treg\t[(BWIDTH-1):0]\tu_b;\n"
363 
        "\treg\t\t\tsgn;\n"
364 
"\n"
365 
        "\treg\t[(AWIDTH-2):0]\t\tr_a[0:(AWIDTH-1)];\n"
366 
        "\treg\t[(AWIDTH+BWIDTH-2):0]\tr_b[0:(AWIDTH-1)];\n"
367 
        "\treg\t\t\t\tr_s[0:(AWIDTH-1)];\n"
368 
        "\treg\t[(AWIDTH+BWIDTH-1):0]\tacc[0:(AWIDTH-1)];\n"
369 
        "\tgenvar k;\n"
370 
"\n"
371 5 dgisselq 
        "\t// If we were forced to stay within two\'s complement arithmetic,\n"
372 
        "\t// taking the absolute value here would require an additional bit.\n"
373 
        "\t// However, because our results are now unsigned, we can stay\n"
374 
        "\t// within the number of bits given (for now).\n"
375 2 dgisselq 
        "\talways @(posedge i_clk)\n"
376 
                "\t\tif (i_ce)\n"
377 
                "\t\tbegin\n"
378 
                        "\t\t\tu_a <= (i_a[AWIDTH-1])?(-i_a):(i_a);\n"
379 
                        "\t\t\tu_b <= (i_b[BWIDTH-1])?(-i_b):(i_b);\n"
380 
                        "\t\t\tsgn <= i_a[AWIDTH-1] ^ i_b[BWIDTH-1];\n"
381 
                "\t\tend\n"
382 
"\n"
383 
        "\talways @(posedge i_clk)\n"
384 
                "\t\tif (i_ce)\n"
385 
                "\t\tbegin\n"
386 
                        "\t\t\tacc[0] <= (u_a[0]) ? { {(AWIDTH){1'b0}}, u_b }\n"
387 
                        "\t\t\t\t\t: {(AWIDTH+BWIDTH){1'b0}};\n"
388 
                        "\t\t\tr_a[0] <= { u_a[(AWIDTH-1):1] };\n"
389 
                        "\t\t\tr_b[0] <= { {(AWIDTH-1){1'b0}}, u_b };\n"
390 
                        "\t\t\tr_s[0] <= sgn; // The final sign, needs to be preserved\n"
391 
                "\t\tend\n"
392 
"\n"
393 
        "\tgenerate\n"
394 
        "\talways @(posedge i_clk)\n"
395 
        "\tif (i_ce)\n"
396 
        "\tbegin\n"
397 
                "\t\tfor(k=0; k<AWIDTH-1; k++)\n"
398 
                "\t\tbegin\n"
399 
                        "\t\t\tacc[k+1] <= acc[k] + ((r_a[k][0]) ? {r_b[k],1'b0}:0);\n"
400 
                        "\t\t\tr_a[k+1] <= { 1'b0, r_a[k][(AWIDTH-2):1] };\n"
401 
                        "\t\t\tr_b[k+1] <= { r_b[k][(AWIDTH+BWIDTH-3):0], 1'b0};\n"
402 
                        "\t\t\tr_s[k+1] <= r_s[k];\n"
403 
                "\t\tend\n"
404 
        "\tend\n"
405 
        "\tendgenerate\n"
406 
"\n"
407 
        "\talways @(posedge i_clk)\n"
408 
                "\t\tif (i_ce)\n"
409 
                        "\t\t\to_r <= (r_s[AWIDTH-1]) ? (-acc[AWIDTH-1]) : acc[AWIDTH-1];\n"
410 
"\n"
411 
"endmodule\n");
412 
 
413 
        fclose(fp);
414 
}
415 
 
416 
void    build_dblreverse(const char *fname) {
417 
        FILE    *fp = fopen(fname, "w");
418 
        if (NULL == fp) {
419 
                fprintf(stderr, "Could not open \'%s\' for writing\n", fname);
420 
                perror("O/S Err was:");
421 
                return;
422 
        }
423 
 
424 
        fprintf(fp,
425 
"///////////////////////////////////////////////////////////////////////////\n"
426 
"//\n"
427 
"// Filename:   dblreverse.v\n"
428 
"//\n"
429 
"// Project:    %s\n"
430 
"//\n"
431 
"// Purpose:    This module bitreverses a pipelined FFT input.  Operation is\n"
432 
"//             expected as follows:\n"
433 
"//\n"
434 
"//             i_clk   A running clock at whatever system speed is offered.\n"
435 
"//             i_rst   A synchronous reset signal, that resets all internals\n"
436 
"//             i_ce    If this is one, one input is consumed and an output\n"
437 
"//                     is produced.\n"
438 
"//             i_in_0, i_in_1\n"
439 
"//                     Two inputs to be consumed, each of width WIDTH.\n"
440 
"//             o_out_0, o_out_1\n"
441 
"//                     Two of the bitreversed outputs, also of the same\n"
442 
"//                     width, WIDTH.  Of course, there is a delay from the\n"
443 
"//                     first input to the first output.  For this purpose,\n"
444 
"//                     o_sync is present.\n"
445 
"//             o_sync  This will be a 1'b1 for the first value in any block.\n"
446 
"//                     Following a reset, this will only become 1'b1 once\n"
447 
"//                     the data has been loaded and is now valid.  After that,\n"
448 
"//                     all outputs will be valid.\n"
449 
"//\n%s"
450 
"//\n", prjname, creator);
451 
        fprintf(fp, "%s", cpyleft);
452 
        fprintf(fp,
453 
"\n\n"
454 
"//\n"
455 
"// How do we do bit reversing at two smples per clock?  Can we separate out\n"
456 
"// our work into eight memory banks, writing two banks at once and reading\n"
457 
"// another two banks in the same clock?\n"
458 
"//\n"
459 
"//     mem[00xxx0] = s_0[n]\n"
460 
"//     mem[00xxx1] = s_1[n]\n"
461 
"//     o_0[n] = mem[10xxx0]\n"
462 
"//     o_1[n] = mem[11xxx0]\n"
463 
"//     ...\n"
464 
"//     mem[01xxx0] = s_0[m]\n"
465 
"//     mem[01xxx1] = s_1[m]\n"
466 
"//     o_0[m] = mem[10xxx1]\n"
467 
"//     o_1[m] = mem[11xxx1]\n"
468 
"//     ...\n"
469 
"//     mem[10xxx0] = s_0[n]\n"
470 
"//     mem[10xxx1] = s_1[n]\n"
471 
"//     o_0[n] = mem[00xxx0]\n"
472 
"//     o_1[n] = mem[01xxx0]\n"
473 
"//     ...\n"
474 
"//     mem[11xxx0] = s_0[m]\n"
475 
"//     mem[11xxx1] = s_1[m]\n"
476 
"//     o_0[m] = mem[00xxx1]\n"
477 
"//     o_1[m] = mem[01xxx1]\n"
478 
"//     ...\n"
479 
"//\n"
480 5 dgisselq 
"//     The answer is that, yes we can but: we need to use four memory banks\n"
481 
"//     to do it properly.  These four banks are defined by the two bits\n"
482 
"//     that determine the top and bottom of the correct address.  Larger\n"
483 
"//     FFT\'s would require more memories.\n"
484 
"//\n"
485 2 dgisselq 
"//\n");
486 
        fprintf(fp,
487 
"module dblreverse(i_clk, i_rst, i_ce, i_in_0, i_in_1,\n"
488 5 dgisselq 
        "\t\to_out_0, o_out_1, o_sync);\n"
489 
        "\tparameter\t\t\tLGSIZE=4, WIDTH=24;\n"
490 
        "\tinput\t\t\t\ti_clk, i_rst, i_ce;\n"
491 
        "\tinput\t\t[(2*WIDTH-1):0]\ti_in_0, i_in_1;\n"
492 
        "\toutput\treg\t[(2*WIDTH-1):0]\to_out_0, o_out_1;\n"
493 
        "\toutput\treg\t\t\to_sync;\n"
494 2 dgisselq 
"\n"
495 5 dgisselq 
        "\treg\tin_reset;\n"
496 
        "\treg\t[(LGSIZE):0]\tiaddr;\n"
497 
        "\treg\t[(2*WIDTH-1):0]\tmem_0e [0:((1<<(LGSIZE-1))-1)];\n"
498 
        "\treg\t[(2*WIDTH-1):0]\tmem_0o [0:((1<<(LGSIZE-1))-1)];\n"
499 
        "\treg\t[(2*WIDTH-1):0]\tmem_1e [0:((1<<(LGSIZE-1))-1)];\n"
500 
        "\treg\t[(2*WIDTH-1):0]\tmem_1o [0:((1<<(LGSIZE-1))-1)];\n"
501 2 dgisselq 
"\n"
502 5 dgisselq 
        "\twire\t[(2*LGSIZE-1):0]       braddr;\n"
503 
        "\tgenvar\tk;\n"
504 
        "\tgenerate for(k=0; k<LGSIZE; k++)\n"
505 
                "\t\tassign braddr[k] = iaddr[LGSIZE-1-k];\n"
506 
        "\tendgenerate\n"
507 2 dgisselq 
"\n"
508 5 dgisselq 
        "\talways @(posedge i_clk)\n"
509 
                "\t\tif (i_rst)\n"
510 
                "\t\tbegin\n"
511 
                        "\t\t\tiaddr <= 0;\n"
512 
                        "\t\t\tin_reset <= 1'b1;\n"
513 
                "\t\tend else if (i_ce)\n"
514 
                "\t\tbegin\n"
515 
                        "\t\t\tif (iaddr[(LGSIZE-1)])\n"
516 
                        "\t\t\tbegin\n"
517 
                                "\t\t\t\tmem_1e[{iaddr[LGSIZE],iaddr[(LGSIZE-2):1]}] <= i_in_0;\n"
518 
                                "\t\t\t\tmem_1o[{iaddr[LGSIZE],iaddr[(LGSIZE-2):1]}] <= i_in_1;\n"
519 
                        "\t\t\tend else begin\n"
520 
                                "\t\t\t\tmem_0e[{iaddr[LGSIZE],iaddr[(LGSIZE-2):1]}] <= i_in_0;\n"
521 
                                "\t\t\t\tmem_0o[{iaddr[LGSIZE],iaddr[(LGSIZE-2):1]}] <= i_in_1;\n"
522 
                        "\t\t\tend\n"
523 
                        "\t\t\tiaddr <= iaddr + 2;\n"
524 
                        "\t\t\tif (&iaddr[(LGSIZE-1):1])\n"
525 
                                "\t\t\t\tin_reset <= 1'b0;\n"
526 
                        "\t\t\tif (in_reset)\n"
527 
                        "\t\t\tbegin\n"
528 
                                "\t\t\t\to_out_0 <= {(2*WIDTH){1'b0}};\n"
529 
                                "\t\t\t\to_out_1 <= {(2*WIDTH){1'b0}};\n"
530 
                                "\t\t\t\to_sync <= 1'b0;\n"
531 
                        "\t\t\tend else\n"
532 
                        "\t\t\tbegin\n"
533 
                                "\t\t\t\tif (braddr[0])\n"
534 
                                "\t\t\t\tbegin\n"
535 2 dgisselq 
"\t\t\t\t\to_out_0 <= mem_0o[{~iaddr[LGSIZE],braddr[(LGSIZE-2):1]}];\n"
536 
"\t\t\t\t\to_out_1 <= mem_1o[{~iaddr[LGSIZE],braddr[(LGSIZE-2):1]}];\n"
537 5 dgisselq 
                                "\t\t\t\tend else begin\n"
538 2 dgisselq 
"\t\t\t\t\to_out_0 <= mem_0e[{~iaddr[LGSIZE],braddr[(LGSIZE-2):1]}];\n"
539 
"\t\t\t\t\to_out_1 <= mem_1e[{~iaddr[LGSIZE],braddr[(LGSIZE-2):1]}];\n"
540 5 dgisselq 
                                "\t\t\t\tend\n"
541 
                                "\t\t\t\to_sync <= ~(|iaddr[(LGSIZE-1):0]);\n"
542 
                        "\t\t\tend\n"
543 
                "\t\tend\n"
544 2 dgisselq 
"\n"
545 
"endmodule;\n");
546 
 
547 
        fclose(fp);
548 
}
549 
 
550 14 dgisselq 
void    build_butterfly(const char *fname, int xtracbits) {
551 2 dgisselq 
        FILE    *fp = fopen(fname, "w");
552 
        if (NULL == fp) {
553 
                fprintf(stderr, "Could not open \'%s\' for writing\n", fname);
554 
                perror("O/S Err was:");
555 
                return;
556 
        }
557 
 
558 
        fprintf(fp,
559 
"///////////////////////////////////////////////////////////////////////////\n"
560 
"//\n"
561 
"// Filename:   butterfly.v\n"
562 
"//\n"
563 
"// Project:    %s\n"
564 
"//\n"
565 
"// Purpose:    This routine caculates a butterfly for a decimation\n"
566 
"//             in frequency version of an FFT.  Specifically, given\n"
567 
"//             complex Left and Right values together with a \n"
568 
"//             coefficient, the output of this routine is given\n"
569 
"//             by:\n"
570 
"//\n"
571 
"//             L' = L + R\n"
572 
"//             R' = (L - R)*C\n"
573 
"//\n"
574 
"//             The rest of the junk below handles timing (mostly),\n"
575 
"//             to make certain that L' and R' reach the output at\n"
576 
"//             the same clock.  Further, just to make certain\n"
577 
"//             that is the case, an 'aux' input exists.  This\n"
578 
"//             aux value will come out of this routine synchronized\n"
579 
"//             to the values it came in with.  (i.e., both L', R',\n"
580 
"//             and aux all have the same delay.)  Hence, a caller\n"
581 
"//             of this routine may set aux on the first input with\n"
582 
"//             valid data, and then wait to see aux set on the output\n"
583 
"//             to know when to find the first output with valid data.\n"
584 
"//\n"
585 
"//             All bits are preserved until the very last clock,\n"
586 
"//             where any more bits than OWIDTH will be quietly\n"
587 
"//             discarded.\n"
588 
"//\n"
589 
"//             This design features no overflow checking.\n"
590 
"// \n"
591 
"// Notes:\n"
592 
"//             CORDIC:\n"
593 
"//             Much as we would like, we can't use a cordic here.\n"
594 
"//             The goal is to accomplish an FFT, as defined, and a\n"
595 
"//             CORDIC places a scale factor onto the data.  Removing\n"
596 
"//             the scale factor would cost a two multiplies, which\n"
597 
"//             is precisely what we are trying to avoid.\n"
598 
"//\n"
599 
"//\n"
600 
"//             3-MULTIPLIES:\n"
601 
"//             It should also be possible to do this with three \n"
602 
"//             multiplies and an extra two addition cycles.  \n"
603 
"//\n"
604 
"//             We want\n"
605 
"//                     R+I = (a + jb) * (c + jd)\n"
606 
"//                     R+I = (ac-bd) + j(ad+bc)\n"
607 
"//             We multiply\n"
608 
"//                     P1 = ac\n"
609 
"//                     P2 = bd\n"
610 
"//                     P3 = (a+b)(c+d)\n"
611 
"//             Then \n"
612 
"//                     R+I=(P1-P2)+j(P3-P2-P1)\n"
613 
"//\n"
614 
"//             WIDTHS:\n"
615 
"//             On multiplying an X width number by an\n"
616 
"//             Y width number, X>Y, the result should be (X+Y)\n"
617 
"//             bits, right?\n"
618 
"//             -2^(X-1) <= a <= 2^(X-1) - 1\n"
619 
"//             -2^(Y-1) <= b <= 2^(Y-1) - 1\n"
620 
"//             (2^(Y-1)-1)*(-2^(X-1)) <= ab <= 2^(X-1)2^(Y-1)\n"
621 
"//             -2^(X+Y-2)+2^(X-1) <= ab <= 2^(X+Y-2) <= 2^(X+Y-1) - 1\n"
622 
"//             -2^(X+Y-1) <= ab <= 2^(X+Y-1)-1\n"
623 
"//             YUP!  But just barely.  Do this and you'll really want\n"
624 
"//             to drop a bit, although you will risk overflow in so\n"
625 
"//             doing.\n"
626 
"//\n%s"
627 
"//\n", prjname, creator);
628 
        fprintf(fp, "%s", cpyleft);
629 
 
630 
        fprintf(fp,
631 6 dgisselq 
"module\tbutterfly(i_clk, i_rst, i_ce, i_coef, i_left, i_right, i_aux,\n"
632 5 dgisselq 
                "\t\to_left, o_right, o_aux);\n"
633 
        "\t// Public changeable parameters ...\n"
634 14 dgisselq 
        "\tparameter IWIDTH=%d,CWIDTH=IWIDTH+%d,OWIDTH=IWIDTH+1;\n"
635 5 dgisselq 
        "\t// Parameters specific to the core that should not be changed.\n"
636 14 dgisselq 
        "\tparameter    MPYDELAY=%d'd%d, // (IWIDTH+1 < CWIDTH)?(IWIDTH+4):(CWIDTH+3),\n"
637 5 dgisselq 
                        "\t\t\tSHIFT=0, ROUND=0;\n"
638 
        "\t// The LGDELAY should be the base two log of the MPYDELAY.  If\n"
639 
        "\t// this value is fractional, then round up to the nearest\n"
640 
        "\t// integer: LGDELAY=ceil(log(MPYDELAY)/log(2));\n"
641 14 dgisselq 
        "\tparameter\tLGDELAY=%d;\n"
642 6 dgisselq 
        "\tinput\t\ti_clk, i_rst, i_ce;\n"
643 5 dgisselq 
        "\tinput\t\t[(2*CWIDTH-1):0] i_coef;\n"
644 
        "\tinput\t\t[(2*IWIDTH-1):0] i_left, i_right;\n"
645 
        "\tinput\t\ti_aux;\n"
646 
        "\toutput\twire [(2*OWIDTH-1):0] o_left, o_right;\n"
647 
        "\toutput\twire o_aux;\n"
648 14 dgisselq 
        "\n", 16, xtracbits, lgdelay(16,xtracbits),
649 
        bflydelay(16, xtracbits), lgdelay(16,xtracbits));
650 
        fprintf(fp,
651 5 dgisselq 
        "\twire\t[(OWIDTH-1):0] o_left_r, o_left_i, o_right_r, o_right_i;\n"
652 2 dgisselq 
"\n"
653 5 dgisselq 
        "\treg\t[(2*IWIDTH-1):0]\tr_left, r_right;\n"
654 
        "\treg\t\t\t\tr_aux, r_aux_2;\n"
655 
        "\treg\t[(2*CWIDTH-1):0]\tr_coef, r_coef_2;\n"
656 
        "\twire\tsigned\t[(CWIDTH-1):0]\tr_coef_r, r_coef_i;\n"
657 
        "\tassign\tr_coef_r  = r_coef_2[ (2*CWIDTH-1):(CWIDTH)];\n"
658 
        "\tassign\tr_coef_i  = r_coef_2[ (  CWIDTH-1):0];\n"
659 
        "\twire\tsigned\t[(IWIDTH-1):0]\tr_left_r, r_left_i, r_right_r, r_right_i;\n"
660 
        "\tassign\tr_left_r  = r_left[ (2*IWIDTH-1):(IWIDTH)];\n"
661 
        "\tassign\tr_left_i  = r_left[ (IWIDTH-1):0];\n"
662 
        "\tassign\tr_right_r = r_right[(2*IWIDTH-1):(IWIDTH)];\n"
663 
        "\tassign\tr_right_i = r_right[(IWIDTH-1):0];\n"
664 2 dgisselq 
"\n"
665 5 dgisselq 
        "\treg\tsigned\t[(IWIDTH):0]\tr_sum_r, r_sum_i, r_dif_r, r_dif_i;\n"
666 2 dgisselq 
"\n"
667 5 dgisselq 
        "\treg  [(LGDELAY-1):0] fifo_addr;\n"
668 
        "\twire [(LGDELAY-1):0] fifo_read_addr;\n"
669 6 dgisselq 
        "\tassign\tfifo_read_addr = fifo_addr - MPYDELAY;\n"
670 5 dgisselq 
        "\treg  [(2*IWIDTH+2):0]        fifo_left [ 0:((1<<LGDELAY)-1)];\n"
671 6 dgisselq 
        "\treg\t\t\t\tovalid;\n"
672 5 dgisselq 
"\n");
673 
        fprintf(fp,
674 
        "\t// Set up the input to the multiply\n"
675 2 dgisselq 
        "\talways @(posedge i_clk)\n"
676 
                "\t\tif (i_ce)\n"
677 
                "\t\tbegin\n"
678 
                        "\t\t\t// One clock just latches the inputs\n"
679 
                        "\t\t\tr_left <= i_left;        // No change in # of bits\n"
680 
                        "\t\t\tr_right <= i_right;\n"
681 
                        "\t\t\tr_aux <= i_aux;\n"
682 
                        "\t\t\tr_coef  <= i_coef;\n"
683 
                        "\t\t\t// Next clock adds/subtracts\n"
684 
                        "\t\t\tr_sum_r <= r_left_r + r_right_r; // Now IWIDTH+1 bits\n"
685 
                        "\t\t\tr_sum_i <= r_left_i + r_right_i;\n"
686 
                        "\t\t\tr_dif_r <= r_left_r - r_right_r;\n"
687 
                        "\t\t\tr_dif_i <= r_left_i - r_right_i;\n"
688 
                        "\t\t\t// Other inputs are simply delayed on second clock\n"
689 
                        "\t\t\tr_aux_2 <= r_aux;\n"
690 
                        "\t\t\tr_coef_2<= r_coef;\n"
691 
        "\t\tend\n"
692 5 dgisselq 
"\n");
693 
        fprintf(fp,
694 
        "\t// Don\'t forget to record the even side, since it doesn\'t need\n"
695 
        "\t// to be multiplied, but yet we still need the results in sync\n"
696 
        "\t// with the answer when it is ready.\n"
697 2 dgisselq 
        "\talways @(posedge i_clk)\n"
698 6 dgisselq 
                "\t\tif (i_rst)\n"
699 2 dgisselq 
                "\t\tbegin\n"
700 6 dgisselq 
                        "\t\t\tfifo_addr <= 0;\n"
701 
                        "\t\t\tovalid <= 1'b0;\n"
702 
                "\t\tend else if (i_ce)\n"
703 
                "\t\tbegin\n"
704 2 dgisselq 
                        "\t\t\t// Need to delay the sum side--nothing else happens\n"
705 
                        "\t\t\t// to it, but it needs to stay synchronized with the\n"
706 
                        "\t\t\t// right side.\n"
707 
                        "\t\t\tfifo_left[fifo_addr] <= { r_aux_2, r_sum_r, r_sum_i };\n"
708 
                        "\t\t\tfifo_addr <= fifo_addr + 1;\n"
709 14 dgisselq 
"\n"
710 
                        "\t\t\tovalid <= (ovalid) || (fifo_addr > (MPYDELAY+1));\n"
711 2 dgisselq 
                "\t\tend\n"
712 
"\n"
713 5 dgisselq 
        "\twire\tsigned\t[(CWIDTH-1):0] ir_coef_r, ir_coef_i;\n"
714 
        "\tassign\tir_coef_r = r_coef_2[(2*CWIDTH-1):CWIDTH];\n"
715 
        "\tassign\tir_coef_i = r_coef_2[(CWIDTH-1):0];\n"
716 
        "\twire\tsigned\t[((IWIDTH+2)+(CWIDTH+1)-1):0]\tp_one, p_two, p_three;\n"
717 2 dgisselq 
"\n"
718 5 dgisselq 
"\n");
719 
        fprintf(fp,
720 
        "\t// Multiply output is always a width of the sum of the widths of\n"
721 
        "\t// the two inputs.  ALWAYS.  This is independent of the number of\n"
722 
        "\t// bits in p_one, p_two, or p_three.  These values needed to \n"
723 
        "\t// accumulate a bit (or two) each.  However, this approach to a\n"
724 
        "\t// three multiply complex multiply cannot increase the total\n"
725 
        "\t// number of bits in our final output.  We\'ll take care of\n"
726 
        "\t// dropping back down to the proper width, OWIDTH, in our routine\n"
727 
        "\t// below.\n"
728 2 dgisselq 
"\n"
729 5 dgisselq 
"\n");
730 
        fprintf(fp,
731 
        "\t// We accomplish here \"Karatsuba\" multiplication.  That is,\n"
732 
        "\t// by doing three multiplies we accomplish the work of four.\n"
733 
        "\t// Let\'s prove to ourselves that this works ... We wish to\n"
734 
        "\t// multiply: (a+jb) * (c+jd), where a+jb is given by\n"
735 
        "\t//\ta + jb = r_dif_r + j r_dif_i, and\n"
736 
        "\t//\tc + jd = ir_coef_r + j ir_coef_i.\n"
737 
        "\t// We do this by calculating the intermediate products P1, P2,\n"
738 
        "\t// and P3 as\n"
739 
        "\t//\tP1 = ac\n"
740 
        "\t//\tP2 = bd\n"
741 
        "\t//\tP3 = (a + b) * (c + d)\n"
742 
        "\t// and then complete our final answer with\n"
743 
        "\t//\tac - bd = P1 - P2 (this checks)\n"
744 
        "\t//\tad + bc = P3 - P2 - P1\n"
745 
        "\t//\t        = (ac + bc + ad + bd) - bd - ac\n"
746 
        "\t//\t        = bc + ad (this checks)\n"
747 2 dgisselq 
"\n"
748 5 dgisselq 
"\n");
749 
        fprintf(fp,
750 
        "\t// This should really be based upon an IF, such as in\n"
751 
        "\t// if (IWIDTH < CWIDTH) then ...\n"
752 
        "\t// However, this is the only (other) way I know to do it.\n"
753 2 dgisselq 
        "\tgenerate\n"
754 
        "\tif (CWIDTH < IWIDTH+1)\n"
755 
        "\tbegin\n"
756 
                "\t\t// We need to pad these first two multiplies by an extra\n"
757 5 dgisselq 
                "\t\t// bit just to keep them aligned with the third,\n"
758 
                "\t\t// simpler, multiply.\n"
759 2 dgisselq 
                "\t\tshiftaddmpy #(CWIDTH+1,IWIDTH+2) p1(i_clk, i_ce,\n"
760 
                                "\t\t\t\t{ir_coef_r[CWIDTH-1],ir_coef_r},\n"
761 
                                "\t\t\t\t{r_dif_r[IWIDTH],r_dif_r}, p_one);\n"
762 
                "\t\tshiftaddmpy #(CWIDTH+1,IWIDTH+2) p2(i_clk, i_ce,\n"
763 5 dgisselq 
                                "\t\t\t\t{ir_coef_i[CWIDTH-1],ir_coef_i},\n"
764 2 dgisselq 
                                "\t\t\t\t{r_dif_i[IWIDTH],r_dif_i}, p_two);\n"
765 
                "\t\tshiftaddmpy #(CWIDTH+1,IWIDTH+2) p3(i_clk, i_ce,\n"
766 5 dgisselq 
                        "\t\t\t\tir_coef_i+ir_coef_r,\n"
767 
                        "\t\t\t\tr_dif_r + r_dif_i,\n"
768 
                        "\t\t\t\tp_three);\n"
769 2 dgisselq 
        "\tend else begin\n"
770 
                "\t\tshiftaddmpy #(IWIDTH+2,CWIDTH+1) p1a(i_clk, i_ce,\n"
771 
                                "\t\t\t\t{r_dif_r[IWIDTH],r_dif_r},\n"
772 
                                "\t\t\t\t{ir_coef_r[CWIDTH-1],ir_coef_r}, p_one);\n"
773 
                "\t\tshiftaddmpy #(IWIDTH+2,CWIDTH+1) p2a(i_clk, i_ce,\n"
774 
                                "\t\t\t\t{r_dif_i[IWIDTH], r_dif_i},\n"
775 5 dgisselq 
                                "\t\t\t\t{ir_coef_i[CWIDTH-1],ir_coef_i}, p_two);\n"
776 2 dgisselq 
                "\t\tshiftaddmpy #(IWIDTH+2,CWIDTH+1) p3a(i_clk, i_ce,\n"
777 
                                "\t\t\t\tr_dif_r+r_dif_i,\n"
778 
                                "\t\t\t\tir_coef_i+ir_coef_r,\n"
779 
                                "\t\t\t\tp_three);\n"
780 
        "\tend\n"
781 
        "\tendgenerate\n"
782 5 dgisselq 
"\n");
783 
        fprintf(fp,
784 
        "\t// These values are held in memory and delayed during the\n"
785 
        "\t// multiply.  Here, we recover them.  During the multiply,\n"
786 
        "\t// values were multiplied by 2^(CWIDTH-2)*exp{-j*2*pi*...},\n"
787 
        "\t// therefore, the left_x values need to be right shifted by\n"
788 
        "\t// CWIDTH-2 as well.  The additional bits come from a sign\n"
789 
        "\t// extension.\n"
790 2 dgisselq 
        "\twire aux;\n"
791 5 dgisselq 
        "\twire\tsigned\t[(IWIDTH+CWIDTH):0]    fifo_i, fifo_r;\n"
792 
        "\treg\t\t[(2*IWIDTH+2):0]      fifo_read;\n"
793 
        "\tassign\tfifo_r = { {2{fifo_read[2*(IWIDTH+1)-1]}}, fifo_read[(2*(IWIDTH+1)-1):(IWIDTH+1)], {(CWIDTH-2){1'b0}} };\n"
794 
        "\tassign\tfifo_i = { {2{fifo_read[(IWIDTH+1)-1]}}, fifo_read[((IWIDTH+1)-1):0], {(CWIDTH-2){1'b0}} };\n"
795 
        "\tassign\taux = fifo_read[2*IWIDTH+2];\n"
796 2 dgisselq 
"\n"
797 
"\n"
798 5 dgisselq 
        "\treg\tsigned\t[(CWIDTH+IWIDTH+3-1):0] b_left_r, b_left_i,\n"
799 
                        "\t\t\t\t\t\tb_right_r, b_right_i;\n"
800 
        "\treg\tsigned\t[(CWIDTH+IWIDTH+3-1):0] mpy_r, mpy_i;\n"
801 
        "\treg\tsigned\t[(CWIDTH+IWIDTH+3-1):0] rnd;\n"
802 
        "\tgenerate\n"
803 
        "\tif ((~ROUND)||(CWIDTH+IWIDTH-OWIDTH-SHIFT<1))\n"
804 
                "\t\tassign rnd = ({(CWIDTH+IWIDTH+3){1'b0}});\n"
805 
        "\telse\n"
806 
                "\t\tassign rnd = ({ {(OWIDTH+3+SHIFT){1'b0}},1'b1,\n"
807 
                "\t\t\t\t{(CWIDTH+IWIDTH-OWIDTH-SHIFT-1){1'b0}} });\n"
808 
        "\tendgenerate\n"
809 
"\n");
810 
        fprintf(fp,
811 2 dgisselq 
        "\talways @(posedge i_clk)\n"
812 
                "\t\tif (i_ce)\n"
813 
                "\t\tbegin\n"
814 
                        "\t\t\t// First clock, recover all values\n"
815 
                        "\t\t\tfifo_read <= fifo_left[fifo_read_addr];\n"
816 
                        "\t\t\t// These values are IWIDTH+CWIDTH+3 bits wide\n"
817 5 dgisselq 
                        "\t\t\t// although they only need to be (IWIDTH+1)\n"
818 
                        "\t\t\t// + (CWIDTH) bits wide.  (We\'ve got two\n"
819 
                        "\t\t\t// extra bits we need to get rid of.)\n"
820 2 dgisselq 
                        "\t\t\tmpy_r <= p_one - p_two;\n"
821 
                        "\t\t\tmpy_i <= p_three - p_one - p_two;\n"
822 
"\n"
823 
                        "\t\t\t// Second clock, round and latch for final clock\n"
824 
                        "\t\t\tb_right_r <= mpy_r + rnd;\n"
825 
                        "\t\t\tb_right_i <= mpy_i + rnd;\n"
826 5 dgisselq 
                        "\t\t\tb_left_r <= { {2{fifo_r[(IWIDTH+CWIDTH)]}},fifo_r } + rnd;\n"
827 
                        "\t\t\tb_left_i <= { {2{fifo_i[(IWIDTH+CWIDTH)]}},fifo_i } + rnd;\n"
828 6 dgisselq 
                        "\t\t\to_aux <= aux & ovalid;\n"
829 2 dgisselq 
                "\t\tend\n"
830 5 dgisselq 
"\n");
831 
        fprintf(fp,
832 2 dgisselq 
        "\t// Final clock--clock and remove unnecessary bits.\n"
833 5 dgisselq 
        "\t// We have (IWIDTH+CWIDTH+3) bits here, we need to drop down to\n"
834 
        "\t// OWIDTH, and SHIFT by SHIFT bits in the process.  The trick is\n"
835 
        "\t// that we don\'t need (IWIDTH+CWIDTH+3) bits.  We\'ve accumulated\n"
836 
        "\t// them, but the actual values will never fill all these bits.\n"
837 
        "\t// In particular, we only need:\n"
838 
        "\t//\t IWIDTH bits for the input\n"
839 
        "\t//\t     +1 bit for the add/subtract\n"
840 
        "\t//\t+CWIDTH bits for the coefficient multiply\n"
841 
        "\t//\t     +1 bit for the add/subtract in the complex multiply\n"
842 
        "\t//\t ------\n"
843 
        "\t//\t (IWIDTH+CWIDTH+2) bits at full precision.\n"
844 
        "\t//\n"
845 
        "\t// However, the coefficient multiply multiplied by a maximum value\n"
846 
        "\t// of 2^(CWIDTH-2).  Thus, we only have\n"
847 
        "\t//\t   IWIDTH bits for the input\n"
848 
        "\t//\t       +1 bit for the add/subtract\n"
849 
        "\t//\t+CWIDTH-2 bits for the coefficient multiply\n"
850 
        "\t//\t       +1 (optional) bit for the add/subtract in the cpx mpy.\n"
851 
        "\t//\t -------- ... multiply.  (This last bit may be shifted out.)\n"
852 
        "\t//\t (IWIDTH+CWIDTH) valid output bits. \n"
853 
        "\t// Now, if the user wants to keep any extras of these (via OWIDTH),\n"
854 
        "\t// or if he wishes to arbitrarily shift some of these off (via\n"
855 
        "\t// SHIFT) we accomplish that here.\n"
856 
        "\tassign o_left_r  = b_left_r[ (CWIDTH+IWIDTH-1-SHIFT-1):(CWIDTH+IWIDTH-OWIDTH-SHIFT-1)];\n"
857 
        "\tassign o_left_i  = b_left_i[ (CWIDTH+IWIDTH-1-SHIFT-1):(CWIDTH+IWIDTH-OWIDTH-SHIFT-1)];\n"
858 
        "\tassign o_right_r = b_right_r[(CWIDTH+IWIDTH-1-SHIFT-1):(CWIDTH+IWIDTH-OWIDTH-SHIFT-1)];\n"
859 
        "\tassign o_right_i = b_right_i[(CWIDTH+IWIDTH-1-SHIFT-1):(CWIDTH+IWIDTH-OWIDTH-SHIFT-1)];\n"
860 2 dgisselq 
"\n"
861 5 dgisselq 
        "\t// As a final step, we pack our outputs into two packed two\'s\n"
862 
        "\t// complement numbers per output word, so that each output word\n"
863 
        "\t// has (2*OWIDTH) bits in it, with the top half being the real\n"
864 
        "\t// portion and the bottom half being the imaginary portion.\n"
865 2 dgisselq 
        "\tassign       o_left = { o_left_r, o_left_i };\n"
866 
        "\tassign       o_right= { o_right_r,o_right_i};\n"
867 
"\n"
868 
"endmodule\n");
869 
        fclose(fp);
870 
}
871 
 
872 
void    build_stage(const char *fname, int stage, bool odd, int nbits, bool inv, int xtra) {
873 
        FILE    *fstage = fopen(fname, "w");
874 
        int     cbits = nbits + xtra;
875 
 
876 
        if ((cbits * 2) >= sizeof(long long)*8) {
877 
                fprintf(stderr, "ERROR: CMEM Coefficient precision requested overflows long long data type.\n");
878 
                exit(-1);
879 
        }
880 
 
881 
        if (fstage == NULL) {
882 
                fprintf(stderr, "ERROR: Could not open %s for writing!\n", fname);
883 
                perror("O/S Err was:");
884 
                fprintf(stderr, "Attempting to continue, but this file will be missing.\n");
885 
                return;
886 
        }
887 
 
888 
        fprintf(fstage,
889 
"////////////////////////////////////////////////////////////////////////////\n"
890 
"//\n"
891 
"// Filename:   %sfftstage_%c%d.v\n"
892 
"//\n"
893 
"// Project:    %s\n"
894 
"//\n"
895 
"// Purpose:    This file is (almost) a Verilog source file.  It is meant to\n"
896 
"//             be used by a FFT core compiler to generate FFTs which may be\n"
897 
"//             used as part of an FFT core.  Specifically, this file \n"
898 
"//             encapsulates the options of an FFT-stage.  For any 2^N length\n"
899 
"//             FFT, there shall be (N-1) of these stages.  \n"
900 
"//\n%s"
901 
"//\n",
902 
                (inv)?"i":"", (odd)?'o':'e', stage*2, prjname, creator);
903 
        fprintf(fstage, "%s", cpyleft);
904 
        fprintf(fstage, "module\t%sfftstage_%c%d(i_clk, i_rst, i_ce, i_sync, i_data, o_data, o_sync);\n",
905 
                (inv)?"i":"", (odd)?'o':'e', stage*2);
906 
        // These parameter values are useless at this point--they are to be
907 
        // replaced by the parameter values in the calling program.  Only
908 
        // problem is, the CWIDTH needs to match exactly!
909 
        fprintf(fstage, "\tparameter\tIWIDTH=%d,CWIDTH=%d,OWIDTH=%d;\n",
910 
                nbits, cbits, nbits+1);
911 
        fprintf(fstage,
912 
"\t// Parameters specific to the core that should be changed when this\n"
913 
"\t// core is built ... Note that the minimum LGSPAN (the base two log\n"
914 
"\t// of the span, or the base two log of the current FFT size) is 3.\n"
915 
"\t// Smaller spans (i.e. the span of 2) must use the dblstage module.\n"
916 6 dgisselq 
"\tparameter\tLGWIDTH=11, LGSPAN=9, LGBDLY=5, BFLYSHIFT=0;\n");
917 2 dgisselq 
        fprintf(fstage,
918 
"\tinput                                        i_clk, i_rst, i_ce, i_sync;\n"
919 
"\tinput                [(2*IWIDTH-1):0]        i_data;\n"
920 
"\toutput       reg     [(2*OWIDTH-1):0]        o_data;\n"
921 
"\toutput       reg                             o_sync;\n"
922 
"\n"
923 
"\treg  wait_for_sync;\n"
924 
"\treg  [(2*IWIDTH-1):0]        ib_a, ib_b;\n"
925 
"\treg  [(2*CWIDTH-1):0]        ib_c;\n"
926 8 dgisselq 
"\treg  ib_sync;\n"
927 2 dgisselq 
"\n"
928 
"\treg  b_started;\n"
929 
"\twire ob_sync;\n"
930 
"\twire [(2*OWIDTH-1):0]        ob_a, ob_b;\n");
931 
        fprintf(fstage,
932 
"\n"
933 
"\t// %scmem is defined as an array of real and complex values,\n"
934 
"\t// where the top CWIDTH bits are the real value and the bottom\n"
935 
"\t// CWIDTH bits are the imaginary value.\n"
936 
"\t//\n"
937 
"\t// cmem[i] = { (2^(CWIDTH-2)) * cos(2*pi*i/(2^LGWIDTH)),\n"
938 
"\t//           (2^(CWIDTH-2)) * sin(2*pi*i/(2^LGWIDTH)) };\n"
939 
"\t//\n"
940 
"\treg  [(2*CWIDTH-1):0]        %scmem [0:((1<<LGSPAN)-1)];\n"
941 
"\tinitial\t$readmemh(\"%scmem_%c%d.hex\",%scmem);\n\n",
942 
                (inv)?"i":"", (inv)?"i":"",
943 
                (inv)?"i":"", (odd)?'o':'e',stage<<1,
944 
                (inv)?"i":"");
945 
        {
946 
                FILE    *cmem;
947 
 
948 14 dgisselq 
                {
949 
                        char    *memfile, *ptr;
950 
 
951 
                        memfile = new char[strlen(fname)+128];
952 
                        strcpy(memfile, fname);
953 
                        if ((NULL != (ptr = strrchr(memfile, '/')))&&(ptr>memfile)) {
954 
                                ptr++;
955 
                                sprintf(ptr, "%scmem_%c%d.hex", (inv)?"i":"", (odd)?'o':'e', stage*2);
956 
                        } else {
957 
                                sprintf(memfile, "%s/%scmem_%c%d.hex",
958 
                                        COREDIR, (inv)?"i":"",
959 
                                        (odd)?'o':'e', stage*2);
960 
                        }
961 
                        // strcpy(&memfile[strlen(memfile)-2], ".hex");
962 
                        cmem = fopen(memfile, "w");
963 
                        if (NULL == cmem) {
964 
                                fprintf(stderr, "Could not open/write \'%s\' with FFT coefficients.\n", memfile);
965 
                                perror("Err from O/S:");
966 
                                exit(-2);
967 
                        }
968 
 
969 
                        delete[] memfile;
970 2 dgisselq 
                }
971 
                // fprintf(cmem, "// CBITS = %d, inv = %s\n", cbits, (inv)?"true":"false");
972 
                for(int i=0; i<stage/2; i++) {
973 
                        int k = 2*i+odd;
974 9 dgisselq 
                        double  W = ((inv)?1:-1)*2.0*M_PI*k/(double)(2*stage);
975 2 dgisselq 
                        double  c, s;
976 
                        long long ic, is, vl;
977 
 
978 
                        c = cos(W); s = sin(W);
979 
                        ic = (long long)((double)((1ll<<(cbits-2)) * c + 0.5));
980 
                        is = (long long)((double)((1ll<<(cbits-2)) * s + 0.5));
981 
                        vl = (ic & (~(-1ll << (cbits))));
982 
                        vl <<= (cbits);
983 
                        vl |= (is & (~(-1ll << (cbits))));
984 
                        fprintf(cmem, "%0*llx\n", ((cbits*2+3)/4), vl);
985 
                        /*
986 
                        fprintf(cmem, "%0*llx\t\t// %f+j%f -> %llx +j%llx\n",
987 
                                ((cbits*2+3)/4), vl, c, s,
988 
                                ic & (~(-1ll<<(((cbits+3)/4)*4))),
989 
                                is & (~(-1ll<<(((cbits+3)/4)*4))));
990 
                        */
991 
                } fclose(cmem);
992 
        }
993 
 
994 
        fprintf(fstage,
995 6 dgisselq 
"\treg  [(LGWIDTH-2):0]         iaddr;\n"
996 2 dgisselq 
"\treg  [(2*IWIDTH-1):0]        imem    [0:((1<<LGSPAN)-1)];\n"
997 
"\n"
998 8 dgisselq 
"\treg  [LGSPAN:0]              oB;\n"
999 2 dgisselq 
"\treg  [(2*OWIDTH-1):0]        omem    [0:((1<<LGSPAN)-1)];\n"
1000 
"\n"
1001 
"\talways @(posedge i_clk)\n"
1002 
        "\t\tif (i_rst)\n"
1003 
        "\t\tbegin\n"
1004 
                "\t\t\twait_for_sync <= 1'b1;\n"
1005 
                "\t\t\tiaddr <= 0;\n"
1006 
                "\t\t\toB <= 0;\n"
1007 8 dgisselq 
                "\t\t\tib_sync   <= 1'b0;\n"
1008 
                "\t\t\to_sync    <= 1'b0;\n"
1009 
                "\t\t\tb_started <= 1'b0;\n"
1010 2 dgisselq 
        "\t\tend\n"
1011 
        "\t\telse if ((i_ce)&&((~wait_for_sync)||(i_sync)))\n"
1012 
        "\t\tbegin\n"
1013 
                "\t\t\t//\n"
1014 
                "\t\t\t// First step: Record what we\'re not ready to use yet\n"
1015 
                "\t\t\t//\n"
1016 
                "\t\t\timem[iaddr[(LGSPAN-1):0]] <= i_data;\n"
1017 
                "\t\t\tiaddr <= iaddr + 1;\n"
1018 
                "\t\t\twait_for_sync <= 1'b0;\n"
1019 
"\n"
1020 
                "\t\t\t//\n"
1021 
                "\t\t\t// Now, we have all the inputs, so let\'s feed the\n"
1022 
                "\t\t\t// butterfly\n"
1023 
                "\t\t\t//\n"
1024 6 dgisselq 
                "\t\t\tif (iaddr[LGSPAN])\n"
1025 2 dgisselq 
                "\t\t\tbegin\n"
1026 
                        "\t\t\t\t// One input from memory, ...\n"
1027 
                        "\t\t\t\tib_a <= imem[iaddr[(LGSPAN-1):0]];\n"
1028 
                        "\t\t\t\t// One input clocked in from the top\n"
1029 
                        "\t\t\t\tib_b <= i_data;\n"
1030 
                        "\t\t\t\t// Set the sync to true on the very first\n"
1031 
                        "\t\t\t\t// valid input in, and hence on the very\n"
1032 
                        "\t\t\t\t// first valid data out per FFT.\n"
1033 6 dgisselq 
                        "\t\t\t\tib_sync <= (iaddr==(1<<(LGSPAN)));\n"
1034 2 dgisselq 
                        "\t\t\t\tib_c <= %scmem[iaddr[(LGSPAN-1):0]];\n"
1035 8 dgisselq 
                "\t\t\tend else begin\n"
1036 
                        "\t\t\t\t// Just to make debugging easier, let\'s\n"
1037 
                        "\t\t\t\t// clear these registers.  That\'ll make\n"
1038 
                        "\t\t\t\t// the transition easier to watch.\n"
1039 
                        "\t\t\t\tib_a <= {(2*IWIDTH){1'b0}};\n"
1040 
                        "\t\t\t\tib_b <= {(2*IWIDTH){1'b0}};\n"
1041 
                        "\t\t\t\tib_sync <= 1'b0;\n"
1042 
                "\t\t\tend\n"
1043 2 dgisselq 
"\n"
1044 
                "\t\t\t//\n"
1045 
                "\t\t\t// Next step: recover the outputs from the butterfly\n"
1046 
                "\t\t\t//\n"
1047 8 dgisselq 
                "\t\t\tif ((ob_sync||b_started)&&(~oB[LGSPAN]))\n"
1048 2 dgisselq 
                "\t\t\tbegin // A butterfly output is available\n"
1049 
                        "\t\t\t\tb_started <= 1'b1;\n"
1050 8 dgisselq 
                        "\t\t\t\tomem[oB[(LGSPAN-1):0]] <= ob_b;\n"
1051 2 dgisselq 
                        "\t\t\t\toB <= oB+1;\n"
1052 
"\n"
1053 6 dgisselq 
                        "\t\t\t\to_sync <= (ob_sync);\n"
1054 2 dgisselq 
                        "\t\t\t\to_data <= ob_a;\n"
1055 
                "\t\t\tend else if (b_started)\n"
1056 
                "\t\t\tbegin // and keep outputting once you start--at a rate\n"
1057 
                "\t\t\t// of one guaranteed output per clock that has i_ce set.\n"
1058 8 dgisselq 
                        "\t\t\t\to_data <= omem[oB[(LGSPAN-1):0]];\n"
1059 2 dgisselq 
                        "\t\t\t\toB <= oB + 1;\n"
1060 
                        "\t\t\t\to_sync <= 1'b0;\n"
1061 
                "\t\t\tend else\n"
1062 
                        "\t\t\t\to_sync <= 1'b0;\n"
1063 
        "\t\tend\n"
1064 5 dgisselq 
"\n", (inv)?"i":"");
1065 
        fprintf(fstage,
1066 2 dgisselq 
"\tbutterfly #(.IWIDTH(IWIDTH),.CWIDTH(CWIDTH),.OWIDTH(OWIDTH),\n"
1067 5 dgisselq 
"\t\t\t.MPYDELAY(%d\'d%d),.LGDELAY(LGBDLY),.SHIFT(BFLYSHIFT))\n"
1068 8 dgisselq 
"\t\tbfly(i_clk, i_rst, i_ce, ib_c,\n"
1069 2 dgisselq 
"\t\t\tib_a, ib_b, ib_sync, ob_a, ob_b, ob_sync);\n"
1070 
"endmodule;\n",
1071 14 dgisselq 
        lgdelay(nbits, xtra), bflydelay(nbits, xtra));
1072 2 dgisselq 
}
1073 
 
1074 
void    usage(void) {
1075 
        fprintf(stderr,
1076 
"USAGE:\tfftgen [-f <size>] [-d dir] [-c cbits] [-n nbits] [-m mxbits] [-s01]\n"
1077 
// "\tfftgen -i\n"
1078 
"\t-c <cbits>\tCauses all internal complex coefficients to be\n"
1079 
"\t\tlonger than the corresponding data bits, to help avoid\n"
1080 
"\t\tcoefficient truncation errors.\n"
1081 
"\t-d <dir>\tPlaces all of the generated verilog files into <dir>.\n"
1082 
"\t-f <size>\tSets the size of the FFT as the number of complex\n"
1083 
"\t\tsamples input to the transform.\n"
1084 
"\t-n <nbits>\tSets the number of bits in the twos complement input\n"
1085 
"\t\tto the FFT routine.\n"
1086 
"\t-m <mxbits>\tSets the maximum bit width that the FFT should ever\n"
1087 
"\t\tproduce.  Internal values greater than this value will be\n"
1088 
"\t\ttruncated to this value.\n"
1089 
"\t-s\tSkip the final bit reversal stage.  This is useful in\n"
1090 
"\t\talgorithms that need to apply a filter without needing to do\n"
1091 
"\t\tbin shifting, as these algorithms can, with this option, just\n"
1092 
"\t\tmultiply by a bit reversed correlation sequence and then\n"
1093 
"\t\tinverse FFT the (still bit reversed) result.\n"
1094 
"\t-S\tInclude the final bit reversal stage (default).\n"
1095 
"\t-0\tA forward FFT (default), meaning that the coefficients are\n"
1096 
"\t\tgiven by e^{-j 2 pi k/N n }.\n"
1097 
"\t-1\tAn inverse FFT, meaning that the coefficients are\n"
1098 
"\t\tgiven by e^{ j 2 pi k/N n }.\n");
1099 
}
1100 
 
1101 
// Features still needed:
1102 
//      Interactivity.
1103 
//      Some number of maximum bits, beyond which we won't accumulate any more.
1104 
//      Obviously, the build_stage above.
1105 
//      Copying the files of interest into the fft-core directory, from
1106 
//              whatever directory this file is run out of.
1107 
int main(int argc, char **argv) {
1108 
        int     fftsize = -1, lgsize = -1;
1109 
        int     nbitsin = 16, xtracbits = 4;
1110 
        int     nbitsout, maxbitsout = -1;
1111 
        bool    bitreverse = true, inverse=false, interactive = false,
1112 
                verbose_flag = false;
1113 
        FILE    *vmain;
1114 14 dgisselq 
        std::string     coredir = "fft-core", cmdline = "";
1115 2 dgisselq 
 
1116 
        if (argc <= 1)
1117 
                usage();
1118 
 
1119 14 dgisselq 
        cmdline = argv[0];
1120 2 dgisselq 
        for(int argn=1; argn<argc; argn++) {
1121 14 dgisselq 
                cmdline += " ";
1122 
                cmdline += argv[argn];
1123 
        }
1124 
 
1125 
        for(int argn=1; argn<argc; argn++) {
1126 2 dgisselq 
                if ('-' == argv[argn][0]) {
1127 
                        for(int j=1; (argv[argn][j])&&(j<100); j++) {
1128 
                                switch(argv[argn][j]) {
1129 
                                        case '0':
1130 
                                                inverse = false;
1131 
                                                break;
1132 
                                        case '1':
1133 
                                                inverse = true;
1134 
                                                break;
1135 
                                        case 'c':
1136 
                                                if (argn+1 >= argc) {
1137 
                                                        printf("No extra number of coefficient bits given\n");
1138 
                                                        usage(); exit(-1);
1139 
                                                }
1140 
                                                xtracbits = atoi(argv[++argn]);
1141 
                                                j+= 200;
1142 
                                                break;
1143 
                                        case 'd':
1144 
                                                if (argn+1 >= argc) {
1145 
                                                        printf("No extra number of coefficient bits given\n");
1146 
                                                        usage(); exit(-1);
1147 
                                                }
1148 14 dgisselq 
                                                coredir = argv[++argn];
1149 2 dgisselq 
                                                j += 200;
1150 
                                                break;
1151 
                                        case 'f':
1152 
                                                if (argn+1 >= argc) {
1153 
                                                        printf("No FFT Size given\n");
1154 
                                                        usage(); exit(-1);
1155 
                                                }
1156 
                                                fftsize = atoi(argv[++argn]);
1157 
                                                { int sln = strlen(argv[argn]);
1158 
                                                if (!isdigit(argv[argn][sln-1])){
1159 
                                                        switch(argv[argn][sln-1]) {
1160 
                                                        case 'k': case 'K':
1161 
                                                                fftsize <<= 10;
1162 
                                                                break;
1163 
                                                        case 'm': case 'M':
1164 
                                                                fftsize <<= 20;
1165 
                                                                break;
1166 
                                                        case 'g': case 'G':
1167 
                                                                fftsize <<= 30;
1168 
                                                                break;
1169 
                                                        default:
1170 
                                                                printf("Unknown FFT size, %s\n", argv[argn]);
1171 
                                                                exit(-1);
1172 
                                                        }
1173 
                                                }}
1174 
                                                j += 200;
1175 
                                                break;
1176 
                                        case 'h':
1177 
                                                usage();
1178 
                                                exit(0);
1179 
                                                break;
1180 
                                        case 'i':
1181 
                                                interactive = true;
1182 
                                                break;
1183 
                                        case 'm':
1184 
                                                if (argn+1 >= argc) {
1185 
                                                        printf("No maximum output bit value given\n");
1186 
                                                        exit(-1);
1187 
                                                }
1188 
                                                maxbitsout = atoi(argv[++argn]);
1189 
                                                j += 200;
1190 
                                                break;
1191 
                                        case 'n':
1192 
                                                if (argn+1 >= argc) {
1193 
                                                        printf("No input bit size given\n");
1194 
                                                        exit(-1);
1195 
                                                }
1196 
                                                nbitsin = atoi(argv[++argn]);
1197 
                                                j += 200;
1198 
                                                break;
1199 
                                        case 'S':
1200 
                                                bitreverse = true;
1201 
                                                break;
1202 
                                        case 's':
1203 
                                                bitreverse = false;
1204 
                                                break;
1205 
                                        case 'v':
1206 
                                                verbose_flag = true;
1207 
                                                break;
1208 
                                        default:
1209 
                                                printf("Unknown argument, -%c\n", argv[argn][j]);
1210 
                                                usage();
1211 
                                                exit(-1);
1212 
                                }
1213 
                        }
1214 
                } else {
1215 
                        printf("Unrecognized argument, %s\n", argv[argn]);
1216 
                        usage();
1217 
                        exit(-1);
1218 
                }
1219 
        }
1220 
 
1221 
        if ((lgsize < 0)&&(fftsize > 1)) {
1222 
                for(lgsize=1; (1<<lgsize) < fftsize; lgsize++)
1223 
                        ;
1224 
        }
1225 
 
1226 
        if ((fftsize <= 0)||(nbitsin < 1)||(nbitsin>48)) {
1227 
                printf("INVALID PARAMETERS!!!!\n");
1228 
                exit(-1);
1229 
        }
1230 
 
1231 
 
1232 
        if (nextlg(fftsize) != fftsize) {
1233 
                fprintf(stderr, "ERR: FFTSize (%d) *must* be a power of two\n",
1234 
                                fftsize);
1235 
                exit(-1);
1236 
        } else if (fftsize < 2) {
1237 
                fprintf(stderr, "ERR: Minimum FFTSize is 2, not %d\n",
1238 
                                fftsize);
1239 
                if (fftsize == 1) {
1240 
                        fprintf(stderr, "You do realize that a 1 point FFT makes very little sense\n");
1241 
                        fprintf(stderr, "in an FFT operation that handles two samples per clock?\n");
1242 
                        fprintf(stderr, "If you really need to do an FFT of this size, the output\n");
1243 
                        fprintf(stderr, "can be connected straight to the input.\n");
1244 
                } else {
1245 
                        fprintf(stderr, "Indeed, a size of %d doesn\'t make much sense to me at all.\n", fftsize);
1246 
                        fprintf(stderr, "Is such an operation even defined?\n");
1247 
                }
1248 
                exit(-1);
1249 
        }
1250 
 
1251 
        // Calculate how many output bits we'll have, and what the log
1252 
        // based two size of our FFT is.
1253 
        {
1254 
                int     tmp_size = fftsize;
1255 
 
1256 
                // The first stage always accumulates one bit, regardless
1257 
                // of whether you need to or not.
1258 
                nbitsout = nbitsin + 1;
1259 
                tmp_size >>= 1;
1260 
 
1261 
                while(tmp_size > 4) {
1262 
                        nbitsout += 1;
1263 
                        tmp_size >>= 2;
1264 
                }
1265 
 
1266 
                if (tmp_size > 1)
1267 
                        nbitsout ++;
1268 
 
1269 
                if (fftsize <= 2)
1270 
                        bitreverse = false;
1271 
        } if ((maxbitsout > 0)&&(nbitsout > maxbitsout))
1272 
                nbitsout = maxbitsout;
1273 
 
1274 
 
1275 
        {
1276 
                struct stat     sbuf;
1277 14 dgisselq 
                if (lstat(coredir.c_str(), &sbuf)==0) {
1278 2 dgisselq 
                        if (!S_ISDIR(sbuf.st_mode)) {
1279 14 dgisselq 
                                fprintf(stderr, "\'%s\' already exists, and is not a directory!\n", coredir.c_str());
1280 2 dgisselq 
                                fprintf(stderr, "I will stop now, lest I overwrite something you care about.\n");
1281 
                                fprintf(stderr, "To try again, please remove this file.\n");
1282 
                                exit(-1);
1283 
                        }
1284 
                } else
1285 14 dgisselq 
                        mkdir(coredir.c_str(), 0755);
1286 
                if (access(coredir.c_str(), X_OK|W_OK) != 0) {
1287 
                        fprintf(stderr, "I have no access to the directory \'%s\'.\n", coredir.c_str());
1288 2 dgisselq 
                        exit(-1);
1289 
                }
1290 
        }
1291 
 
1292 14 dgisselq 
        {
1293 
                std::string     fname_string;
1294 
 
1295 
                fname_string = coredir;
1296 
                fname_string += "/";
1297 
                if (inverse) fname_string += "i";
1298 
                fname_string += "fftmain.v";
1299 
 
1300 
                vmain = fopen(fname_string.c_str(), "w");
1301 
                if (NULL == vmain) {
1302 
                        fprintf(stderr, "Could not open \'%s\' for writing\n", fname_string.c_str());
1303 
                        perror("Err from O/S:");
1304 
                        exit(-1);
1305 
                }
1306 2 dgisselq 
        }
1307 
 
1308 
        fprintf(vmain, "/////////////////////////////////////////////////////////////////////////////\n");
1309 
        fprintf(vmain, "//\n");
1310 
        fprintf(vmain, "// Filename:    %sfftmain.v\n", (inverse)?"i":"");
1311 
        fprintf(vmain, "//\n");
1312 
        fprintf(vmain, "// Project:     %s\n", prjname);
1313 
        fprintf(vmain, "//\n");
1314 
        fprintf(vmain, "// Purpose:     This is the main module in the Doubletime FPGA FFT project.\n");
1315 
        fprintf(vmain, "//              As such, all other modules are subordinate to this one.\n");
1316 
        fprintf(vmain, "//              (I have been reading too much legalese this week ...)\n");
1317 
        fprintf(vmain, "//              This module accomplish a fixed size Complex FFT on %d data\n", fftsize);
1318 
        fprintf(vmain, "//              points.  The FFT is fully pipelined, and accepts as inputs\n");
1319 
        fprintf(vmain, "//              two complex two\'s complement samples per clock.\n");
1320 
        fprintf(vmain, "//\n");
1321 
        fprintf(vmain, "// Parameters:\n");
1322 
        fprintf(vmain, "//      i_clk\tThe clock.  All operations are synchronous with this clock.\n");
1323 
        fprintf(vmain, "//\ti_rst\tSynchronous reset, active high.  Setting this line will\n");
1324 
        fprintf(vmain, "//\t\t\tforce the reset of all of the internals to this routine.\n");
1325 
        fprintf(vmain, "//\t\t\tFurther, following a reset, the o_sync line will go\n");
1326 
        fprintf(vmain, "//\t\t\thigh the same time the first output sample is valid.\n");
1327 
        fprintf(vmain, "//      i_ce\tA clock enable line.  If this line is set, this module\n");
1328 
        fprintf(vmain, "//\t\t\twill accept two complex values as inputs, and produce\n");
1329 
        fprintf(vmain, "//\t\t\ttwo (possibly empty) complex values as outputs.\n");
1330 
        fprintf(vmain, "//\t\ti_left\tThe first of two complex input samples.  This value\n");
1331 
        fprintf(vmain, "//\t\t\tis split into two two\'s complement numbers, of \n");
1332 
        fprintf(vmain, "//\t\t\t%d bits each, with the real portion in the high\n", nbitsin);
1333 
        fprintf(vmain, "//\t\t\torder bits, and the imaginary portion taking the\n");
1334 
        fprintf(vmain, "//\t\t\tbottom %d bits.\n", nbitsin);
1335 
        fprintf(vmain, "//\t\ti_right\tThis is the same thing as i_left, only this is the\n");
1336 
        fprintf(vmain, "//\t\t\tsecond of two such samples.  Hence, i_left would\n");
1337 
        fprintf(vmain, "//\t\t\tcontain input sample zero, i_right would contain\n");
1338 
        fprintf(vmain, "//\t\t\tsample one.  On the next clock i_left would contain\n");
1339 
        fprintf(vmain, "//\t\t\tinput sample two, i_right number three and so forth.\n");
1340 
        fprintf(vmain, "//\t\to_left\tThe first of two output samples, of the same\n");
1341 
        fprintf(vmain, "//\t\t\tformat as i_left, only having %d bits for each of\n", nbitsout);
1342 
        fprintf(vmain, "//\t\t\tthe real and imaginary components, leading to %d\n", nbitsout*2);
1343 
        fprintf(vmain, "//\t\t\tbits total.\n");
1344 
        fprintf(vmain, "//\t\to_right\tThe second of two output samples produced each clock.\n");
1345 
        fprintf(vmain, "//\t\t\tThis has the same format as o_left.\n");
1346 
        fprintf(vmain, "//\t\to_sync\tA one bit output indicating the first valid sample\n");
1347 
        fprintf(vmain, "//\t\t\tproduced by this FFT following a reset.  Ever after,\n");
1348 
        fprintf(vmain, "//\t\t\tthis will indicate the first sample of an FFT frame.\n");
1349 
        fprintf(vmain, "//\n");
1350 14 dgisselq 
        fprintf(vmain, "// Arguments:\tThis file was computer generated using the\n");
1351 
        fprintf(vmain, "//\t\tfollowing command line:\n");
1352 
        fprintf(vmain, "//\n");
1353 
        fprintf(vmain, "//\t\t%% %s\n", cmdline.c_str());
1354 
        fprintf(vmain, "//\n");
1355 2 dgisselq 
        fprintf(vmain, "%s", creator);
1356 
        fprintf(vmain, "//\n");
1357 
        fprintf(vmain, "%s", cpyleft);
1358 
 
1359 
 
1360 
        fprintf(vmain, "//\n");
1361 
        fprintf(vmain, "//\n");
1362 
        fprintf(vmain, "module %sfftmain(i_clk, i_rst, i_ce,\n", (inverse)?"i":"");
1363 
        fprintf(vmain, "\t\ti_left, i_right,\n");
1364 
        fprintf(vmain, "\t\to_left, o_right, o_sync);\n");
1365 
        fprintf(vmain, "\tparameter\tIWIDTH=%d, OWIDTH=%d, LGWIDTH=%d;\n", nbitsin, nbitsout, lgsize);
1366 
        assert(lgsize > 0);
1367 
        fprintf(vmain, "\tinput\t\ti_clk, i_rst, i_ce;\n");
1368 
        fprintf(vmain, "\tinput\t\t[(2*IWIDTH-1):0]\ti_left, i_right;\n");
1369 
        fprintf(vmain, "\toutput\treg\t[(2*OWIDTH-1):0]\to_left, o_right;\n");
1370 
        fprintf(vmain, "\toutput\treg\t\t\to_sync;\n");
1371 
        fprintf(vmain, "\n\n");
1372 
 
1373 
        fprintf(vmain, "\t// Outputs of the FFT, ready for bit reversal.\n");
1374 
        fprintf(vmain, "\twire\t[(2*OWIDTH-1):0]\tbr_left, br_right;\n");
1375 
        fprintf(vmain, "\n\n");
1376 
 
1377 
        int     tmp_size = fftsize, lgtmp = lgsize;
1378 
        if (fftsize == 2) {
1379 
                if (bitreverse) {
1380 
                        fprintf(vmain, "\treg\tbr_start;\n");
1381 
                        fprintf(vmain, "\talways @(posedge i_clk)\n");
1382 
                        fprintf(vmain, "\t\tif (i_rst)\n");
1383 
                        fprintf(vmain, "\t\t\tbr_start <= 1'b0;\n");
1384 
                        fprintf(vmain, "\t\telse if (i_ce)\n");
1385 
                        fprintf(vmain, "\t\t\tbr_start <= 1'b1;\n");
1386 
                }
1387 
                fprintf(vmain, "\n\n");
1388 6 dgisselq 
                fprintf(vmain, "\tdblstage\t#(IWIDTH)\tstage_2(i_clk, i_rst, i_ce,\n");
1389 
                fprintf(vmain, "\t\t\t(~i_rst), i_left, i_right, br_left, br_right);\n");
1390 2 dgisselq 
                fprintf(vmain, "\n\n");
1391 
        } else {
1392 
                int     nbits = nbitsin, dropbit=0;
1393 
                // Always do a first stage
1394 
                fprintf(vmain, "\n\n");
1395 
                fprintf(vmain, "\twire\t\tw_s%d, w_os%d;\n", fftsize, fftsize);
1396 
                fprintf(vmain, "\twire\t[(2*IWIDTH+1):0]\tw_e%d, w_o%d;\n", fftsize, fftsize);
1397 
                fprintf(vmain, "\t%sfftstage_e%d\t#(IWIDTH,IWIDTH+%d,IWIDTH+1,%d,%d,%d,0)\tstage_e%d(i_clk, i_rst, i_ce,\n",
1398 
                        (inverse)?"i":"", fftsize,
1399 
                        xtracbits,
1400 
                        lgsize, lgtmp-2, lgdelay(nbits,xtracbits),
1401 
                        fftsize);
1402 
                fprintf(vmain, "\t\t\t(~i_rst), i_left, w_e%d, w_s%d);\n", fftsize, fftsize);
1403 
                fprintf(vmain, "\t%sfftstage_o%d\t#(IWIDTH,IWIDTH+%d,IWIDTH+1,%d,%d,%d,0)\tstage_o%d(i_clk, i_rst, i_ce,\n",
1404 
                        (inverse)?"i":"", fftsize,
1405 
                        xtracbits,
1406 
                        lgsize, lgtmp-2, lgdelay(nbits,xtracbits),
1407 
                        fftsize);
1408 9 dgisselq 
                fprintf(vmain, "\t\t\t(~i_rst), i_right, w_o%d, w_os%d);\n", fftsize, fftsize);
1409 2 dgisselq 
                fprintf(vmain, "\n\n");
1410 
 
1411 14 dgisselq 
                {
1412 
                        std::string     fname;
1413 
                        char    numstr[12];
1414 2 dgisselq 
 
1415 14 dgisselq 
                        fname = coredir + "/";
1416 
                        if (inverse) fname += "i";
1417 
                        fname += "fftstage_e";
1418 
                        sprintf(numstr, "%d", fftsize);
1419 
                        fname += numstr;
1420 
                        fname += ".v";
1421 
                        build_stage(fname.c_str(), fftsize/2, 0, nbits, inverse, xtracbits);     // Even stage
1422 
 
1423 
                        fname = coredir + "/";
1424 
                        if (inverse) fname += "i";
1425 
                        fname += "fftstage_o";
1426 
                        sprintf(numstr, "%d", fftsize);
1427 
                        fname += numstr;
1428 
                        fname += ".v";
1429 
                        build_stage(fname.c_str(), fftsize/2, 1, nbits, inverse, xtracbits);    // Odd  stage
1430 
                }
1431 
 
1432 2 dgisselq 
                nbits += 1;     // New number of input bits
1433 
                tmp_size >>= 1; lgtmp--;
1434 
                dropbit = 0;
1435 
                fprintf(vmain, "\n\n");
1436 
                while(tmp_size >= 8) {
1437 
                        int     obits = nbits+((dropbit)?0:1);
1438 
 
1439 
                        if ((maxbitsout > 0)&&(obits > maxbitsout))
1440 
                                obits = maxbitsout;
1441 
 
1442 
                        fprintf(vmain, "\twire\t\tw_s%d, w_os%d;\n", tmp_size, tmp_size);
1443 
                        fprintf(vmain, "\twire\t[%d:0]\tw_e%d, w_o%d;\n", 2*obits-1, tmp_size, tmp_size);
1444 
                        fprintf(vmain, "\t%sfftstage_e%d\t#(%d,%d,%d,%d,%d,%d,%d)\tstage_e%d(i_clk, i_rst, i_ce,\n",
1445 
                                (inverse)?"i":"", tmp_size,
1446 
                                nbits, nbits+xtracbits, obits,
1447 9 dgisselq 
                                lgsize, lgtmp-2, lgdelay(nbits,xtracbits), (dropbit)?0:0,
1448 2 dgisselq 
                                tmp_size);
1449 
                        fprintf(vmain, "\t\t\t\t\t\tw_s%d, w_e%d, w_e%d, w_s%d);\n", tmp_size<<1, tmp_size<<1, tmp_size, tmp_size);
1450 
                        fprintf(vmain, "\t%sfftstage_o%d\t#(%d,%d,%d,%d,%d,%d,%d)\tstage_o%d(i_clk, i_rst, i_ce,\n",
1451 
                                (inverse)?"i":"", tmp_size,
1452 
                                nbits, nbits+xtracbits, obits,
1453 9 dgisselq 
                                lgsize, lgtmp-2, lgdelay(nbits,xtracbits), (dropbit)?0:0,
1454 2 dgisselq 
                                tmp_size);
1455 
                        fprintf(vmain, "\t\t\t\t\t\tw_s%d, w_o%d, w_o%d, w_os%d);\n", tmp_size<<1, tmp_size<<1, tmp_size, tmp_size);
1456 
                        fprintf(vmain, "\n\n");
1457 
 
1458 14 dgisselq 
                        {
1459 
                                std::string     fname;
1460 
                                char            numstr[12];
1461 2 dgisselq 
 
1462 14 dgisselq 
                                fname = coredir + "/";
1463 
                                if (inverse) fname += "i";
1464 
                                fname += "fftstage_e";
1465 
                                sprintf(numstr, "%d", tmp_size);
1466 
                                fname += numstr;
1467 
                                fname += ".v";
1468 
                                build_stage(fname.c_str(), tmp_size/2, 0, nbits, inverse, xtracbits);    // Even stage
1469 2 dgisselq 
 
1470 14 dgisselq 
                                fname = coredir + "/";
1471 
                                if (inverse) fname += "i";
1472 
                                fname += "fftstage_o";
1473 
                                sprintf(numstr, "%d", tmp_size);
1474 
                                fname += numstr;
1475 
                                fname += ".v";
1476 
                                build_stage(fname.c_str(), tmp_size/2, 1, nbits, inverse, xtracbits);   // Odd  stage
1477 
                        }
1478 
 
1479 
 
1480 2 dgisselq 
                        dropbit ^= 1;
1481 
                        nbits = obits;
1482 
                        tmp_size >>= 1; lgtmp--;
1483 
                }
1484 
 
1485 
                if (tmp_size == 4) {
1486 
                        int     obits = nbits+((dropbit)?0:1);
1487 
 
1488 
                        if ((maxbitsout > 0)&&(obits > maxbitsout))
1489 
                                obits = maxbitsout;
1490 
 
1491 
                        fprintf(vmain, "\twire\t\tw_s4, w_os4;\n");
1492 
                        fprintf(vmain, "\twire\t[%d:0]\tw_e4, w_o4;\n", 2*obits-1);
1493 
                        fprintf(vmain, "\tqtrstage\t#(%d,%d,%d,0,%d,%d)\tstage_e4(i_clk, i_rst, i_ce,\n",
1494 9 dgisselq 
                                nbits, obits, lgsize, (inverse)?1:0, (dropbit)?0:0);
1495 6 dgisselq 
                        fprintf(vmain, "\t\t\t\t\t\tw_s8, w_e8, w_e4, w_s4);\n");
1496 2 dgisselq 
                        fprintf(vmain, "\tqtrstage\t#(%d,%d,%d,1,%d,%d)\tstage_o4(i_clk, i_rst, i_ce,\n",
1497 9 dgisselq 
                                nbits, obits, lgsize, (inverse)?1:0, (dropbit)?0:0);
1498 6 dgisselq 
                        fprintf(vmain, "\t\t\t\t\t\tw_s8, w_o8, w_o4, w_os4);\n");
1499 2 dgisselq 
                        dropbit ^= 1;
1500 
                        nbits = obits;
1501 
                        tmp_size >>= 1; lgtmp--;
1502 
                }
1503 
 
1504 
                {
1505 
                        int obits = nbits+((dropbit)?0:1);
1506 
                        if (obits > nbitsout)
1507 
                                obits = nbitsout;
1508 
                        if ((maxbitsout>0)&&(obits > maxbitsout))
1509 
                                obits = maxbitsout;
1510 
                        fprintf(vmain, "\twire\t\tw_s2;\n");
1511 
                        fprintf(vmain, "\twire\t[%d:0]\tw_e2, w_o2;\n", 2*obits-1);
1512 9 dgisselq 
                        fprintf(vmain, "\tdblstage\t#(%d,%d,%d)\tstage_2(i_clk, i_rst, i_ce,\n", nbits, obits,(dropbit)?0:1);
1513 6 dgisselq 
                        fprintf(vmain, "\t\t\t\t\tw_s4, w_e4, w_o4, w_e2, w_o2, w_s2);\n");
1514 2 dgisselq 
 
1515 
                        fprintf(vmain, "\n\n");
1516 
                        nbits = obits;
1517 
                }
1518 
 
1519 
                fprintf(vmain, "\t// Prepare for a (potential) bit-reverse stage.\n");
1520 
                fprintf(vmain, "\tassign\tbr_left  = w_e2;\n");
1521 
                fprintf(vmain, "\tassign\tbr_right = w_o2;\n");
1522 
                fprintf(vmain, "\n");
1523 
                if (bitreverse) {
1524 
                        fprintf(vmain, "\twire\tbr_start;\n");
1525 
                        fprintf(vmain, "\treg\tr_br_started;\n");
1526 
                        fprintf(vmain, "\t// A delay of one clock here is perfect, as it matches the delay in\n");
1527 
                        fprintf(vmain, "\t// our dblstage.\n");
1528 
                        fprintf(vmain, "\talways @(posedge i_clk)\n");
1529 
                        fprintf(vmain, "\t\tif (i_rst)\n");
1530 
                        fprintf(vmain, "\t\t\tr_br_started <= 1'b0;\n");
1531 
                        fprintf(vmain, "\t\telse\n");
1532 
                        fprintf(vmain, "\t\t\tr_br_started <= r_br_started || w_s4;\n");
1533 
                        fprintf(vmain, "\tassign\tbr_start = r_br_started;\n");
1534 
                }
1535 
        }
1536 
 
1537 
        fprintf(vmain, "\n");
1538 
        fprintf(vmain, "\t// Now for the bit-reversal stage.\n");
1539 
        fprintf(vmain, "\twire\tbr_sync;\n");
1540 
        fprintf(vmain, "\twire\t[(2*OWIDTH-1):0]\tbr_o_left, br_o_right;\n");
1541 
        if (bitreverse) {
1542 
                fprintf(vmain, "\tdblreverse\t#(%d,%d)\trevstage(i_clk, i_rst,\n", lgsize, nbitsout);
1543 
                fprintf(vmain, "\t\t\t(i_ce & br_start), br_left, br_right,\n");
1544 
                fprintf(vmain, "\t\t\tbr_o_left, br_o_right, br_sync);\n");
1545 
        } else {
1546 
                fprintf(vmain, "\tassign\tbr_o_left  = br_left;\n");
1547 
                fprintf(vmain, "\tassign\tbr_o_right = br_right;\n");
1548 
                fprintf(vmain, "\tassign\tbr_sync    = w_s2;\n");
1549 
        }
1550 
 
1551 
        fprintf(vmain, "\n\n");
1552 
        fprintf(vmain, "\t// Last clock: Register our outputs, we\'re done.\n");
1553 
        fprintf(vmain, "\talways @(posedge i_clk)\n");
1554 
        fprintf(vmain, "\t\tbegin\n");
1555 
        fprintf(vmain, "\t\t\to_left  <= br_o_left;\n");
1556 
        fprintf(vmain, "\t\t\to_right <= br_o_right;\n");
1557 
        fprintf(vmain, "\t\t\to_sync  <= br_sync;\n");
1558 
        fprintf(vmain, "\t\tend\n");
1559 
        fprintf(vmain, "\n\n");
1560 
        fprintf(vmain, "endmodule\n");
1561 
        fclose(vmain);
1562 
 
1563 14 dgisselq 
        {
1564 
                std::string     fname;
1565 2 dgisselq 
 
1566 14 dgisselq 
                fname = coredir + "/butterfly.v";
1567 
                build_butterfly(fname.c_str(), xtracbits);
1568 2 dgisselq 
 
1569 14 dgisselq 
                fname = coredir + "/shiftaddmpy.v";
1570 
                build_multiply(fname.c_str());
1571 2 dgisselq 
 
1572 14 dgisselq 
                fname = coredir + "/qtrstage.v";
1573 
                build_quarters(fname.c_str());
1574 2 dgisselq 
 
1575 14 dgisselq 
                fname = coredir + "/dblstage.v";
1576 
                build_dblstage(fname.c_str());
1577 
 
1578 
                if (bitreverse) {
1579 
                        fname = coredir + "/dblreverse.v";
1580 
                        build_dblreverse(fname.c_str());
1581 
                }
1582 2 dgisselq 
        }
1583 
}
1584 
 

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