OpenCores
URL https://opencores.org/ocsvn/dds_synthesizer/dds_synthesizer/trunk

Subversion Repositories dds_synthesizer

[/] [dds_synthesizer/] [trunk/] [matlab/] [generate_vhdl_lut.m] - Blame information for rev 5

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 3 plutonium
% generate_vhdl_lut()
2
% This function is a general purpose generator for creating LUTs in VHDL
3
%
4
% Description of the arguments:
5
% lut_name          - String describing the name of the LUT
6
% input_width_name  - String describing the name of the LUT input wordsize
7
% input_width       - Input wordsize as integer
8
% output_width_name - String describing the name of the LUT output wordsize
9
% output_width      - Output wordsize as integer
10
% functionhandle    - handle to function to be implemented in LUT, function must have on input argument
11
%                     in the value range from 0...input_width-1 producing values in the range 0...output_width-1
12
% filename          - Filename of the LUT
13
% filepath          - Path where to store the result
14
%
15
% Copyright (C) 2009 Martin Kumm
16
%
17
% This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License
18
% as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version.
19
%
20
% This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied
21
% warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
22
%
23
% You should have received a copy of the GNU General Public License along with this program;
24
% if not, see <http://www.gnu.org/licenses/>.
25
 
26
function generate_vhdl_lut(lut_name, input_width_name, input_width, output_width_name, output_width, functionhandle, filename, filepath)
27
comment = '-- This file is automatically generated by a matlab script \n--\n-- Do not modify directly!\n--\n\n';
28
vhdl_header = 'library ieee;\nuse ieee.std_logic_1164.all;\nuse IEEE.STD_LOGIC_arith.all;\nuse IEEE.STD_LOGIC_signed.all;\n\n';
29
package_header = sprintf('package %s_pkg is\n\n',lut_name);
30
type_definition = sprintf('type lut_type is array(0 to 2**(%s-2)-1) of std_logic_vector(%s-1 downto 0);\n\n',input_width_name,output_width_name);
31
lut_def_start = sprintf('       constant %s : lut_type := (\n',lut_name);
32
lut_def_end = ' );\n\n';
33
 
34
 
35
vhdl_end = sprintf('end %s_pkg;\n\npackage body %s_pkg is\nend %s_pkg;',lut_name,lut_name,lut_name);
36
constant_definitions = sprintf('constant %s : integer := %d;\nconstant %s : integer := %d;\n\n',input_width_name, input_width,output_width_name, output_width);
37
 
38
filename = sprintf('%s/%s_%d_x_%d.vhd',filepath,filename,input_width,output_width);
39
disp(['Generating LUT using output file ',filename])
40
 
41
fid=fopen(filename,'w+');
42
if(fid ~= -1)
43
    fprintf(fid, comment);
44
    fprintf(fid, vhdl_header);
45
    fprintf(fid, package_header);
46
    fprintf(fid, constant_definitions);
47
    fprintf(fid, type_definition);
48
    fprintf(fid, lut_def_start);
49
 
50
    for i=1:2^(input_width-2)-1
51
        fprintf(fid, '    conv_std_logic_vector(%d,%s),\n',round((2^(output_width-1)-1)*functionhandle(i)),output_width_name);
52
    end;
53
    fprintf(fid, '    conv_std_logic_vector(%d,%s)\n',round((2^(output_width-1)-1)*functionhandle(i)),output_width_name);
54
 
55
    fprintf(fid, lut_def_end);
56
    fprintf(fid, vhdl_end);
57
 
58
 
59
    fclose(fid);
60
else
61
    disp('Error: could not open file');
62
end;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.