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[/] [deflatecore/] [tags/] [arelease/] [HashChain.vhd] - Blame information for rev 18

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1 2 smallcode
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-- Company: 
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-- Engineer:
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-- Create Date:    03:46:54 10/31/05
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-- Design Name:    
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-- Module Name:    Hash - Behavioral
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-- Project Name:   Deflate
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-- Revision:
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-- Revision 0.01 - File Created
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-- Additional Comments:
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-- 
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--------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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use IEEE.std_logic_unsigned.all;
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---- Uncomment the following library declaration if instantiating
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---- any Xilinx primitives in this code.
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--library UNISIM;
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--use UNISIM.VComponents.all;
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entity HashChain is
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    Port ( Data_in  : in std_logic_vector (7 downto 0);   -- Data input from byte stream
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           Hash_o   : out real;                          -- Hash value of previous data
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           Clock,                                                                                                          -- Clock
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                          Reset,                                                                                                           -- Reset
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                          Output_E : in bit                                                                        -- Output Enable
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           );
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end HashChain;
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--From Robert Sedgwicks Algorithms in C
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architecture RSHash of HashChain is
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signal mode,
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       data : integer;
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begin
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mode <= 0 when clock = '1' and reset = '0' and Output_E = '1' else  -- Active data being latched to output
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        1 when clock = '0' and reset = '0' and Output_E = '1' else  -- No change to output till thge next clock
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                  2 when clock = '1' and reset = '1' and Output_E = '1' else  -- Reset active
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                  2 when clock = '1' and reset = '1' and Output_E = '0' else  -- Reset active
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                  3 when clock = '1' and reset = '0' and Output_E = '0' else  -- Disable output
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                  4;
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--data <= Data_in; --Need to convert the input standard logic input to a form that can be processed using arthimetic
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Process (mode)
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variable a, b, hash : real ; -- Variables for calculating the output
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begin
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case mode is
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when 0 =>                    --Calculate the hash key of the current input value using the Data on the input vector
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   hash := hash * a;
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   hash := hash + data;
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        a    := a * b;
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when 2 =>
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    hash := 0.0;                                        -- Reset 
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         a:=378551.0;                                   -- Reset 
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         b:=63689.0;                                    -- Reset
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when 3=>                                                                -- Need to implement a disable output section
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when OTHERS =>                                          -- Do nothing 
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End case;
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hash_o<= hash;                                          -- Assign the clculated hash value to the output
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end process;
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end RSHash;
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--An algorithm produced by Professor Daniel J. Bernstein and 
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--shown first to the world on the usenet newsgroup comp.lang.c. 
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--It is one of the most efficient hash functions ever published
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--Actual function hash(i) = hash(i - 1) * 33 + str[i];
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--Function now implemented using XOR hash(i) = hash(i - 1) * 33 ^ str[i];
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architecture DJB of HashChain is
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signal mode,
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       data : integer;
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begin
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mode <= 0 when clock = '1' and reset = '0' and Output_E = '1' else  -- Active data being latched to output
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        1 when clock = '0' and reset = '0' and Output_E = '1' else  -- No change to output till thge next clock
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                  2 when clock = '1' and reset = '1' and Output_E = '1' else  -- Reset active
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                  2 when clock = '1' and reset = '1' and Output_E = '0' else  -- Reset active
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                  3 when clock = '1' and reset = '0' and Output_E = '0' else  -- Disable output
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                  4;
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--data <= Data_in; --Need to convert the input standard logic input to a form that can be processed using arthimetic
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Process (mode)
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variable a, b, hash : real ; -- Variables for calculating the output
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begin
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case mode is
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when 0 =>                    --Calculate the hash key of the current input value using the Data on the input vector
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        a := hash * 33.0;
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   hash := a + hash + data;
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when 2 =>
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    hash := 5831.0;                             -- Reset 
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when 3=>                                                                -- Need to implement a disable output section
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when OTHERS =>                                          -- Do nothing 
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End case;
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hash_o<= hash;                                          -- Assign the clculated hash value to the output
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end process;
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end DJB;
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--This algorithm was created for sdbm (a public-domain reimplementation of ndbm) database library.
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--it was found to do well in scrambling bits, causing better distribution of the keys and fewer splits.
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--it also happens to be a good general hashing function with good distribution. 
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--the actual function is hash(i) = hash(i - 1) * 65599 + str[i];
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architecture sdbm of HashChain is
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signal mode,
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       data : integer;
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begin
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mode <= 0 when clock = '1' and reset = '0' and Output_E = '1' else  -- Active data being latched to output
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        1 when clock = '0' and reset = '0' and Output_E = '1' else  -- No change to output till thge next clock
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                  2 when clock = '1' and reset = '1' and Output_E = '1' else  -- Reset active
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                  2 when clock = '1' and reset = '1' and Output_E = '0' else  -- Reset active
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                  3 when clock = '1' and reset = '0' and Output_E = '0' else  -- Disable output
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                  4;
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--data <= Data_in;           --Need to convert the input standard logic input to a form that can be processed using arthimetic
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Process (mode)
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variable a, b, hash : real ; -- Variables for calculating the output
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begin
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case mode is
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when 0 =>                    --Calculate the hash key of the current input value using the Data on the input vector
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        a := hash * 65599.0;
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   hash := a + hash + data;
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when 2 =>
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    hash := 0.0;                                      -- Reset 
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when 3=>                                                                -- Need to implement a disable output section
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when OTHERS =>                                          -- Do nothing 
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End case;
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hash_o<= hash;                                          -- Assign the clculated hash value to the output
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end process;
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end sdbm;

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