OpenCores
URL https://opencores.org/ocsvn/deflatecore/deflatecore/trunk

Subversion Repositories deflatecore

[/] [deflatecore/] [trunk/] [hashkey.vhd] - Blame information for rev 18

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 15 smallcode
--------------------------------------------------------------------------------
2
-- Create Date:    15:24:38 11/05/2006
3
-- Design Name:    
4
-- Module Name:    Hash key
5
-- Project Name:   Deflate
6
-- Target Device:  
7
-- Dependencies: Hashchain.vhdl
8
-- 
9
-- Revision:
10
-- Revision 0.50 - Works but not optimised
11
-- Additional Comments:
12
-- A wrapper for the DJB2 algorithm has a 3 byte buffer and uses an extra input byte  generate 
13
-- to generate 4 byte hash keys
14
-- 
15
--------------------------------------------------------------------------------
16
 
17
library IEEE;
18
use IEEE.STD_LOGIC_1164.ALL;
19
use IEEE.STD_LOGIC_ARITH.ALL;
20
use IEEE.STD_LOGIC_UNSIGNED.ALL;
21
use work.mat.all;
22
use work.all;
23
 
24
entity hash_key is
25
--generic definitions, data bus widths.
26
generic
27
       (
28
                 hash_width: natural := 32;
29
                 data_width: natural := 8);
30
port
31
       (
32
                 data_in: in std_logic_vector(data_width -1 downto 0);
33
                 hash_out: out std_logic_vector (hash_width -1 downto 0);
34
                 Clock,
35
                 reset,
36
                 start : in bit;
37 16 smallcode
                 ready, -- Not used
38 15 smallcode
                 busy: out bit);
39
end hash_key;
40
 
41
architecture genhash of hash_key is
42
component HashChain
43
          Generic (
44
                         Data_Width : natural := 8;       -- Data Bus width
45
                         Hash_Width : natural := 32       -- Width of the hash key generated 
46
                                 );
47
           Port(
48
                          Hash_o   : out std_logic_vector (Hash_Width - 1 downto 0);      -- Hash key
49
           Data_in  : in  std_logic_vector (Data_Width -1 downto 0);       -- Data input from byte stream
50
                          Busy,                                                                                                                                                         -- Busy
51
                          Done: out bit;                                                                                                                                        -- Key generated
52
                          Clock,                                                                                                                             -- Clock
53
                          Reset,                                                                                                                             -- Reset
54
                          Start,                                                                                                                                                                -- Start the hash key generation
55
                          O_E : in  bit                                                                               -- Output Enable
56
           );
57
end component;
58
 
59
signal hg1:    std_logic_vector ( (Hash_Width -1) downto 0);                      -- Accept a 32 bit hash input  
60
signal Datain, Buffer_1, Buffer_2, Buffer_3 : std_logic_vector (Data_Width-1 downto 0);  -- 8 bit io buffers
61
signal Algo_start, Algo_clk,Algo_rst,Algo_op, Algo_bsy, Key_done: bit;                                            -- Algorithm interface aignals
62
signal mode, buff_count, proc_count :integer;
63
 
64
begin
65
glink:HashChain port map (Hash_O  => hg1,
66
                          Data_in => Datain,
67
                                         Clock   => Algo_clk,
68
                                         Reset   => Algo_rst,
69
                                         Start   => Algo_start,
70
                                         O_E     => Algo_op,
71
                          Busy   => Algo_bsy,
72
                                         Done    => Key_done);
73
-- 3 byte input buffer
74
-- Stores the last 3 bytes used to generate a hash key to keep the hash keys current
75
-- The hash algorightm is reset after every 4 byte key is generated 
76
--      to ensure that the matches are of 4 byte lengths
77
Buffer_1 <= X"00"    when mode = 0 else
78
                                Buffer_2 when mode = 2 else
79
                                Buffer_1;
80
 
81
Buffer_2 <= X"00"    when mode = 0 else
82
                                Buffer_3 when mode = 2 else
83
                                Buffer_2;
84
 
85
Buffer_3 <= X"00"    when mode = 0 else
86
                                Data_in  when mode = 2 else
87
                                Buffer_3;
88
 
89
--Common Clock
90
Algo_clk <= Clock;
91
 
92
--      Reset the hash algorithm when reset
93
Algo_rst <= '1' when mode = 0 or mode = 1else
94
            '0';
95
 
96
--Sync signals
97
busy <= '1' when mode > 1 else
98
        '0';
99
 
100
--Send a start for every input byte.
101
Algo_start <= '1' when mode = 2 and buff_count = 3 else -- the 3 byte buffer is empty
102
              '1' when mode = 4 else                                              -- 3 byte buffer is full and one byte has been processed
103
              '0';
104
 
105
-- 4 bytes sent one after the other     to the hashing algorithm
106
Datain <= X"00" when mode = 0 or mode = 1 else
107
          Buffer_1 when mode = 2 and buff_count = 3  else
108
                         Buffer_1 when mode = 4 and buff_count = 3 and proc_count = 1 else
109
                         Buffer_2 when mode = 4 and buff_count = 3 and proc_count = 2 else
110
                         Buffer_3 when mode = 4 and buff_count = 3 and proc_count = 3 else
111
                         X"00";
112
 
113
-- Enabling hash algo output
114
Algo_op <= '1' when proc_count > 2 else
115
           '0';
116
 
117
--Buffer counter 
118
buffer_counter: process (mode)
119
begin
120
   if mode = 0 then
121
       buff_count <= 0;      -- Reset
122
        elsif   mode = 2 and buff_count < 3 then
123
            buff_count <= buff_count + 1;  -- 1 byte added to buffer
124
   else
125
            buff_count <= buff_count;      -- BUffer is full keep the buffered values and the count
126
        end if;
127
end process buffer_counter;
128
 
129
-- Procesed bytes counter
130
processed_counter: process (mode)
131
begin
132
   if (mode = 2 and buff_count = 3) or mode = 4 then
133
           proc_count <= proc_count + 1 ;
134
        elsif mode = 3 then
135
                proc_count <= proc_count;
136
   else
137
           proc_count <= 0;
138
   end if;
139
end process processed_counter;
140
 
141
 
142
-- mealy machine, sends 4 bytes sequentially to the hashing algorithm
143
--      Waits for the buffer to get filled, on the first +ve clock edge afer the start input
144
-- is made 1 it sends the bytes to the DJB algorithm.
145
 
146
mealy_mach: process (Clock, Reset, Start)
147
Begin
148 16 smallcode
 -- +ve clock
149
 if Clock'event and Clock = '1' then
150 15 smallcode
        if Reset = '1' then  -- Reset
151
           mode <= 0;
152 16 smallcode
   --Start either fill the buffer or Process the first byte in buffer
153
        elsif Start = '1' and mode < 2 then
154 15 smallcode
           mode <= 2;
155 16 smallcode
   -- Buffer is still processing first byte
156
        -- wait while algorithm finishes generating hash
157
        elsif (mode = 2 and buff_count = 3) or (mode > 1 and Algo_bsy = '1')  then
158
           mode <= 3;
159
   --  To hash the next 3 bytes
160
        elsif mode = 3 and proc_count < 4 then
161
           mode <= 4;
162
        --  Wait
163 15 smallcode
        else
164 16 smallcode
           mode <= 1;
165 15 smallcode
   end if;
166
 end if;
167
end process mealy_mach;
168
end genhash;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.