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[/] [des/] [trunk/] [bench/] [verilog/] [des3_test_po.v] - Blame information for rev 9

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1 7 rudi
/////////////////////////////////////////////////////////////////////
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////                                                             ////
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////  DES TEST BENCH                                             ////
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////                                                             ////
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////  Author: Rudolf Usselmann                                   ////
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////          rudi@asics.ws                                      ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2001 Rudolf Usselmann                         ////
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////                    rudi@asics.ws                            ////
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////                                                             ////
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//// This source file may be used and distributed without        ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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////                                                             ////
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////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
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//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
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//// POSSIBILITY OF SUCH DAMAGE.                                 ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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module test;
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reg             clk;
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reg     [319:0]  x[512:0];
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reg     [319:0]  tmp;
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reg     [3:0]    cnt;
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integer         select;
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wire    [63:0]   desOut;
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wire    [63:0]   des_in;
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wire    [63:0]   exp_out_d;
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wire    [55:0]   key1;
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wire    [55:0]   key2;
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wire    [55:0]   key3;
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integer         ZZZ;
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reg     [63:0]   des_exp[0:52];
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integer         decrypt;
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integer i;
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always @(posedge clk)
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        des_exp[0] <= #1 exp_out_d;
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always @(posedge clk)
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        for(i=0;i<51;i=i+1)
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                des_exp[i+1] <= #1 des_exp[i];
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initial
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   begin
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        $display("\n\n");
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        $display("*********************************************************");
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        $display("* Performance Optimized DES core simulation started ... *");
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        $display("*********************************************************");
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        $display("\n");
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`ifdef WAVES
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        $shm_open("waves");
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        $shm_probe("AS",test,"AS");
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        $display("INFO: Signal dump enabled ...\n\n");
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`endif
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        clk=0;
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        ZZZ=0;
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        //           key1                key2             key3          Test data        Out data
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        x[0]=320'h0101010101010101_0101010101010101_0101010101010101_95F8A5E5DD31D900_8000000000000000;
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        x[1]=320'h0101010101010101_0101010101010101_0101010101010101_9D64555A9A10B852_0000001000000000;
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        x[2]=320'h3849674C2602319E_3849674C2602319E_3849674C2602319E_51454B582DDF440A_7178876E01F19B2A;
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        x[3]=320'h04B915BA43FEB5B6_04B915BA43FEB5B6_04B915BA43FEB5B6_42FD443059577FA2_AF37FB421F8C4095;
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        x[4]=320'h0123456789ABCDEF_0123456789ABCDEF_0123456789ABCDEF_736F6D6564617461_3D124FE2198BA318;
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        x[5]=320'h0123456789ABCDEF_5555555555555555_0123456789ABCDEF_736F6D6564617461_FBABA1FF9D05E9B1;
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        x[6]=320'h0123456789ABCDEF_5555555555555555_FEDCBA9876543210_736F6D6564617461_18d748e563620572;
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        x[7]=320'h0352020767208217_8602876659082198_64056ABDFEA93457_7371756967676C65_c07d2a0fa566fa30;
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        x[8]=320'h0101010101010101_8001010101010101_0101010101010102_0000000000000000_e6e6dd5b7e722974;
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        x[9]=320'h1046103489988020_9107D01589190101_19079210981A0101_0000000000000000_e1ef62c332fe825b;
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        // Wait for clock edge
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        decrypt = 0;
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        @(posedge clk);
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        $display("");
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        $display("**************************************");
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        $display("* Starting DES Test ...              *");
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        $display("**************************************");
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        $display("");
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        for(decrypt=0;decrypt<2;decrypt=decrypt+1)
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        begin
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        if(decrypt)     $display("Running Encrypt test ...\n");
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        else            $display("Running Decrypt test ...\n");
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        // Begin for loop       
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        for(select=0;select<(9+50);select=select+1)
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           begin
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                tmp=x[select];
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                @(posedge clk);
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                if(select>50)
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                   if((des_exp[50] !== desOut) | (^des_exp[50]===1'bx) | (^desOut===1'bx))
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                        $display("ERROR: (%0d) Expected %x Got %x", select-51, des_exp[50], desOut);
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                   else
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                        $display("PASS : (%0d) Expected %x Got %x", select-51, des_exp[50], desOut);
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                //#2 $display("%h %h %h %h %h", key3, key2, key1, des_in, exp_out_d);
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           end
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        end
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        $display("");
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        $display("**************************************");
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        $display("* DES Test done ...                  *");
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        $display("**************************************");
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        $display("");
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        $finish;
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   end // end of initial
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// DES Clock
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always #50 clk=~clk;
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// Create the key w/o the parity bits
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assign #1 key1 =        {tmp[319:313],tmp[311:305],tmp[303:297],tmp[295:289],
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                        tmp[287:281],tmp[279:273],tmp[271:265],tmp[263:257]};
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assign #1 key2 =        {tmp[255:249],tmp[247:241],tmp[239:233],tmp[231:225],
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                        tmp[223:217],tmp[215:209],tmp[207:201],tmp[199:193]};
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assign #1 key3 =        {tmp[191:185],tmp[183:177],tmp[175:169],tmp[167:161],
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                        tmp[159:153],tmp[151:145],tmp[143:137],tmp[135:129]};
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assign #1 des_in = decrypt[0] ? tmp[63:0]   : tmp[127:64];
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assign exp_out_d = decrypt[0] ? tmp[127:64] : tmp[63:0];
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// The DES instance
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des3 u0(.clk(           clk             ),
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        .desOut(        desOut          ),
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        .desIn(         des_in          ),
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        .key1(          key1            ),
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        .key2(          key2            ),
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        .key3(          key3            ),
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        .decrypt(       decrypt[0]       )
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        );
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endmodule

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