Subversion Repositories des

###############################################################################

#

# Design Specification

#

# Author: Rudolf Usselmann

#         rudi@asics.ws

#

# Revision:

# 5/10/01 RU Initial Sript

#

#

###############################################################################

# ==============================================

# Setup Design Parameters

set design_files {sbox2 sbox4 sbox6 sbox8 sbox1 sbox3 sbox5 sbox7 crp des key_sel des3}

set design_name des3

set active_design des3

# Next Statement defines all clocks and resets in the design

set special_net {clk}

set hdl_src_dir {../../rtl/verilog/common ../../rtl/verilog/perf_opt}