OpenCores
URL https://opencores.org/ocsvn/diogenes/diogenes/trunk

Subversion Repositories diogenes

[/] [diogenes/] [trunk/] [vhdl/] [_xmsgs/] [vhpcomp.xmsgs] - Blame information for rev 114

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 114 fellnhofer
2
7
8
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dist_mem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" first.
9
10
 
11
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dmem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" first.
12
13
 
14
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dist_mem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" first.
15
16
 
17
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dmem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" first.
18
19
 
20
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" which file "/home/andi/xilinx/rs232/cpu/pmem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" first.
21
22
 
23
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dmem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" first.
24
25
 
26
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dist_mem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" first.
27
28
 
29
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dmem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" first.
30
31
 
32
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dist_mem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" first.
33
34
 
35
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dmem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" first.
36
37
 
38
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" which file "/home/andi/xilinx/rs232/cpu/dist_mem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/dist_mem_gen_v3_2.vhd" first.
39
40
 
41
File "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" which file "/home/andi/xilinx/rs232/cpu/pmem.vhd" depends on is modified, but has not been compiled.  You may need to compile "/build/xfndry8/J.36/env/Databases/ip/export/rtf/vhdl/src/XilinxCoreLib/blkmemsp_v6_2.vhd" first.
42
43
 
44
45
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.