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fellnhofer |
//! **************************************************************************
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// Written by: Map J.36 on Mon Jan 28 21:05:20 2008
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//! **************************************************************************
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SCHEMATIC START;
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COMP "strataflash_ce" LOCATE = SITE "D16" LEVEL 1;
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COMP "strataflash_oe" LOCATE = SITE "C18" LEVEL 1;
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COMP "strataflash_we" LOCATE = SITE "D17" LEVEL 1;
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COMP "lcd_e" LOCATE = SITE "M18" LEVEL 1;
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COMP "green" LOCATE = SITE "H15" LEVEL 1;
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COMP "hs" LOCATE = SITE "F15" LEVEL 1;
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COMP "rx" LOCATE = SITE "U8" LEVEL 1;
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COMP "vs" LOCATE = SITE "F14" LEVEL 1;
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COMP "tx" LOCATE = SITE "M13" LEVEL 1;
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COMP "reset" LOCATE = SITE "L13" LEVEL 1;
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COMP "lcd_rs" LOCATE = SITE "L18" LEVEL 1;
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COMP "lcd_rw" LOCATE = SITE "L17" LEVEL 1;
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COMP "gclk" LOCATE = SITE "C9" LEVEL 1;
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COMP "blue" LOCATE = SITE "G15" LEVEL 1;
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COMP "test<0>" LOCATE = SITE "F12" LEVEL 1;
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COMP "test<1>" LOCATE = SITE "E12" LEVEL 1;
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COMP "test<2>" LOCATE = SITE "E11" LEVEL 1;
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COMP "test<3>" LOCATE = SITE "F11" LEVEL 1;
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COMP "test<4>" LOCATE = SITE "C11" LEVEL 1;
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COMP "test<5>" LOCATE = SITE "D11" LEVEL 1;
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COMP "test<6>" LOCATE = SITE "E9" LEVEL 1;
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COMP "test<7>" LOCATE = SITE "F9" LEVEL 1;
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COMP "red" LOCATE = SITE "H14" LEVEL 1;
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COMP "button<0>" LOCATE = SITE "H13" LEVEL 1;
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COMP "button<1>" LOCATE = SITE "D18" LEVEL 1;
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COMP "button<2>" LOCATE = SITE "K17" LEVEL 1;
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COMP "button<3>" LOCATE = SITE "V4" LEVEL 1;
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COMP "button<4>" LOCATE = SITE "K18" LEVEL 1;
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COMP "button<5>" LOCATE = SITE "G18" LEVEL 1;
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COMP "button<6>" LOCATE = SITE "V16" LEVEL 1;
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COMP "button<7>" LOCATE = SITE "N17" LEVEL 1;
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COMP "lcd_d<0>" LOCATE = SITE "R15" LEVEL 1;
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COMP "lcd_d<1>" LOCATE = SITE "R16" LEVEL 1;
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COMP "lcd_d<2>" LOCATE = SITE "P17" LEVEL 1;
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COMP "lcd_d<3>" LOCATE = SITE "M15" LEVEL 1;
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NET "gclk_BUFGP/IBUFG" BEL "gclk_BUFGP/BUFG.GCLKMUX" USELOCALCONNECT;
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PIN pmemc/B6.A_pins<15> = BEL "pmemc/B6.A" PINNAME CLKA;
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PIN pmemc/B6.B_pins<15> = BEL "pmemc/B6.B" PINNAME CLKB;
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PIN vga_c/video_ram_c/B6.A_pins<15> = BEL "vga_c/video_ram_c/B6.A" PINNAME
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CLKA;
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PIN vga_c/video_ram_c/B6.B_pins<15> = BEL "vga_c/video_ram_c/B6.B" PINNAME
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CLKB;
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PIN vga_c/video_ram_c/B10.A_pins<15> = BEL "vga_c/video_ram_c/B10.A" PINNAME
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CLKA;
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PIN vga_c/video_ram_c/B10.B_pins<15> = BEL "vga_c/video_ram_c/B10.B" PINNAME
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CLKB;
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PIN vga_c/video_ram_c/B14.A_pins<15> = BEL "vga_c/video_ram_c/B14.A" PINNAME
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CLKA;
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PIN vga_c/video_ram_c/B14.B_pins<15> = BEL "vga_c/video_ram_c/B14.B" PINNAME
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CLKB;
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PIN vga_c/video_ram_c/B18.A_pins<15> = BEL "vga_c/video_ram_c/B18.A" PINNAME
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CLKA;
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PIN vga_c/video_ram_c/B18.B_pins<15> = BEL "vga_c/video_ram_c/B18.B" PINNAME
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CLKB;
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TIMEGRP gclk = BEL "was_button" BEL "pmem_addr_m_0" BEL "pmem_addr_m_1" BEL
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"pmem_addr_m_2" BEL "pmem_addr_m_3" BEL "pmem_addr_m_4" BEL
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"pmem_addr_m_5" BEL "pmem_addr_m_6" BEL "pmem_addr_m_7" BEL
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"pmem_addr_m_8" BEL "pmem_addr_m_9" BEL "pmem_din_m_0" BEL
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"pmem_din_m_1" BEL "pmem_din_m_2" BEL "pmem_din_m_3" BEL
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"pmem_din_m_4" BEL "pmem_din_m_5" BEL "pmem_din_m_6" BEL
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"pmem_din_m_7" BEL "pmem_din_m_8" BEL "pmem_din_m_9" BEL
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"pmem_din_m_10" BEL "pmem_din_m_11" BEL "pmem_din_m_12" BEL
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"pmem_din_m_13" BEL "pmem_din_m_14" BEL "pmem_din_m_15" BEL
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"vmem_we_m" BEL "pmem_we_m" BEL "was_uart" BEL "vmem_addr_m_0" BEL
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"vmem_addr_m_1" BEL "vmem_addr_m_2" BEL "vmem_addr_m_3" BEL
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"vmem_addr_m_4" BEL "vmem_addr_m_5" BEL "vmem_addr_m_6" BEL
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"vmem_addr_m_7" BEL "vmem_addr_m_8" BEL "vmem_addr_m_9" BEL
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"vmem_addr_m_10" BEL "vmem_addr_m_11" BEL "vmem_addr_m_12" BEL
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"lcd_rs_l" BEL "test_led_0" BEL "test_led_1" BEL "test_led_2" BEL
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"test_led_3" BEL "test_led_4" BEL "test_led_5" BEL "test_led_6" BEL
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"test_led_7" BEL "lcd_rw_l" BEL "vmem_din_m_0" BEL "vmem_din_m_1" BEL
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"vmem_din_m_2" BEL "vmem_din_m_3" BEL "vmem_din_m_4" BEL
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"vmem_din_m_5" BEL "vmem_din_m_6" BEL "vmem_din_m_7" BEL "lcd_d_l_0"
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BEL "lcd_d_l_1" BEL "lcd_d_l_2" BEL "lcd_d_l_3" BEL "lcd_e_l" PIN
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"pmemc/B6.A_pins<15>" PIN "pmemc/B6.B_pins<15>" BEL
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"diogenes_cpu/pipestage1/pc_31" BEL "diogenes_cpu/pipestage1/pc_30"
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BEL "diogenes_cpu/pipestage1/pc_29" BEL
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"diogenes_cpu/pipestage1/pc_28" BEL "diogenes_cpu/pipestage1/pc_27"
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BEL "diogenes_cpu/pipestage1/pc_26" BEL
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"diogenes_cpu/pipestage1/pc_25" BEL "diogenes_cpu/pipestage1/pc_24"
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BEL "diogenes_cpu/pipestage1/pc_23" BEL
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"diogenes_cpu/pipestage1/pc_22" BEL "diogenes_cpu/pipestage1/pc_21"
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| 88 |
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BEL "diogenes_cpu/pipestage1/pc_20" BEL
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"diogenes_cpu/pipestage1/pc_19" BEL "diogenes_cpu/pipestage1/pc_18"
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BEL "diogenes_cpu/pipestage1/pc_17" BEL
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"diogenes_cpu/pipestage1/pc_16" BEL "diogenes_cpu/pipestage1/pc_15"
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BEL "diogenes_cpu/pipestage1/pc_14" BEL
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"diogenes_cpu/pipestage1/pc_13" BEL "diogenes_cpu/pipestage1/pc_12"
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BEL "diogenes_cpu/pipestage1/pc_11" BEL
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"diogenes_cpu/pipestage1/pc_10" BEL "diogenes_cpu/pipestage1/pc_9" BEL
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"diogenes_cpu/pipestage1/pc_8" BEL "diogenes_cpu/pipestage1/pc_7" BEL
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"diogenes_cpu/pipestage1/pc_6" BEL "diogenes_cpu/pipestage1/pc_5" BEL
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"diogenes_cpu/pipestage1/pc_4" BEL "diogenes_cpu/pipestage1/pc_3" BEL
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"diogenes_cpu/pipestage1/pc_2" BEL "diogenes_cpu/pipestage1/pc_1" BEL
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| 100 |
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"diogenes_cpu/pipestage1/pc_0" BEL "diogenes_cpu/pipestage1/curpc_9"
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BEL "diogenes_cpu/pipestage1/curpc_8" BEL
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"diogenes_cpu/pipestage1/curpc_7" BEL
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| 103 |
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"diogenes_cpu/pipestage1/curpc_6" BEL
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"diogenes_cpu/pipestage1/curpc_5" BEL
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| 105 |
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"diogenes_cpu/pipestage1/curpc_3" BEL
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| 106 |
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"diogenes_cpu/pipestage1/curpc_2" BEL
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| 107 |
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"diogenes_cpu/pipestage1/curpc_4" BEL
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| 108 |
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"diogenes_cpu/pipestage1/curpc_1" BEL
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| 109 |
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"diogenes_cpu/pipestage1/curpc_0" BEL "diogenes_cpu/pipestage1/first"
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| 110 |
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BEL "vga_c/vertical_counter_9" BEL "vga_c/vertical_counter_8" BEL
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"vga_c/vertical_counter_7" BEL "vga_c/vertical_counter_6" BEL
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| 112 |
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"vga_c/vertical_counter_5" BEL "vga_c/vertical_counter_4" BEL
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| 113 |
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"vga_c/vertical_counter_3" BEL "vga_c/vertical_counter_2" BEL
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| 114 |
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"vga_c/vertical_counter_1" BEL "vga_c/vertical_counter_0" BEL
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| 115 |
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"vga_c/horizontal_counter_9" BEL "vga_c/horizontal_counter_8" BEL
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| 116 |
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"vga_c/horizontal_counter_7" BEL "vga_c/horizontal_counter_6" BEL
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| 117 |
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"vga_c/horizontal_counter_5" BEL "vga_c/horizontal_counter_4" BEL
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| 118 |
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"vga_c/horizontal_counter_3" BEL "vga_c/horizontal_counter_2" BEL
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| 119 |
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"vga_c/horizontal_counter_1" BEL "vga_c/horizontal_counter_0" BEL
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| 120 |
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"vga_c/hs_out" BEL "vga_c/vs_out" BEL "vga_c/green_out" BEL
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| 121 |
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"vga_c/blue_out" BEL "vga_c/v_addr_12" BEL "vga_c/v_addr_11" BEL
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| 122 |
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"vga_c/v_addr_10" BEL "vga_c/v_addr_9" BEL "vga_c/v_addr_8" BEL
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| 123 |
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"vga_c/v_addr_7" BEL "vga_c/v_addr_6" BEL "vga_c/v_addr_5" BEL
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| 124 |
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"vga_c/v_addr_4" BEL "vga_c/v_addr_3" BEL "vga_c/v_addr_2" BEL
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| 125 |
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"vga_c/v_addr_1" BEL "vga_c/v_addr_0" BEL "vga_c/red_out" BEL
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| 126 |
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"vga_c/clk25" BEL "vga_c/pixel_2" BEL "vga_c/pixel_1" BEL
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| 127 |
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"vga_c/pixel_0" BEL "vga_c/pixel_buf_2" BEL "vga_c/pixel_buf_1" BEL
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| 128 |
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"vga_c/pixel_buf_0" BEL
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| 129 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem63.SLICEM_F"
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| 130 |
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BEL
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| 131 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem63.SLICEM_G"
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| 132 |
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BEL
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| 133 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem61.SLICEM_F"
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| 134 |
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BEL
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| 135 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem61.SLICEM_G"
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| 136 |
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BEL
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| 137 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem59.SLICEM_F"
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| 138 |
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BEL
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| 139 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem59.SLICEM_G"
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| 140 |
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BEL
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| 141 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem57.SLICEM_F"
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| 142 |
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BEL
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| 143 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem57.SLICEM_G"
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| 144 |
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BEL
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| 145 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem55.SLICEM_F"
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| 146 |
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BEL
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| 147 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem55.SLICEM_G"
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| 148 |
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BEL
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| 149 |
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"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem53.SLICEM_F"
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| 150 |
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BEL
|
| 151 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem53.SLICEM_G"
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| 152 |
|
|
BEL
|
| 153 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem51.SLICEM_F"
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| 154 |
|
|
BEL
|
| 155 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem51.SLICEM_G"
|
| 156 |
|
|
BEL
|
| 157 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem49.SLICEM_F"
|
| 158 |
|
|
BEL
|
| 159 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem49.SLICEM_G"
|
| 160 |
|
|
BEL
|
| 161 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem47.SLICEM_F"
|
| 162 |
|
|
BEL
|
| 163 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem47.SLICEM_G"
|
| 164 |
|
|
BEL
|
| 165 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem45.SLICEM_F"
|
| 166 |
|
|
BEL
|
| 167 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem45.SLICEM_G"
|
| 168 |
|
|
BEL
|
| 169 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem43.SLICEM_F"
|
| 170 |
|
|
BEL
|
| 171 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem43.SLICEM_G"
|
| 172 |
|
|
BEL
|
| 173 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem41.SLICEM_F"
|
| 174 |
|
|
BEL
|
| 175 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem41.SLICEM_G"
|
| 176 |
|
|
BEL
|
| 177 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem39.SLICEM_F"
|
| 178 |
|
|
BEL
|
| 179 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem39.SLICEM_G"
|
| 180 |
|
|
BEL
|
| 181 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem37.SLICEM_F"
|
| 182 |
|
|
BEL
|
| 183 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem37.SLICEM_G"
|
| 184 |
|
|
BEL
|
| 185 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem35.SLICEM_F"
|
| 186 |
|
|
BEL
|
| 187 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem35.SLICEM_G"
|
| 188 |
|
|
BEL
|
| 189 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem33.SLICEM_F"
|
| 190 |
|
|
BEL
|
| 191 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem33.SLICEM_G"
|
| 192 |
|
|
BEL
|
| 193 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem31.SLICEM_F"
|
| 194 |
|
|
BEL
|
| 195 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem31.SLICEM_G"
|
| 196 |
|
|
BEL
|
| 197 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem29.SLICEM_F"
|
| 198 |
|
|
BEL
|
| 199 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem29.SLICEM_G"
|
| 200 |
|
|
BEL
|
| 201 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem27.SLICEM_F"
|
| 202 |
|
|
BEL
|
| 203 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem27.SLICEM_G"
|
| 204 |
|
|
BEL
|
| 205 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem25.SLICEM_F"
|
| 206 |
|
|
BEL
|
| 207 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem25.SLICEM_G"
|
| 208 |
|
|
BEL
|
| 209 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem23.SLICEM_F"
|
| 210 |
|
|
BEL
|
| 211 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem23.SLICEM_G"
|
| 212 |
|
|
BEL
|
| 213 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem21.SLICEM_F"
|
| 214 |
|
|
BEL
|
| 215 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem21.SLICEM_G"
|
| 216 |
|
|
BEL
|
| 217 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem19.SLICEM_F"
|
| 218 |
|
|
BEL
|
| 219 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem19.SLICEM_G"
|
| 220 |
|
|
BEL
|
| 221 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem17.SLICEM_F"
|
| 222 |
|
|
BEL
|
| 223 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem17.SLICEM_G"
|
| 224 |
|
|
BEL
|
| 225 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem15.SLICEM_F"
|
| 226 |
|
|
BEL
|
| 227 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem15.SLICEM_G"
|
| 228 |
|
|
BEL
|
| 229 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem13.SLICEM_F"
|
| 230 |
|
|
BEL
|
| 231 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem13.SLICEM_G"
|
| 232 |
|
|
BEL
|
| 233 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem11.SLICEM_F"
|
| 234 |
|
|
BEL
|
| 235 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem11.SLICEM_G"
|
| 236 |
|
|
BEL
|
| 237 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem9.SLICEM_F"
|
| 238 |
|
|
BEL
|
| 239 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem9.SLICEM_G"
|
| 240 |
|
|
BEL
|
| 241 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem7.SLICEM_F"
|
| 242 |
|
|
BEL
|
| 243 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem7.SLICEM_G"
|
| 244 |
|
|
BEL
|
| 245 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem5.SLICEM_F"
|
| 246 |
|
|
BEL
|
| 247 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem5.SLICEM_G"
|
| 248 |
|
|
BEL
|
| 249 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem3.SLICEM_F"
|
| 250 |
|
|
BEL
|
| 251 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem3.SLICEM_G"
|
| 252 |
|
|
BEL
|
| 253 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem1.SLICEM_F"
|
| 254 |
|
|
BEL
|
| 255 |
|
|
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem1.SLICEM_G"
|
| 256 |
|
|
BEL
|
| 257 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem63.SLICEM_F"
|
| 258 |
|
|
BEL
|
| 259 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem63.SLICEM_G"
|
| 260 |
|
|
BEL
|
| 261 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem61.SLICEM_F"
|
| 262 |
|
|
BEL
|
| 263 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem61.SLICEM_G"
|
| 264 |
|
|
BEL
|
| 265 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem59.SLICEM_F"
|
| 266 |
|
|
BEL
|
| 267 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem59.SLICEM_G"
|
| 268 |
|
|
BEL
|
| 269 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem57.SLICEM_F"
|
| 270 |
|
|
BEL
|
| 271 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem57.SLICEM_G"
|
| 272 |
|
|
BEL
|
| 273 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem55.SLICEM_F"
|
| 274 |
|
|
BEL
|
| 275 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem55.SLICEM_G"
|
| 276 |
|
|
BEL
|
| 277 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem53.SLICEM_F"
|
| 278 |
|
|
BEL
|
| 279 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem53.SLICEM_G"
|
| 280 |
|
|
BEL
|
| 281 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem51.SLICEM_F"
|
| 282 |
|
|
BEL
|
| 283 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem51.SLICEM_G"
|
| 284 |
|
|
BEL
|
| 285 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem49.SLICEM_F"
|
| 286 |
|
|
BEL
|
| 287 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem49.SLICEM_G"
|
| 288 |
|
|
BEL
|
| 289 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem47.SLICEM_F"
|
| 290 |
|
|
BEL
|
| 291 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem47.SLICEM_G"
|
| 292 |
|
|
BEL
|
| 293 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem45.SLICEM_F"
|
| 294 |
|
|
BEL
|
| 295 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem45.SLICEM_G"
|
| 296 |
|
|
BEL
|
| 297 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem43.SLICEM_F"
|
| 298 |
|
|
BEL
|
| 299 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem43.SLICEM_G"
|
| 300 |
|
|
BEL
|
| 301 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem41.SLICEM_F"
|
| 302 |
|
|
BEL
|
| 303 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem41.SLICEM_G"
|
| 304 |
|
|
BEL
|
| 305 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem39.SLICEM_F"
|
| 306 |
|
|
BEL
|
| 307 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem39.SLICEM_G"
|
| 308 |
|
|
BEL
|
| 309 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem37.SLICEM_F"
|
| 310 |
|
|
BEL
|
| 311 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem37.SLICEM_G"
|
| 312 |
|
|
BEL
|
| 313 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem35.SLICEM_F"
|
| 314 |
|
|
BEL
|
| 315 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem35.SLICEM_G"
|
| 316 |
|
|
BEL
|
| 317 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem33.SLICEM_F"
|
| 318 |
|
|
BEL
|
| 319 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem33.SLICEM_G"
|
| 320 |
|
|
BEL
|
| 321 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem31.SLICEM_F"
|
| 322 |
|
|
BEL
|
| 323 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem31.SLICEM_G"
|
| 324 |
|
|
BEL
|
| 325 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem29.SLICEM_F"
|
| 326 |
|
|
BEL
|
| 327 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem29.SLICEM_G"
|
| 328 |
|
|
BEL
|
| 329 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem27.SLICEM_F"
|
| 330 |
|
|
BEL
|
| 331 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem27.SLICEM_G"
|
| 332 |
|
|
BEL
|
| 333 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem25.SLICEM_F"
|
| 334 |
|
|
BEL
|
| 335 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem25.SLICEM_G"
|
| 336 |
|
|
BEL
|
| 337 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem23.SLICEM_F"
|
| 338 |
|
|
BEL
|
| 339 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem23.SLICEM_G"
|
| 340 |
|
|
BEL
|
| 341 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem21.SLICEM_F"
|
| 342 |
|
|
BEL
|
| 343 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem21.SLICEM_G"
|
| 344 |
|
|
BEL
|
| 345 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem19.SLICEM_F"
|
| 346 |
|
|
BEL
|
| 347 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem19.SLICEM_G"
|
| 348 |
|
|
BEL
|
| 349 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem17.SLICEM_F"
|
| 350 |
|
|
BEL
|
| 351 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem17.SLICEM_G"
|
| 352 |
|
|
BEL
|
| 353 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem15.SLICEM_F"
|
| 354 |
|
|
BEL
|
| 355 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem15.SLICEM_G"
|
| 356 |
|
|
BEL
|
| 357 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem13.SLICEM_F"
|
| 358 |
|
|
BEL
|
| 359 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem13.SLICEM_G"
|
| 360 |
|
|
BEL
|
| 361 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem11.SLICEM_F"
|
| 362 |
|
|
BEL
|
| 363 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem11.SLICEM_G"
|
| 364 |
|
|
BEL
|
| 365 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem9.SLICEM_F"
|
| 366 |
|
|
BEL
|
| 367 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem9.SLICEM_G"
|
| 368 |
|
|
BEL
|
| 369 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem7.SLICEM_F"
|
| 370 |
|
|
BEL
|
| 371 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem7.SLICEM_G"
|
| 372 |
|
|
BEL
|
| 373 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem5.SLICEM_F"
|
| 374 |
|
|
BEL
|
| 375 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem5.SLICEM_G"
|
| 376 |
|
|
BEL
|
| 377 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem3.SLICEM_F"
|
| 378 |
|
|
BEL
|
| 379 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem3.SLICEM_G"
|
| 380 |
|
|
BEL
|
| 381 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem1.SLICEM_F"
|
| 382 |
|
|
BEL
|
| 383 |
|
|
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem1.SLICEM_G"
|
| 384 |
|
|
BEL "diogenes_cpu/pipestage2/brzero_1" BEL
|
| 385 |
|
|
"diogenes_cpu/pipestage2/brzero_0" BEL
|
| 386 |
|
|
"diogenes_cpu/pipestage2/big_op_14" BEL
|
| 387 |
|
|
"diogenes_cpu/pipestage2/big_op_13" BEL
|
| 388 |
|
|
"diogenes_cpu/pipestage2/big_op_12" BEL
|
| 389 |
|
|
"diogenes_cpu/pipestage2/big_op_11" BEL
|
| 390 |
|
|
"diogenes_cpu/pipestage2/big_op_8" BEL
|
| 391 |
|
|
"diogenes_cpu/pipestage2/big_op_7" BEL
|
| 392 |
|
|
"diogenes_cpu/pipestage2/big_op_6" BEL
|
| 393 |
|
|
"diogenes_cpu/pipestage2/big_op_5" BEL
|
| 394 |
|
|
"diogenes_cpu/pipestage2/big_op_4" BEL
|
| 395 |
|
|
"diogenes_cpu/pipestage2/big_op_3" BEL
|
| 396 |
|
|
"diogenes_cpu/pipestage2/big_op_2" BEL
|
| 397 |
|
|
"diogenes_cpu/pipestage2/big_op_1" BEL
|
| 398 |
|
|
"diogenes_cpu/pipestage2/big_op_0" BEL
|
| 399 |
|
|
"diogenes_cpu/pipestage2/sop2_30" BEL
|
| 400 |
|
|
"diogenes_cpu/pipestage2/sop2_25" BEL "diogenes_cpu/pipestage2/sop2_2"
|
| 401 |
|
|
BEL "diogenes_cpu/pipestage2/sop2_19" BEL
|
| 402 |
|
|
"diogenes_cpu/pipestage2/sop2_1" BEL "diogenes_cpu/pipestage2/sop2_24"
|
| 403 |
|
|
BEL "diogenes_cpu/pipestage2/sop2_23" BEL
|
| 404 |
|
|
"diogenes_cpu/pipestage2/sop2_18" BEL "diogenes_cpu/pipestage2/fwop2"
|
| 405 |
|
|
BEL "diogenes_cpu/pipestage2/fwop1" BEL
|
| 406 |
|
|
"diogenes_cpu/pipestage2/sop2_0" BEL "diogenes_cpu/pipestage2/sop2_22"
|
| 407 |
|
|
BEL "diogenes_cpu/pipestage2/sop2_17" BEL
|
| 408 |
|
|
"diogenes_cpu/pipestage2/sop2_16" BEL
|
| 409 |
|
|
"diogenes_cpu/pipestage2/sop2_20" BEL
|
| 410 |
|
|
"diogenes_cpu/pipestage2/sop2_21" BEL
|
| 411 |
|
|
"diogenes_cpu/pipestage2/sop2_15" BEL
|
| 412 |
|
|
"diogenes_cpu/pipestage2/sop1_29" BEL
|
| 413 |
|
|
"diogenes_cpu/pipestage2/sop1_28" BEL
|
| 414 |
|
|
"diogenes_cpu/pipestage2/sop2_13" BEL
|
| 415 |
|
|
"diogenes_cpu/pipestage2/sop2_14" BEL
|
| 416 |
|
|
"diogenes_cpu/pipestage2/sop1_27" BEL
|
| 417 |
|
|
"diogenes_cpu/pipestage2/sop2_12" BEL
|
| 418 |
|
|
"diogenes_cpu/pipestage2/sop1_26" BEL
|
| 419 |
|
|
"diogenes_cpu/pipestage2/sop2_11" BEL
|
| 420 |
|
|
"diogenes_cpu/pipestage2/sop1_31" BEL
|
| 421 |
|
|
"diogenes_cpu/pipestage2/sop1_30" BEL
|
| 422 |
|
|
"diogenes_cpu/pipestage2/sop1_25" BEL
|
| 423 |
|
|
"diogenes_cpu/pipestage2/lastdest_3" BEL
|
| 424 |
|
|
"diogenes_cpu/pipestage2/lastdest_2" BEL
|
| 425 |
|
|
"diogenes_cpu/pipestage2/lastdest_1" BEL
|
| 426 |
|
|
"diogenes_cpu/pipestage2/lastdest_0" BEL
|
| 427 |
|
|
"diogenes_cpu/pipestage2/sop1_24" BEL
|
| 428 |
|
|
"diogenes_cpu/pipestage2/sop2_10" BEL
|
| 429 |
|
|
"diogenes_cpu/pipestage2/sop1_19" BEL
|
| 430 |
|
|
"diogenes_cpu/pipestage2/sop1_23" BEL
|
| 431 |
|
|
"diogenes_cpu/pipestage2/sop1_22" BEL
|
| 432 |
|
|
"diogenes_cpu/pipestage2/sop1_17" BEL
|
| 433 |
|
|
"diogenes_cpu/pipestage2/sop1_18" BEL
|
| 434 |
|
|
"diogenes_cpu/pipestage2/sop1_21" BEL
|
| 435 |
|
|
"diogenes_cpu/pipestage2/sop1_16" BEL
|
| 436 |
|
|
"diogenes_cpu/pipestage2/sop1_15" BEL
|
| 437 |
|
|
"diogenes_cpu/pipestage2/sop1_14" BEL
|
| 438 |
|
|
"diogenes_cpu/pipestage2/sop1_20" BEL
|
| 439 |
|
|
"diogenes_cpu/pipestage2/sop1_13" BEL
|
| 440 |
|
|
"diogenes_cpu/pipestage2/sop1_12" BEL "diogenes_cpu/pipestage2/sop1_9"
|
| 441 |
|
|
BEL "diogenes_cpu/pipestage2/sop1_10" BEL
|
| 442 |
|
|
"diogenes_cpu/pipestage2/sop1_11" BEL "diogenes_cpu/pipestage2/sop1_8"
|
| 443 |
|
|
BEL "diogenes_cpu/pipestage2/newpc_31" BEL
|
| 444 |
|
|
"diogenes_cpu/pipestage2/newpc_30" BEL
|
| 445 |
|
|
"diogenes_cpu/pipestage2/newpc_29" BEL
|
| 446 |
|
|
"diogenes_cpu/pipestage2/newpc_28" BEL
|
| 447 |
|
|
"diogenes_cpu/pipestage2/newpc_27" BEL
|
| 448 |
|
|
"diogenes_cpu/pipestage2/newpc_26" BEL
|
| 449 |
|
|
"diogenes_cpu/pipestage2/newpc_25" BEL
|
| 450 |
|
|
"diogenes_cpu/pipestage2/newpc_24" BEL
|
| 451 |
|
|
"diogenes_cpu/pipestage2/newpc_23" BEL
|
| 452 |
|
|
"diogenes_cpu/pipestage2/newpc_22" BEL
|
| 453 |
|
|
"diogenes_cpu/pipestage2/newpc_21" BEL
|
| 454 |
|
|
"diogenes_cpu/pipestage2/newpc_20" BEL
|
| 455 |
|
|
"diogenes_cpu/pipestage2/newpc_19" BEL
|
| 456 |
|
|
"diogenes_cpu/pipestage2/newpc_18" BEL
|
| 457 |
|
|
"diogenes_cpu/pipestage2/newpc_17" BEL
|
| 458 |
|
|
"diogenes_cpu/pipestage2/newpc_16" BEL
|
| 459 |
|
|
"diogenes_cpu/pipestage2/newpc_15" BEL
|
| 460 |
|
|
"diogenes_cpu/pipestage2/newpc_14" BEL
|
| 461 |
|
|
"diogenes_cpu/pipestage2/newpc_13" BEL
|
| 462 |
|
|
"diogenes_cpu/pipestage2/newpc_12" BEL
|
| 463 |
|
|
"diogenes_cpu/pipestage2/newpc_11" BEL
|
| 464 |
|
|
"diogenes_cpu/pipestage2/newpc_10" BEL
|
| 465 |
|
|
"diogenes_cpu/pipestage2/newpc_9" BEL
|
| 466 |
|
|
"diogenes_cpu/pipestage2/newpc_8" BEL
|
| 467 |
|
|
"diogenes_cpu/pipestage2/newpc_7" BEL
|
| 468 |
|
|
"diogenes_cpu/pipestage2/newpc_6" BEL
|
| 469 |
|
|
"diogenes_cpu/pipestage2/newpc_5" BEL
|
| 470 |
|
|
"diogenes_cpu/pipestage2/newpc_4" BEL
|
| 471 |
|
|
"diogenes_cpu/pipestage2/newpc_3" BEL
|
| 472 |
|
|
"diogenes_cpu/pipestage2/newpc_2" BEL
|
| 473 |
|
|
"diogenes_cpu/pipestage2/newpc_1" BEL
|
| 474 |
|
|
"diogenes_cpu/pipestage2/newpc_0" BEL "diogenes_cpu/pipestage2/sop1_6"
|
| 475 |
|
|
BEL "diogenes_cpu/pipestage2/sop1_5" BEL
|
| 476 |
|
|
"diogenes_cpu/pipestage2/sop1_7" BEL "diogenes_cpu/pipestage2/sop1_4"
|
| 477 |
|
|
BEL "diogenes_cpu/pipestage2/fwshiftop" BEL
|
| 478 |
|
|
"diogenes_cpu/pipestage2/sop1_2" BEL "diogenes_cpu/pipestage2/sop1_1"
|
| 479 |
|
|
BEL "diogenes_cpu/pipestage2/sop1_3" BEL
|
| 480 |
|
|
"diogenes_cpu/pipestage2/sop1_0" BEL "diogenes_cpu/pipestage2/sop2_9"
|
| 481 |
|
|
BEL "diogenes_cpu/pipestage2/sop2_7" BEL
|
| 482 |
|
|
"diogenes_cpu/pipestage2/fw_pc" BEL "diogenes_cpu/pipestage2/sop2_8"
|
| 483 |
|
|
BEL "diogenes_cpu/pipestage2/sop2_29" BEL
|
| 484 |
|
|
"diogenes_cpu/pipestage2/sop2_6" BEL "diogenes_cpu/pipestage2/sop2_5"
|
| 485 |
|
|
BEL "diogenes_cpu/pipestage2/sop2_27" BEL
|
| 486 |
|
|
"diogenes_cpu/pipestage2/sop2_28" BEL "diogenes_cpu/pipestage2/sop2_4"
|
| 487 |
|
|
BEL "diogenes_cpu/pipestage2/sop2_31" BEL
|
| 488 |
|
|
"diogenes_cpu/pipestage2/sop2_3" BEL "diogenes_cpu/pipestage2/sop2_26"
|
| 489 |
|
|
BEL "sc_uartc/clktx_3" BEL "sc_uartc/clktx_2" BEL "sc_uartc/clktx_1"
|
| 490 |
|
|
BEL "sc_uartc/clktx_0" BEL "sc_uartc/clkrx_3" BEL "sc_uartc/clkrx_2"
|
| 491 |
|
|
BEL "sc_uartc/clkrx_1" BEL "sc_uartc/clkrx_0" BEL "sc_uartc/i_3" BEL
|
| 492 |
|
|
"sc_uartc/i_2" BEL "sc_uartc/i_1" BEL "sc_uartc/i_0" BEL
|
| 493 |
|
|
"sc_uartc/clk16_31" BEL "sc_uartc/clk16_30" BEL "sc_uartc/clk16_29"
|
| 494 |
|
|
BEL "sc_uartc/clk16_28" BEL "sc_uartc/clk16_27" BEL
|
| 495 |
|
|
"sc_uartc/clk16_26" BEL "sc_uartc/clk16_25" BEL "sc_uartc/clk16_24"
|
| 496 |
|
|
BEL "sc_uartc/clk16_23" BEL "sc_uartc/clk16_22" BEL
|
| 497 |
|
|
"sc_uartc/clk16_21" BEL "sc_uartc/clk16_20" BEL "sc_uartc/clk16_19"
|
| 498 |
|
|
BEL "sc_uartc/clk16_18" BEL "sc_uartc/clk16_17" BEL
|
| 499 |
|
|
"sc_uartc/clk16_16" BEL "sc_uartc/clk16_15" BEL "sc_uartc/clk16_14"
|
| 500 |
|
|
BEL "sc_uartc/clk16_13" BEL "sc_uartc/clk16_12" BEL
|
| 501 |
|
|
"sc_uartc/clk16_11" BEL "sc_uartc/clk16_10" BEL "sc_uartc/clk16_9" BEL
|
| 502 |
|
|
"sc_uartc/clk16_8" BEL "sc_uartc/clk16_7" BEL "sc_uartc/clk16_6" BEL
|
| 503 |
|
|
"sc_uartc/clk16_5" BEL "sc_uartc/clk16_4" BEL "sc_uartc/clk16_3" BEL
|
| 504 |
|
|
"sc_uartc/clk16_2" BEL "sc_uartc/clk16_1" BEL "sc_uartc/clk16_0" BEL
|
| 505 |
|
|
"sc_uartc/uart_rx_state_FFd1" BEL "sc_uartc/uart_rx_state_FFd2" BEL
|
| 506 |
|
|
"sc_uartc/cmp_tf/g1[0].f1/f" BEL "sc_uartc/cmp_tf/g1[0].f1/buf_7" BEL
|
| 507 |
|
|
"sc_uartc/cmp_tf/g1[0].f1/buf_6" BEL "sc_uartc/cmp_tf/g1[0].f1/buf_5"
|
| 508 |
|
|
BEL "sc_uartc/cmp_tf/g1[0].f1/buf_4" BEL
|
| 509 |
|
|
"sc_uartc/cmp_tf/g1[0].f1/buf_3" BEL "sc_uartc/cmp_tf/g1[0].f1/buf_2"
|
| 510 |
|
|
BEL "sc_uartc/cmp_tf/g1[0].f1/buf_1" BEL
|
| 511 |
|
|
"sc_uartc/cmp_tf/g1[0].f1/buf_0" BEL "sc_uartc/cmp_rf/g1[0].f1/f" BEL
|
| 512 |
|
|
"sc_uartc/cmp_rf/g1[0].f1/buf_7" BEL "sc_uartc/cmp_rf/g1[0].f1/buf_6"
|
| 513 |
|
|
BEL "sc_uartc/cmp_rf/g1[0].f1/buf_5" BEL
|
| 514 |
|
|
"sc_uartc/cmp_rf/g1[0].f1/buf_4" BEL "sc_uartc/cmp_rf/g1[0].f1/buf_3"
|
| 515 |
|
|
BEL "sc_uartc/cmp_rf/g1[0].f1/buf_2" BEL
|
| 516 |
|
|
"sc_uartc/cmp_rf/g1[0].f1/buf_1" BEL "sc_uartc/cmp_rf/g1[0].f1/buf_0"
|
| 517 |
|
|
BEL "sc_uartc/rsr_0" BEL "sc_uartc/rsr_1" BEL "sc_uartc/rsr_2" BEL
|
| 518 |
|
|
"sc_uartc/rsr_3" BEL "sc_uartc/rsr_4" BEL "sc_uartc/rsr_5" BEL
|
| 519 |
|
|
"sc_uartc/rsr_6" BEL "sc_uartc/rsr_7" BEL "sc_uartc/rsr_8" BEL
|
| 520 |
|
|
"sc_uartc/rsr_9" BEL "sc_uartc/rx_buf_2" BEL "sc_uartc/rx_buf_1" BEL
|
| 521 |
|
|
"sc_uartc/rx_buf_0" BEL "sc_uartc/ncts_buf_2" BEL
|
| 522 |
|
|
"sc_uartc/ncts_buf_1" BEL "sc_uartc/tsr_6" BEL "sc_uartc/tsr_5" BEL
|
| 523 |
|
|
"sc_uartc/i0_3" BEL "sc_uartc/i0_2" BEL "sc_uartc/i0_1" BEL
|
| 524 |
|
|
"sc_uartc/i0_0" BEL "sc_uartc/tsr_4" BEL "sc_uartc/tsr_3" BEL
|
| 525 |
|
|
"sc_uartc/tsr_2" BEL "sc_uartc/tsr_1" BEL "sc_uartc/tsr_0" BEL
|
| 526 |
|
|
"sc_uartc/tx_clk" BEL "sc_uartc/uart_tx_state_0" BEL "sc_uartc/tf_rd"
|
| 527 |
|
|
BEL "sc_uartc/ncts_buf_0" BEL "sc_uartc/rx_clk_ena" BEL
|
| 528 |
|
|
"sc_uartc/rf_wr" BEL "sc_uartc/rx_clk" BEL "sc_uartc/tsr_8" BEL
|
| 529 |
|
|
"sc_uartc/tsr_9" BEL "sc_uartc/tsr_7" BEL
|
| 530 |
|
|
"diogenes_cpu/pipestage3/calu/s_0" BEL
|
| 531 |
|
|
"diogenes_cpu/pipestage3/calu/s_1" BEL
|
| 532 |
|
|
"diogenes_cpu/pipestage3/calu/s_2" BEL
|
| 533 |
|
|
"diogenes_cpu/pipestage3/calu/s_3" BEL
|
| 534 |
|
|
"diogenes_cpu/pipestage3/calu/s_4" BEL
|
| 535 |
|
|
"diogenes_cpu/pipestage3/calu/s_5" BEL
|
| 536 |
|
|
"diogenes_cpu/pipestage3/calu/s_6" BEL
|
| 537 |
|
|
"diogenes_cpu/pipestage3/calu/s_7" BEL
|
| 538 |
|
|
"diogenes_cpu/pipestage3/calu/s_8" BEL
|
| 539 |
|
|
"diogenes_cpu/pipestage3/calu/s_9" BEL
|
| 540 |
|
|
"diogenes_cpu/pipestage3/calu/s_10" BEL
|
| 541 |
|
|
"diogenes_cpu/pipestage3/calu/s_11" BEL
|
| 542 |
|
|
"diogenes_cpu/pipestage3/calu/s_12" BEL
|
| 543 |
|
|
"diogenes_cpu/pipestage3/calu/s_13" BEL
|
| 544 |
|
|
"diogenes_cpu/pipestage3/calu/s_14" BEL
|
| 545 |
|
|
"diogenes_cpu/pipestage3/calu/s_15" BEL
|
| 546 |
|
|
"diogenes_cpu/pipestage3/calu/s_16" BEL
|
| 547 |
|
|
"diogenes_cpu/pipestage3/calu/s_17" BEL
|
| 548 |
|
|
"diogenes_cpu/pipestage3/calu/s_18" BEL
|
| 549 |
|
|
"diogenes_cpu/pipestage3/calu/s_19" BEL
|
| 550 |
|
|
"diogenes_cpu/pipestage3/calu/s_20" BEL
|
| 551 |
|
|
"diogenes_cpu/pipestage3/calu/s_21" BEL
|
| 552 |
|
|
"diogenes_cpu/pipestage3/calu/s_22" BEL
|
| 553 |
|
|
"diogenes_cpu/pipestage3/calu/s_23" BEL
|
| 554 |
|
|
"diogenes_cpu/pipestage3/calu/s_24" BEL
|
| 555 |
|
|
"diogenes_cpu/pipestage3/calu/s_25" BEL
|
| 556 |
|
|
"diogenes_cpu/pipestage3/calu/s_26" BEL
|
| 557 |
|
|
"diogenes_cpu/pipestage3/calu/s_27" BEL
|
| 558 |
|
|
"diogenes_cpu/pipestage3/calu/s_28" BEL
|
| 559 |
|
|
"diogenes_cpu/pipestage3/calu/s_29" BEL
|
| 560 |
|
|
"diogenes_cpu/pipestage3/calu/s_30" BEL
|
| 561 |
|
|
"diogenes_cpu/pipestage3/calu/s_31" BEL
|
| 562 |
|
|
"diogenes_cpu/pipestage3/cdmem/B6.A" BEL
|
| 563 |
|
|
"diogenes_cpu/pipestage3/cdmem/B10.A" BEL
|
| 564 |
|
|
"diogenes_cpu/pipestage3/wasmem" BEL "diogenes_cpu/pipestage3/wasext"
|
| 565 |
|
|
BEL "diogenes_cpu/pipestage3/regaddr_3" BEL
|
| 566 |
|
|
"diogenes_cpu/pipestage3/regaddr_2" BEL
|
| 567 |
|
|
"diogenes_cpu/pipestage3/regaddr_1" BEL
|
| 568 |
|
|
"diogenes_cpu/pipestage3/regaddr_0" BEL
|
| 569 |
|
|
"diogenes_cpu/pipestage1/first_1" BEL
|
| 570 |
|
|
"diogenes_cpu/pipestage2/fwop2_1" BEL
|
| 571 |
|
|
"diogenes_cpu/pipestage2/fwshiftop_1" BEL
|
| 572 |
|
|
"diogenes_cpu/pipestage2/fwshiftop_2" BEL
|
| 573 |
|
|
"diogenes_cpu/pipestage2/fwshiftop_3" BEL
|
| 574 |
|
|
"diogenes_cpu/pipestage2/fwop1_1" BEL "sc_uartc/Mshreg_rxd_reg_2" BEL
|
| 575 |
|
|
"sc_uartc/rxd_reg_2" PIN "vga_c/video_ram_c/B6.A_pins<15>" PIN
|
| 576 |
|
|
"vga_c/video_ram_c/B6.B_pins<15>" PIN
|
| 577 |
|
|
"vga_c/video_ram_c/B10.A_pins<15>" PIN
|
| 578 |
|
|
"vga_c/video_ram_c/B10.B_pins<15>" PIN
|
| 579 |
|
|
"vga_c/video_ram_c/B14.A_pins<15>" PIN
|
| 580 |
|
|
"vga_c/video_ram_c/B14.B_pins<15>" PIN
|
| 581 |
|
|
"vga_c/video_ram_c/B18.A_pins<15>" PIN
|
| 582 |
|
|
"vga_c/video_ram_c/B18.B_pins<15>";
|
| 583 |
|
|
NET "gclk_BUFGP/IBUFG" PERIOD = 12 ns HIGH 50%;
|
| 584 |
|
|
SCHEMATIC END;
|
