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[/] [diogenes/] [trunk/] [vhdl/] [sio.ucf] - Blame information for rev 236

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Line No. Rev Author Line
1 188 fellnhofer
NET "gclk" TNM_NET = "gclk";
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#TIMESPEC "TS_clk_in" = PERIOD "clk" 10 ns HIGH 50 %;
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#INST "clk_in_BUFGP" LOC = "BUFGMUX4"
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#PACE: Start of Constraints generated by PACE
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#PACE: Start of PACE I/O Pin Assignments
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NET "gclk" PERIOD = 12 ns HIGH 50 %;
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#
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# soldered 50MHz Clock.
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#
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NET "gclk" LOC = "C9" | IOSTANDARD = LVTTL;
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#
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#
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# Simple LEDs
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# Require only 3.5mA.
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#
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NET "test<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led0
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NET "test<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led1
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NET "test<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led2
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NET "test<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led3
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NET "test<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led4
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NET "test<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led5
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NET "test<6>" LOC = "E9"  | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led6
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NET "test<7>" LOC = "F9"  | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 4;  #led7
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NET "button<0>" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN;
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NET "button<1>" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN;
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NET "button<2>" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN;
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NET "button<3>" LOC = "V4"  | IOSTANDARD = LVTTL | PULLDOWN;
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NET "button<4>" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP;
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NET "button<5>" LOC = "G18" | IOSTANDARD = LVTTL | PULLUP;
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NET "button<6>" LOC = "V16" | IOSTANDARD = LVTTL | PULLDOWN;
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NET "button<7>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP;
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NET "lcd_rs"   LOC = "L18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "lcd_rw"   LOC = "L17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "lcd_e"    LOC = "M18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "lcd_d<0>" LOC = "R15" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "lcd_d<1>" LOC = "R16" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "lcd_d<2>" LOC = "P17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "lcd_d<3>" LOC = "M15" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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#
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# Strata Flash (need to disable to use LCD display)
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#
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NET "strataflash_oe" LOC = "C18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "strataflash_ce" LOC = "D16" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "strataflash_we" LOC = "D17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
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NET "red"   LOC = "H14" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 2;
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NET "green" LOC = "H15" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 2;
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NET "blue"  LOC = "G15" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 2;
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NET "vs"    LOC = "F14" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 2;
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NET "hs"    LOC = "F15" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 2;
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#
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# Simple switches
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#   Pull UP resistors used to stop floating condition during switching.
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#
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NET "reset" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP;   # switch0
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#NET "simulation" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP;   # switch1
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NET "tx" LOC = "M13" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;   # uart txd
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NET "rx" LOC = "U8" | IOSTANDARD = LVTTL;   # uart rxd
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#NET "clk_in" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP;
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#NET "switch<2>" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP;
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#NET "switch<3>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP;
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#NET "rotary_a"     LOC = "K18" | IOSTANDARD = LVTTL | PULLUP
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#PACE: Start of PACE Area Constraints
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#PACE: Start of PACE Prohibit Constraints
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#PACE: End of Constraints generated by PACE
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#NET "clk" TNM_NET = "clk";

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