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[/] [diogenes/] [trunk/] [vhdl/] [sio.unroutes] - Blame information for rev 236

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Line No. Rev Author Line
1 154 fellnhofer
Release 9.2i - par J.36
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Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.
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Tue Nov 13 12:06:01 2007
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All signals are completely routed.
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