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fellnhofer |
-- $ XILINX$RCSfile: xc2c64a.bsd,v $
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-- XILINX Revision: 1.8
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--
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-- BSDL file for device %xc2c64a%, package %VQ100%
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-- Xilinx, Inc. ADVANCED: Exp $ $Date: 2008-01-28 19:29:46 $
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-- Generated by createBSDL_BR %1a.0%
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--
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-- Unzip these BSDL files into your %xilinx%/xbr/data directory,
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-- overwriting all files."
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-- =================================================
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-- North American Support
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-- (Mon,Tues,Wed,Fri 6:30am-5pm
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-- Thr 6:30am - 4:00pm Pacific Standard Time)
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-- Hotline: 1-800-255-7778
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-- or (408) 879-5199
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-- Fax: (408) 879-4442
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-- Email: hotline@xilinx.com
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-- United Kingdom Support
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-- (Mon-Fri 08:00 to 17:30 GMT)
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-- Hotline: +44 870 7350 610
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-- Fax: +44 870 7350 620
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-- Email : eurosupport@xilinx.com
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--
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-- France Support
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-- (Mon-Fri 08:00 to 17:30 GMT)
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-- Hotline: +33 1 3463 0100
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-- Fax: +44 870 7350 620
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-- Email : eurosupport@xilinx.com
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--
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-- Germany Support
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-- (Mon-Fri 08:00 to 17:30 GMT)
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-- Hotline: +49 180 3 60 60 60
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-- Fax: +44 870 7350 620
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-- Email : eurosupport@xilinx.com
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-- Sweden Support
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-- (Mon-Fri 08:00 to 17:30 GMT)
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-- Hotline: +46 8 33 14 00
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-- Fax: +44 870 7350 620
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-- Email : eurosupport@xilinx.com
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--
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-- Japan Support
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-- (Mon,Tues,Thu,Fri 9:00am -5:00pm ()
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-- Wed 9:00am -4:00pm)
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-- Hotline: (81)3-3297-9163
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-- Fax:: (81)3-3297-0067
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-- Email: jhotline@xilinx.com
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-- =================================================
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--
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entity xc2c64a is
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generic (PHYSICAL_PIN_MAP : string := "UNDEFINED");
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port ( tdi : in bit;
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tck : in bit;
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tms : in bit;
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tdo : out bit;
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62 |
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IO_0 : inout bit;
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63 |
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IO_1 : inout bit;
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64 |
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IO_2 : inout bit;
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65 |
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IO_3 : inout bit;
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66 |
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IO_4 : inout bit;
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67 |
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IO_5 : inout bit;
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68 |
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IO_6 : inout bit;
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69 |
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IO_7 : inout bit;
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70 |
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IO_8 : inout bit;
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71 |
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IO_9 : inout bit;
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72 |
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IO_10 : inout bit;
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73 |
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IO_11 : inout bit;
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74 |
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IO_12 : inout bit;
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75 |
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IO_13 : inout bit;
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IO_14 : inout bit;
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77 |
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IO_15 : inout bit;
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78 |
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IO_16 : inout bit;
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79 |
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IO_17 : inout bit;
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80 |
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IO_18 : inout bit;
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81 |
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IO_19 : inout bit;
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82 |
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IO_20 : inout bit;
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83 |
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IO_21 : inout bit;
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84 |
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IO_22 : inout bit;
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85 |
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IO_23 : inout bit;
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86 |
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IO_24 : inout bit;
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87 |
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IO_25 : inout bit;
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88 |
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IO_26 : inout bit;
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89 |
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IO_27 : inout bit;
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90 |
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IO_28 : inout bit;
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91 |
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IO_29 : inout bit;
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IO_30 : inout bit;
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IO_31 : inout bit;
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IO_32 : inout bit;
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IO_33 : inout bit;
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IO_34 : inout bit;
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IO_35 : inout bit;
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IO_36 : inout bit;
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IO_37 : inout bit;
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100 |
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IO_38 : inout bit;
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IO_39 : inout bit;
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IO_40 : inout bit;
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103 |
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IO_41 : inout bit;
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104 |
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IO_42 : inout bit;
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105 |
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IO_43 : inout bit;
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IO_44 : inout bit;
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107 |
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IO_45 : inout bit;
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108 |
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IO_46 : inout bit;
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109 |
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IO_47 : inout bit;
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110 |
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IO_48 : inout bit;
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IO_49 : inout bit;
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112 |
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IO_50 : inout bit;
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113 |
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IO_51 : inout bit;
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114 |
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IO_52 : inout bit;
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115 |
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IO_53 : inout bit;
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116 |
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IO_54 : inout bit;
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117 |
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IO_55 : inout bit;
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118 |
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IO_56 : inout bit;
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119 |
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IO_57 : inout bit;
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120 |
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IO_58 : inout bit;
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IO_59 : inout bit;
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IO_60 : inout bit;
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IO_61 : inout bit;
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IO_62 : inout bit;
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IO_63 : inout bit);
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use std_1149_1_1994.all;
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attribute COMPONENT_CONFORMANCE of xc2c64a : entity is "std_1149_1_1993";
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attribute PIN_MAP of xc2c64a : entity is PHYSICAL_PIN_MAP;
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constant UNDEFINED : PIN_MAP_STRING :=
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" tdi:45 , tck:48 , tms:47, tdo:83," &
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" IO_0:13, IO_1:12, IO_2:11, IO_3:10, IO_4:9, " &
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" IO_5:8, IO_6:7, IO_7:6, IO_8:4, IO_9:3, " &
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" IO_10:2, IO_11:1, IO_12:99, IO_13:97, IO_14:94, " &
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" IO_15:92, IO_16:14, IO_17:15, IO_18:16, IO_19:17, " &
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" IO_20:18, IO_21:19, IO_22:22, IO_23:23, IO_24:24, " &
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" IO_25:27, IO_26:28, IO_27:29, IO_28:30, IO_29:32, " &
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" IO_30:33, IO_31:34, IO_32:91, IO_33:90, IO_34:89, " &
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" IO_35:81, IO_36:79, IO_37:78, IO_38:77, IO_39:76, " &
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" IO_40:74, IO_41:72, IO_42:71, IO_43:70, IO_44:68, " &
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" IO_45:67, IO_46:64, IO_47:61, IO_48:35, IO_49:36, " &
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" IO_50:37, IO_51:39, IO_52:40, IO_53:41, IO_54:42, " &
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" IO_55:43, IO_56:49, IO_57:50, IO_58:52, IO_59:53, " &
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" IO_60:55, IO_61:56, IO_62:58, IO_63:60";
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attribute TAP_SCAN_IN of tdi : signal is true;
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attribute TAP_SCAN_CLOCK of tck : signal is (33.0e6, both);
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attribute TAP_SCAN_MODE of tms : signal is true;
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attribute TAP_SCAN_OUT of tdo : signal is true;
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attribute INSTRUCTION_LENGTH of xc2c64a : entity is 8;
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attribute INSTRUCTION_OPCODE of xc2c64a : entity is
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"INTEST (00000010)," &
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"BYPASS (11111111)," &
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"SAMPLE (00000011)," &
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"EXTEST (00000000)," &
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"IDCODE (00000001)," &
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"USERCODE (11111101)," &
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"HIGHZ (11111100)," &
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"ISC_ENABLE_CLAMP (11101001)," &
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"ISC_ENABLEOTF (11100100)," &
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"ISC_ENABLE (11101000)," &
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"ISC_SRAM_READ (11100111)," &
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"ISC_SRAM_WRITE (11100110)," &
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"ISC_ERASE (11101101)," &
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"ISC_PROGRAM (11101010)," &
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"ISC_READ (11101110)," &
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"ISC_INIT (11110000)," &
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"ISC_DISABLE (11000000)," &
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"TEST_ENABLE (00010001)," &
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"BULKPROG (00010010)," &
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"ERASE_ALL (00010100)," &
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"MVERIFY (00010011)," &
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"TEST_DISABLE (00010101)," &
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-- "STCTEST (00010110)," &
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"ISC_NOOP (11100000)";
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attribute INSTRUCTION_CAPTURE of xc2c64a : entity is "XXXXXX01" ;
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attribute IDCODE_REGISTER of xc2c64a : entity is "XXXX0110111001011XXX000010010011";
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attribute REGISTER_ACCESS of xc2c64a : entity is
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"BYPASS (BYPASS)," &
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"BYPASS (HIGHZ)," &
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"BOUNDARY (SAMPLE)," &
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"BOUNDARY (EXTEST)," &
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"BOUNDARY (INTEST)," &
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"DATAREG[281] (ISC_ENABLEOTF)," &
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"DATAREG[281] (ISC_ENABLE)," &
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"DATAREG[281] (ISC_SRAM_READ)," &
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"DATAREG[281] (ISC_SRAM_WRITE)," &
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"DATAREG[281] (ISC_ERASE)," &
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"DATAREG[281] (ISC_PROGRAM)," &
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"DATAREG[281] (ISC_READ)," &
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"DATAREG[281] (ISC_INIT)," &
|
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"DATAREG[281] (ISC_DISABLE)," &
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"DATAREG[281] (TEST_ENABLE)," &
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197 |
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"DATAREG[281] (BULKPROG)," &
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"DATAREG[281] (ERASE_ALL)," &
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"DATAREG[281] (MVERIFY)," &
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"DATAREG[281] (TEST_DISABLE)," &
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-- "STC[] (STCTEST)," &
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"ISC_DEFAULT[1] (ISC_NOOP)," &
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"DEVICE_ID (IDCODE, USERCODE)," &
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"ISC_DEFAULT[1] (ISC_ENABLE_CLAMP)";
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attribute BOUNDARY_LENGTH of xc2c64a : entity is 192;
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attribute BOUNDARY_REGISTER of xc2c64a : entity is
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--
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-- num cell port function safe [ccell disval rslt]
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--
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" 191 (BC_1, IO_0, INPUT, X)," &
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" 190 (BC_1, IO_0, OUTPUT3, X, 189, 0,Z),"&
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" 189 (BC_1, *, CONTROL, X)," &
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" 188 (BC_1, IO_1, INPUT, X)," &
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" 187 (BC_1, IO_1, OUTPUT3, X, 186, 0,Z),"&
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" 186 (BC_1, *, CONTROL, X)," &
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" 185 (BC_1, IO_2, INPUT, X)," &
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" 184 (BC_1, IO_2, OUTPUT3, X, 183, 0,Z),"&
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" 183 (BC_1, *, CONTROL, X)," &
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" 182 (BC_1, IO_3, INPUT, X)," &
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" 181 (BC_1, IO_3, OUTPUT3, X, 180, 0,Z),"&
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" 180 (BC_1, *, CONTROL, X)," &
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" 179 (BC_1, IO_4, INPUT, X)," &
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" 178 (BC_1, IO_4, OUTPUT3, X, 177, 0,Z),"&
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" 177 (BC_1, *, CONTROL, X)," &
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" 176 (BC_1, IO_5, INPUT, X)," &
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" 175 (BC_1, IO_5, OUTPUT3, X, 174, 0,Z),"&
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" 174 (BC_1, *, CONTROL, X)," &
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" 173 (BC_1, IO_6, INPUT, X)," &
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" 172 (BC_1, IO_6, OUTPUT3, X, 171, 0,Z),"&
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" 171 (BC_1, *, CONTROL, X)," &
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" 170 (BC_1, IO_7, INPUT, X)," &
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" 169 (BC_1, IO_7, OUTPUT3, X, 168, 0,Z),"&
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" 168 (BC_1, *, CONTROL, X)," &
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" 167 (BC_1, IO_8, INPUT, X)," &
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" 166 (BC_1, IO_8, OUTPUT3, X, 165, 0,Z),"&
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" 165 (BC_1, *, CONTROL, X)," &
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" 164 (BC_1, IO_9, INPUT, X)," &
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" 163 (BC_1, IO_9, OUTPUT3, X, 162, 0,Z),"&
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" 162 (BC_1, *, CONTROL, X)," &
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244 |
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" 161 (BC_1, IO_10, INPUT, X)," &
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245 |
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" 160 (BC_1, IO_10, OUTPUT3, X, 159, 0,Z),"&
|
246 |
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" 159 (BC_1, *, CONTROL, X)," &
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247 |
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" 158 (BC_1, IO_11, INPUT, X)," &
|
248 |
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" 157 (BC_1, IO_11, OUTPUT3, X, 156, 0,Z),"&
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249 |
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" 156 (BC_1, *, CONTROL, X)," &
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250 |
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" 155 (BC_1, IO_12, INPUT, X)," &
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251 |
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" 154 (BC_1, IO_12, OUTPUT3, X, 153, 0,Z),"&
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252 |
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" 153 (BC_1, *, CONTROL, X)," &
|
253 |
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" 152 (BC_1, IO_13, INPUT, X)," &
|
254 |
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" 151 (BC_1, IO_13, OUTPUT3, X, 150, 0,Z),"&
|
255 |
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" 150 (BC_1, *, CONTROL, X)," &
|
256 |
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" 149 (BC_1, IO_14, INPUT, X)," &
|
257 |
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" 148 (BC_1, IO_14, OUTPUT3, X, 147, 0,Z),"&
|
258 |
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" 147 (BC_1, *, CONTROL, X)," &
|
259 |
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" 146 (BC_1, IO_15, INPUT, X)," &
|
260 |
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" 145 (BC_1, IO_15, OUTPUT3, X, 144, 0,Z),"&
|
261 |
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" 144 (BC_1, *, CONTROL, X)," &
|
262 |
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" 143 (BC_1, IO_16, INPUT, X)," &
|
263 |
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" 142 (BC_1, IO_16, OUTPUT3, X, 141, 0,Z),"&
|
264 |
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" 141 (BC_1, *, CONTROL, X)," &
|
265 |
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" 140 (BC_1, IO_17, INPUT, X)," &
|
266 |
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" 139 (BC_1, IO_17, OUTPUT3, X, 138, 0,Z),"&
|
267 |
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" 138 (BC_1, *, CONTROL, X)," &
|
268 |
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" 137 (BC_1, IO_18, INPUT, X)," &
|
269 |
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" 136 (BC_1, IO_18, OUTPUT3, X, 135, 0,Z),"&
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270 |
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" 135 (BC_1, *, CONTROL, X)," &
|
271 |
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" 134 (BC_1, IO_19, INPUT, X)," &
|
272 |
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" 133 (BC_1, IO_19, OUTPUT3, X, 132, 0,Z),"&
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273 |
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" 132 (BC_1, *, CONTROL, X)," &
|
274 |
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" 131 (BC_1, IO_20, INPUT, X)," &
|
275 |
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" 130 (BC_1, IO_20, OUTPUT3, X, 129, 0,Z),"&
|
276 |
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" 129 (BC_1, *, CONTROL, X)," &
|
277 |
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" 128 (BC_1, IO_21, INPUT, X)," &
|
278 |
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" 127 (BC_1, IO_21, OUTPUT3, X, 126, 0,Z),"&
|
279 |
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" 126 (BC_1, *, CONTROL, X)," &
|
280 |
|
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" 125 (BC_1, IO_22, INPUT, X)," &
|
281 |
|
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" 124 (BC_1, IO_22, OUTPUT3, X, 123, 0,Z),"&
|
282 |
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" 123 (BC_1, *, CONTROL, X)," &
|
283 |
|
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" 122 (BC_1, IO_23, INPUT, X)," &
|
284 |
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" 121 (BC_1, IO_23, OUTPUT3, X, 120, 0,Z),"&
|
285 |
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" 120 (BC_1, *, CONTROL, X)," &
|
286 |
|
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" 119 (BC_1, IO_24, INPUT, X)," &
|
287 |
|
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" 118 (BC_1, IO_24, OUTPUT3, X, 117, 0,Z),"&
|
288 |
|
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" 117 (BC_1, *, CONTROL, X)," &
|
289 |
|
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" 116 (BC_1, IO_25, INPUT, X)," &
|
290 |
|
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" 115 (BC_1, IO_25, OUTPUT3, X, 114, 0,Z),"&
|
291 |
|
|
" 114 (BC_1, *, CONTROL, X)," &
|
292 |
|
|
" 113 (BC_1, IO_26, INPUT, X)," &
|
293 |
|
|
" 112 (BC_1, IO_26, OUTPUT3, X, 111, 0,Z),"&
|
294 |
|
|
" 111 (BC_1, *, CONTROL, X)," &
|
295 |
|
|
" 110 (BC_1, IO_27, INPUT, X)," &
|
296 |
|
|
" 109 (BC_1, IO_27, OUTPUT3, X, 108, 0,Z),"&
|
297 |
|
|
" 108 (BC_1, *, CONTROL, X)," &
|
298 |
|
|
" 107 (BC_1, IO_28, INPUT, X)," &
|
299 |
|
|
" 106 (BC_1, IO_28, OUTPUT3, X, 105, 0,Z),"&
|
300 |
|
|
" 105 (BC_1, *, CONTROL, X)," &
|
301 |
|
|
" 104 (BC_1, IO_29, INPUT, X)," &
|
302 |
|
|
" 103 (BC_1, IO_29, OUTPUT3, X, 102, 0,Z),"&
|
303 |
|
|
" 102 (BC_1, *, CONTROL, X)," &
|
304 |
|
|
" 101 (BC_1, IO_30, INPUT, X)," &
|
305 |
|
|
" 100 (BC_1, IO_30, OUTPUT3, X, 99, 0,Z),"&
|
306 |
|
|
" 99 (BC_1, *, CONTROL, X)," &
|
307 |
|
|
" 98 (BC_1, IO_31, INPUT, X)," &
|
308 |
|
|
" 97 (BC_1, IO_31, OUTPUT3, X, 96, 0,Z),"&
|
309 |
|
|
" 96 (BC_1, *, CONTROL, X)," &
|
310 |
|
|
" 95 (BC_1, IO_32, INPUT, X)," &
|
311 |
|
|
" 94 (BC_1, IO_32, OUTPUT3, X, 93, 0,Z),"&
|
312 |
|
|
" 93 (BC_1, *, CONTROL, X)," &
|
313 |
|
|
" 92 (BC_1, IO_33, INPUT, X)," &
|
314 |
|
|
" 91 (BC_1, IO_33, OUTPUT3, X, 90, 0,Z),"&
|
315 |
|
|
" 90 (BC_1, *, CONTROL, X)," &
|
316 |
|
|
" 89 (BC_1, IO_34, INPUT, X)," &
|
317 |
|
|
" 88 (BC_1, IO_34, OUTPUT3, X, 87, 0,Z),"&
|
318 |
|
|
" 87 (BC_1, *, CONTROL, X)," &
|
319 |
|
|
" 86 (BC_1, IO_35, INPUT, X)," &
|
320 |
|
|
" 85 (BC_1, IO_35, OUTPUT3, X, 84, 0,Z),"&
|
321 |
|
|
" 84 (BC_1, *, CONTROL, X)," &
|
322 |
|
|
" 83 (BC_1, IO_36, INPUT, X)," &
|
323 |
|
|
" 82 (BC_1, IO_36, OUTPUT3, X, 81, 0,Z),"&
|
324 |
|
|
" 81 (BC_1, *, CONTROL, X)," &
|
325 |
|
|
" 80 (BC_1, IO_37, INPUT, X)," &
|
326 |
|
|
" 79 (BC_1, IO_37, OUTPUT3, X, 78, 0,Z),"&
|
327 |
|
|
" 78 (BC_1, *, CONTROL, X)," &
|
328 |
|
|
" 77 (BC_1, IO_38, INPUT, X)," &
|
329 |
|
|
" 76 (BC_1, IO_38, OUTPUT3, X, 75, 0,Z),"&
|
330 |
|
|
" 75 (BC_1, *, CONTROL, X)," &
|
331 |
|
|
" 74 (BC_1, IO_39, INPUT, X)," &
|
332 |
|
|
" 73 (BC_1, IO_39, OUTPUT3, X, 72, 0,Z),"&
|
333 |
|
|
" 72 (BC_1, *, CONTROL, X)," &
|
334 |
|
|
" 71 (BC_1, IO_40, INPUT, X)," &
|
335 |
|
|
" 70 (BC_1, IO_40, OUTPUT3, X, 69, 0,Z),"&
|
336 |
|
|
" 69 (BC_1, *, CONTROL, X)," &
|
337 |
|
|
" 68 (BC_1, IO_41, INPUT, X)," &
|
338 |
|
|
" 67 (BC_1, IO_41, OUTPUT3, X, 66, 0,Z),"&
|
339 |
|
|
" 66 (BC_1, *, CONTROL, X)," &
|
340 |
|
|
" 65 (BC_1, IO_42, INPUT, X)," &
|
341 |
|
|
" 64 (BC_1, IO_42, OUTPUT3, X, 63, 0,Z),"&
|
342 |
|
|
" 63 (BC_1, *, CONTROL, X)," &
|
343 |
|
|
" 62 (BC_1, IO_43, INPUT, X)," &
|
344 |
|
|
" 61 (BC_1, IO_43, OUTPUT3, X, 60, 0,Z),"&
|
345 |
|
|
" 60 (BC_1, *, CONTROL, X)," &
|
346 |
|
|
" 59 (BC_1, IO_44, INPUT, X)," &
|
347 |
|
|
" 58 (BC_1, IO_44, OUTPUT3, X, 57, 0,Z),"&
|
348 |
|
|
" 57 (BC_1, *, CONTROL, X)," &
|
349 |
|
|
" 56 (BC_1, IO_45, INPUT, X)," &
|
350 |
|
|
" 55 (BC_1, IO_45, OUTPUT3, X, 54, 0,Z),"&
|
351 |
|
|
" 54 (BC_1, *, CONTROL, X)," &
|
352 |
|
|
" 53 (BC_1, IO_46, INPUT, X)," &
|
353 |
|
|
" 52 (BC_1, IO_46, OUTPUT3, X, 51, 0,Z),"&
|
354 |
|
|
" 51 (BC_1, *, CONTROL, X)," &
|
355 |
|
|
" 50 (BC_1, IO_47, INPUT, X)," &
|
356 |
|
|
" 49 (BC_1, IO_47, OUTPUT3, X, 48, 0,Z),"&
|
357 |
|
|
" 48 (BC_1, *, CONTROL, X)," &
|
358 |
|
|
" 47 (BC_1, IO_48, INPUT, X)," &
|
359 |
|
|
" 46 (BC_1, IO_48, OUTPUT3, X, 45, 0,Z),"&
|
360 |
|
|
" 45 (BC_1, *, CONTROL, X)," &
|
361 |
|
|
" 44 (BC_1, IO_49, INPUT, X)," &
|
362 |
|
|
" 43 (BC_1, IO_49, OUTPUT3, X, 42, 0,Z),"&
|
363 |
|
|
" 42 (BC_1, *, CONTROL, X)," &
|
364 |
|
|
" 41 (BC_1, IO_50, INPUT, X)," &
|
365 |
|
|
" 40 (BC_1, IO_50, OUTPUT3, X, 39, 0,Z),"&
|
366 |
|
|
" 39 (BC_1, *, CONTROL, X)," &
|
367 |
|
|
" 38 (BC_1, IO_51, INPUT, X)," &
|
368 |
|
|
" 37 (BC_1, IO_51, OUTPUT3, X, 36, 0,Z),"&
|
369 |
|
|
" 36 (BC_1, *, CONTROL, X)," &
|
370 |
|
|
" 35 (BC_1, IO_52, INPUT, X)," &
|
371 |
|
|
" 34 (BC_1, IO_52, OUTPUT3, X, 33, 0,Z),"&
|
372 |
|
|
" 33 (BC_1, *, CONTROL, X)," &
|
373 |
|
|
" 32 (BC_1, IO_53, INPUT, X)," &
|
374 |
|
|
" 31 (BC_1, IO_53, OUTPUT3, X, 30, 0,Z),"&
|
375 |
|
|
" 30 (BC_1, *, CONTROL, X)," &
|
376 |
|
|
" 29 (BC_1, IO_54, INPUT, X)," &
|
377 |
|
|
" 28 (BC_1, IO_54, OUTPUT3, X, 27, 0,Z),"&
|
378 |
|
|
" 27 (BC_1, *, CONTROL, X)," &
|
379 |
|
|
" 26 (BC_1, IO_55, INPUT, X)," &
|
380 |
|
|
" 25 (BC_1, IO_55, OUTPUT3, X, 24, 0,Z),"&
|
381 |
|
|
" 24 (BC_1, *, CONTROL, X)," &
|
382 |
|
|
" 23 (BC_1, IO_56, INPUT, X)," &
|
383 |
|
|
" 22 (BC_1, IO_56, OUTPUT3, X, 21, 0,Z),"&
|
384 |
|
|
" 21 (BC_1, *, CONTROL, X)," &
|
385 |
|
|
" 20 (BC_1, IO_57, INPUT, X)," &
|
386 |
|
|
" 19 (BC_1, IO_57, OUTPUT3, X, 18, 0,Z),"&
|
387 |
|
|
" 18 (BC_1, *, CONTROL, X)," &
|
388 |
|
|
" 17 (BC_1, IO_58, INPUT, X)," &
|
389 |
|
|
" 16 (BC_1, IO_58, OUTPUT3, X, 15, 0,Z),"&
|
390 |
|
|
" 15 (BC_1, *, CONTROL, X)," &
|
391 |
|
|
" 14 (BC_1, IO_59, INPUT, X)," &
|
392 |
|
|
" 13 (BC_1, IO_59, OUTPUT3, X, 12, 0,Z),"&
|
393 |
|
|
" 12 (BC_1, *, CONTROL, X)," &
|
394 |
|
|
" 11 (BC_1, IO_60, INPUT, X)," &
|
395 |
|
|
" 10 (BC_1, IO_60, OUTPUT3, X, 9, 0,Z),"&
|
396 |
|
|
" 9 (BC_1, *, CONTROL, X)," &
|
397 |
|
|
" 8 (BC_1, IO_61, INPUT, X)," &
|
398 |
|
|
" 7 (BC_1, IO_61, OUTPUT3, X, 6, 0,Z),"&
|
399 |
|
|
" 6 (BC_1, *, CONTROL, X)," &
|
400 |
|
|
" 5 (BC_1, IO_62, INPUT, X)," &
|
401 |
|
|
" 4 (BC_1, IO_62, OUTPUT3, X, 3, 0,Z),"&
|
402 |
|
|
" 3 (BC_1, *, CONTROL, X)," &
|
403 |
|
|
" 2 (BC_1, IO_63, INPUT, X)," &
|
404 |
|
|
" 1 (BC_1, IO_63, OUTPUT3, X, 0, 0,Z),"&
|
405 |
|
|
" 0 (BC_1, *, CONTROL, X)" ;
|
406 |
|
|
|
407 |
|
|
end xc2c64a;
|
408 |
|
|
|