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[/] [djpeg/] [trunk/] [src/] [jpeg_ziguzagu.v] - Blame information for rev 3

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//---------------------------------------------------------------------------
// File Name   : jpeg_ziguzagu.v
// Module Name : jpeg_ziguzagu
// Description : Ziguzagu
// Project     : JPEG Decoder
// Belong to   : 
// Author      : H.Ishihara
// E-Mail      : hidemi@sweetcafe.jp
// HomePage    : http://www.sweetcafe.jp/
// Date        : 2006/10/01
// Rev.        : 1.1
//---------------------------------------------------------------------------
// Rev. Date       Description
//---------------------------------------------------------------------------
// 1.01 2006/10/01 1st Release
//---------------------------------------------------------------------------
// $Id: 
//---------------------------------------------------------------------------
`timescale 1ps / 1ps
 
module jpeg_ziguzagu
  (
   rst,
   clk,
 
   DataInEnable,
   DataInAddress,
   DataInColor,
   DataInIdle,
   DataIn,
 
   HaffumanEndEnable,
 
   DataOutEnable,
   DataOutColor,
   DataOutSel,
   Data00Reg,
   Data01Reg,
   Data02Reg,
   Data03Reg,
   Data04Reg,
   Data05Reg,
   Data06Reg,
   Data07Reg,
   Data08Reg,
   Data09Reg,
   Data10Reg,
   Data11Reg,
   Data12Reg,
   Data13Reg,
   Data14Reg,
   Data15Reg,
   Data16Reg,
   Data17Reg,
   Data18Reg,
   Data19Reg,
   Data20Reg,
   Data21Reg,
   Data22Reg,
   Data23Reg,
   Data24Reg,
   Data25Reg,
   Data26Reg,
   Data27Reg,
   Data28Reg,
   Data29Reg,
   Data30Reg,
   Data31Reg,
   Data32Reg,
   Data33Reg,
   Data34Reg,
   Data35Reg,
   Data36Reg,
   Data37Reg,
   Data38Reg,
   Data39Reg,
   Data40Reg,
   Data41Reg,
   Data42Reg,
   Data43Reg,
   Data44Reg,
   Data45Reg,
   Data46Reg,
   Data47Reg,
   Data48Reg,
   Data49Reg,
   Data50Reg,
   Data51Reg,
   Data52Reg,
   Data53Reg,
   Data54Reg,
   Data55Reg,
   Data56Reg,
   Data57Reg,
   Data58Reg,
   Data59Reg,
   Data60Reg,
   Data61Reg,
   Data62Reg,
   Data63Reg,
 
   BankARelease,
   BankBRelease
   );
 
   input         clk;
   input         rst;
 
   input         DataInEnable;
   input [5:0]    DataInAddress;
   input [2:0]    DataInColor;
   output        DataInIdle;
   input [15:0]  DataIn;
 
   input         HaffumanEndEnable;
 
   output        DataOutEnable;
   output [2:0]   DataOutColor;
   input         DataOutSel;
   output [15:0] Data00Reg;
   output [15:0] Data01Reg;
   output [15:0] Data02Reg;
   output [15:0] Data03Reg;
   output [15:0] Data04Reg;
   output [15:0] Data05Reg;
   output [15:0] Data06Reg;
   output [15:0] Data07Reg;
   output [15:0] Data08Reg;
   output [15:0] Data09Reg;
   output [15:0] Data10Reg;
   output [15:0] Data11Reg;
   output [15:0] Data12Reg;
   output [15:0] Data13Reg;
   output [15:0] Data14Reg;
   output [15:0] Data15Reg;
   output [15:0] Data16Reg;
   output [15:0] Data17Reg;
   output [15:0] Data18Reg;
   output [15:0] Data19Reg;
   output [15:0] Data20Reg;
   output [15:0] Data21Reg;
   output [15:0] Data22Reg;
   output [15:0] Data23Reg;
   output [15:0] Data24Reg;
   output [15:0] Data25Reg;
   output [15:0] Data26Reg;
   output [15:0] Data27Reg;
   output [15:0] Data28Reg;
   output [15:0] Data29Reg;
   output [15:0] Data30Reg;
   output [15:0] Data31Reg;
   output [15:0] Data32Reg;
   output [15:0] Data33Reg;
   output [15:0] Data34Reg;
   output [15:0] Data35Reg;
   output [15:0] Data36Reg;
   output [15:0] Data37Reg;
   output [15:0] Data38Reg;
   output [15:0] Data39Reg;
   output [15:0] Data40Reg;
   output [15:0] Data41Reg;
   output [15:0] Data42Reg;
   output [15:0] Data43Reg;
   output [15:0] Data44Reg;
   output [15:0] Data45Reg;
   output [15:0] Data46Reg;
   output [15:0] Data47Reg;
   output [15:0] Data48Reg;
   output [15:0] Data49Reg;
   output [15:0] Data50Reg;
   output [15:0] Data51Reg;
   output [15:0] Data52Reg;
   output [15:0] Data53Reg;
   output [15:0] Data54Reg;
   output [15:0] Data55Reg;
   output [15:0] Data56Reg;
   output [15:0] Data57Reg;
   output [15:0] Data58Reg;
   output [15:0] Data59Reg;
   output [15:0] Data60Reg;
   output [15:0] Data61Reg;
   output [15:0] Data62Reg;
   output [15:0] Data63Reg;
   input         BankARelease;
   input         BankBRelease;
 
   reg           BankAEnable;
   reg           BankBEnable;
   reg           DataInBank;
 
   reg [2:0]      BankAColor;
   reg [2:0]      BankBColor;
 
   always @(posedge clk or negedge rst) begin
      if(!rst) begin
         BankAEnable <= 1'b0;
         BankBEnable <= 1'b0;
         BankAColor  <= 3'b000;
         BankBColor  <= 3'b000;
         DataInBank  <= 1'b0;
      end else begin
         if(BankAEnable == 1'b0 & DataInBank == 1'b0) begin
            if(HaffumanEndEnable == 1'b1 & DataInIdle == 1'b1) begin
               BankAEnable <= 1'b1;
               BankAColor  <= DataInColor;
            end
         end else begin
            if(BankARelease == 1'b1) begin
               BankAEnable <= 1'b0;
            end
         end
         if(BankBEnable == 1'b0 & DataInBank == 1'b1) begin
            if(HaffumanEndEnable == 1'b1 & DataInIdle == 1'b1) begin
               BankBEnable <= 1'b1;
               BankBColor  <= DataInColor;
            end
         end else begin
            if(BankBRelease == 1'b1) begin
               BankBEnable <= 1'b0;
            end
         end
         if(HaffumanEndEnable == 1'b1) begin
            DataInBank   <= ~DataInBank;
         end
      end // else: !if(!rst)
   end // always @ (posedge clk or negedge rst)
 
   assign DataInIdle = BankAEnable == 1'b0 | BankBEnable == 1'b0;
   assign DataOutEnable = BankAEnable == 1'b1 | BankBEnable == 1'b1;
   assign DataOutColor  = (DataInBank)?BankBColor:BankAColor;
 
   wire   ZigAEnable;
   wire   ZigBEnable;
 
   wire [15:0] BankA00Reg;
   wire [15:0] BankA01Reg;
   wire [15:0] BankA02Reg;
   wire [15:0] BankA03Reg;
   wire [15:0] BankA04Reg;
   wire [15:0] BankA05Reg;
   wire [15:0] BankA06Reg;
   wire [15:0] BankA07Reg;
   wire [15:0] BankA08Reg;
   wire [15:0] BankA09Reg;
   wire [15:0] BankA10Reg;
   wire [15:0] BankA11Reg;
   wire [15:0] BankA12Reg;
   wire [15:0] BankA13Reg;
   wire [15:0] BankA14Reg;
   wire [15:0] BankA15Reg;
   wire [15:0] BankA16Reg;
   wire [15:0] BankA17Reg;
   wire [15:0] BankA18Reg;
   wire [15:0] BankA19Reg;
   wire [15:0] BankA20Reg;
   wire [15:0] BankA21Reg;
   wire [15:0] BankA22Reg;
   wire [15:0] BankA23Reg;
   wire [15:0] BankA24Reg;
   wire [15:0] BankA25Reg;
   wire [15:0] BankA26Reg;
   wire [15:0] BankA27Reg;
   wire [15:0] BankA28Reg;
   wire [15:0] BankA29Reg;
   wire [15:0] BankA30Reg;
   wire [15:0] BankA31Reg;
   wire [15:0] BankA32Reg;
   wire [15:0] BankA33Reg;
   wire [15:0] BankA34Reg;
   wire [15:0] BankA35Reg;
   wire [15:0] BankA36Reg;
   wire [15:0] BankA37Reg;
   wire [15:0] BankA38Reg;
   wire [15:0] BankA39Reg;
   wire [15:0] BankA40Reg;
   wire [15:0] BankA41Reg;
   wire [15:0] BankA42Reg;
   wire [15:0] BankA43Reg;
   wire [15:0] BankA44Reg;
   wire [15:0] BankA45Reg;
   wire [15:0] BankA46Reg;
   wire [15:0] BankA47Reg;
   wire [15:0] BankA48Reg;
   wire [15:0] BankA49Reg;
   wire [15:0] BankA50Reg;
   wire [15:0] BankA51Reg;
   wire [15:0] BankA52Reg;
   wire [15:0] BankA53Reg;
   wire [15:0] BankA54Reg;
   wire [15:0] BankA55Reg;
   wire [15:0] BankA56Reg;
   wire [15:0] BankA57Reg;
   wire [15:0] BankA58Reg;
   wire [15:0] BankA59Reg;
   wire [15:0] BankA60Reg;
   wire [15:0] BankA61Reg;
   wire [15:0] BankA62Reg;
   wire [15:0] BankA63Reg;
 
   wire [15:0] BankB00Reg;
   wire [15:0] BankB01Reg;
   wire [15:0] BankB02Reg;
   wire [15:0] BankB03Reg;
   wire [15:0] BankB04Reg;
   wire [15:0] BankB05Reg;
   wire [15:0] BankB06Reg;
   wire [15:0] BankB07Reg;
   wire [15:0] BankB08Reg;
   wire [15:0] BankB09Reg;
   wire [15:0] BankB10Reg;
   wire [15:0] BankB11Reg;
   wire [15:0] BankB12Reg;
   wire [15:0] BankB13Reg;
   wire [15:0] BankB14Reg;
   wire [15:0] BankB15Reg;
   wire [15:0] BankB16Reg;
   wire [15:0] BankB17Reg;
   wire [15:0] BankB18Reg;
   wire [15:0] BankB19Reg;
   wire [15:0] BankB20Reg;
   wire [15:0] BankB21Reg;
   wire [15:0] BankB22Reg;
   wire [15:0] BankB23Reg;
   wire [15:0] BankB24Reg;
   wire [15:0] BankB25Reg;
   wire [15:0] BankB26Reg;
   wire [15:0] BankB27Reg;
   wire [15:0] BankB28Reg;
   wire [15:0] BankB29Reg;
   wire [15:0] BankB30Reg;
   wire [15:0] BankB31Reg;
   wire [15:0] BankB32Reg;
   wire [15:0] BankB33Reg;
   wire [15:0] BankB34Reg;
   wire [15:0] BankB35Reg;
   wire [15:0] BankB36Reg;
   wire [15:0] BankB37Reg;
   wire [15:0] BankB38Reg;
   wire [15:0] BankB39Reg;
   wire [15:0] BankB40Reg;
   wire [15:0] BankB41Reg;
   wire [15:0] BankB42Reg;
   wire [15:0] BankB43Reg;
   wire [15:0] BankB44Reg;
   wire [15:0] BankB45Reg;
   wire [15:0] BankB46Reg;
   wire [15:0] BankB47Reg;
   wire [15:0] BankB48Reg;
   wire [15:0] BankB49Reg;
   wire [15:0] BankB50Reg;
   wire [15:0] BankB51Reg;
   wire [15:0] BankB52Reg;
   wire [15:0] BankB53Reg;
   wire [15:0] BankB54Reg;
   wire [15:0] BankB55Reg;
   wire [15:0] BankB56Reg;
   wire [15:0] BankB57Reg;
   wire [15:0] BankB58Reg;
   wire [15:0] BankB59Reg;
   wire [15:0] BankB60Reg;
   wire [15:0] BankB61Reg;
   wire [15:0] BankB62Reg;
   wire [15:0] BankB63Reg;
 
   assign      ZigAEnable = DataInEnable == 1'b1 & DataInBank == 1'b0;
   assign      ZigBEnable = DataInEnable == 1'b1 & DataInBank == 1'b1;
 
   jpeg_ziguzagu_reg u_jpeg_ziguzagu_reg0(
                                 .rst(rst),
                                 .clk(clk),
 
                                 .DataInEnable  ( ZigAEnable ),
                                 .DataInAddress ( DataInAddress ),
                                 .DataIn        ( DataIn  ),
 
                                 .Data00Reg( BankA00Reg ),
                                 .Data01Reg( BankA01Reg ),
                                 .Data02Reg( BankA02Reg ),
                                 .Data03Reg( BankA03Reg ),
                                 .Data04Reg( BankA04Reg ),
                                 .Data05Reg( BankA05Reg ),
                                 .Data06Reg( BankA06Reg ),
                                 .Data07Reg( BankA07Reg ),
                                 .Data08Reg( BankA08Reg ),
                                 .Data09Reg( BankA09Reg ),
                                 .Data10Reg( BankA10Reg ),
                                 .Data11Reg( BankA11Reg ),
                                 .Data12Reg( BankA12Reg ),
                                 .Data13Reg( BankA13Reg ),
                                 .Data14Reg( BankA14Reg ),
                                 .Data15Reg( BankA15Reg ),
                                 .Data16Reg( BankA16Reg ),
                                 .Data17Reg( BankA17Reg ),
                                 .Data18Reg( BankA18Reg ),
                                 .Data19Reg( BankA19Reg ),
                                 .Data20Reg( BankA20Reg ),
                                 .Data21Reg( BankA21Reg ),
                                 .Data22Reg( BankA22Reg ),
                                 .Data23Reg( BankA23Reg ),
                                 .Data24Reg( BankA24Reg ),
                                 .Data25Reg( BankA25Reg ),
                                 .Data26Reg( BankA26Reg ),
                                 .Data27Reg( BankA27Reg ),
                                 .Data28Reg( BankA28Reg ),
                                 .Data29Reg( BankA29Reg ),
                                 .Data30Reg( BankA30Reg ),
                                 .Data31Reg( BankA31Reg ),
                                 .Data32Reg( BankA32Reg ),
                                 .Data33Reg( BankA33Reg ),
                                 .Data34Reg( BankA34Reg ),
                                 .Data35Reg( BankA35Reg ),
                                 .Data36Reg( BankA36Reg ),
                                 .Data37Reg( BankA37Reg ),
                                 .Data38Reg( BankA38Reg ),
                                 .Data39Reg( BankA39Reg ),
                                 .Data40Reg( BankA40Reg ),
                                 .Data41Reg( BankA41Reg ),
                                 .Data42Reg( BankA42Reg ),
                                 .Data43Reg( BankA43Reg ),
                                 .Data44Reg( BankA44Reg ),
                                 .Data45Reg( BankA45Reg ),
                                 .Data46Reg( BankA46Reg ),
                                 .Data47Reg( BankA47Reg ),
                                 .Data48Reg( BankA48Reg ),
                                 .Data49Reg( BankA49Reg ),
                                 .Data50Reg( BankA50Reg ),
                                 .Data51Reg( BankA51Reg ),
                                 .Data52Reg( BankA52Reg ),
                                 .Data53Reg( BankA53Reg ),
                                 .Data54Reg( BankA54Reg ),
                                 .Data55Reg( BankA55Reg ),
                                 .Data56Reg( BankA56Reg ),
                                 .Data57Reg( BankA57Reg ),
                                 .Data58Reg( BankA58Reg ),
                                 .Data59Reg( BankA59Reg ),
                                 .Data60Reg( BankA60Reg ),
                                 .Data61Reg( BankA61Reg ),
                                 .Data62Reg( BankA62Reg ),
                                 .Data63Reg( BankA63Reg )
                                 );
 
   jpeg_ziguzagu_reg u_jpeg_ziguzagu_reg1(
                                 .rst(rst),
                                 .clk(clk),
 
                                 .DataInEnable  ( ZigBEnable ),
                                 .DataInAddress ( DataInAddress  ),
                                 .DataIn        ( DataIn   ),
 
                                 .Data00Reg( BankB00Reg ),
                                 .Data01Reg( BankB01Reg ),
                                 .Data02Reg( BankB02Reg ),
                                 .Data03Reg( BankB03Reg ),
                                 .Data04Reg( BankB04Reg ),
                                 .Data05Reg( BankB05Reg ),
                                 .Data06Reg( BankB06Reg ),
                                 .Data07Reg( BankB07Reg ),
                                 .Data08Reg( BankB08Reg ),
                                 .Data09Reg( BankB09Reg ),
                                 .Data10Reg( BankB10Reg ),
                                 .Data11Reg( BankB11Reg ),
                                 .Data12Reg( BankB12Reg ),
                                 .Data13Reg( BankB13Reg ),
                                 .Data14Reg( BankB14Reg ),
                                 .Data15Reg( BankB15Reg ),
                                 .Data16Reg( BankB16Reg ),
                                 .Data17Reg( BankB17Reg ),
                                 .Data18Reg( BankB18Reg ),
                                 .Data19Reg( BankB19Reg ),
                                 .Data20Reg( BankB20Reg ),
                                 .Data21Reg( BankB21Reg ),
                                 .Data22Reg( BankB22Reg ),
                                 .Data23Reg( BankB23Reg ),
                                 .Data24Reg( BankB24Reg ),
                                 .Data25Reg( BankB25Reg ),
                                 .Data26Reg( BankB26Reg ),
                                 .Data27Reg( BankB27Reg ),
                                 .Data28Reg( BankB28Reg ),
                                 .Data29Reg( BankB29Reg ),
                                 .Data30Reg( BankB30Reg ),
                                 .Data31Reg( BankB31Reg ),
                                 .Data32Reg( BankB32Reg ),
                                 .Data33Reg( BankB33Reg ),
                                 .Data34Reg( BankB34Reg ),
                                 .Data35Reg( BankB35Reg ),
                                 .Data36Reg( BankB36Reg ),
                                 .Data37Reg( BankB37Reg ),
                                 .Data38Reg( BankB38Reg ),
                                 .Data39Reg( BankB39Reg ),
                                 .Data40Reg( BankB40Reg ),
                                 .Data41Reg( BankB41Reg ),
                                 .Data42Reg( BankB42Reg ),
                                 .Data43Reg( BankB43Reg ),
                                 .Data44Reg( BankB44Reg ),
                                 .Data45Reg( BankB45Reg ),
                                 .Data46Reg( BankB46Reg ),
                                 .Data47Reg( BankB47Reg ),
                                 .Data48Reg( BankB48Reg ),
                                 .Data49Reg( BankB49Reg ),
                                 .Data50Reg( BankB50Reg ),
                                 .Data51Reg( BankB51Reg ),
                                 .Data52Reg( BankB52Reg ),
                                 .Data53Reg( BankB53Reg ),
                                 .Data54Reg( BankB54Reg ),
                                 .Data55Reg( BankB55Reg ),
                                 .Data56Reg( BankB56Reg ),
                                 .Data57Reg( BankB57Reg ),
                                 .Data58Reg( BankB58Reg ),
                                 .Data59Reg( BankB59Reg ),
                                 .Data60Reg( BankB60Reg ),
                                 .Data61Reg( BankB61Reg ),
                                 .Data62Reg( BankB62Reg ),
                                 .Data63Reg( BankB63Reg )
                                 );
 
   assign      Data00Reg = (DataOutSel)?BankB00Reg:BankA00Reg;
   assign      Data01Reg = (DataOutSel)?BankB01Reg:BankA01Reg;
   assign      Data02Reg = (DataOutSel)?BankB02Reg:BankA02Reg;
   assign      Data03Reg = (DataOutSel)?BankB03Reg:BankA03Reg;
   assign      Data04Reg = (DataOutSel)?BankB04Reg:BankA04Reg;
   assign      Data05Reg = (DataOutSel)?BankB05Reg:BankA05Reg;
   assign      Data06Reg = (DataOutSel)?BankB06Reg:BankA06Reg;
   assign      Data07Reg = (DataOutSel)?BankB07Reg:BankA07Reg;
   assign      Data08Reg = (DataOutSel)?BankB08Reg:BankA08Reg;
   assign      Data09Reg = (DataOutSel)?BankB09Reg:BankA09Reg;
   assign      Data10Reg = (DataOutSel)?BankB10Reg:BankA10Reg;
   assign      Data11Reg = (DataOutSel)?BankB11Reg:BankA11Reg;
   assign      Data12Reg = (DataOutSel)?BankB12Reg:BankA12Reg;
   assign      Data13Reg = (DataOutSel)?BankB13Reg:BankA13Reg;
   assign      Data14Reg = (DataOutSel)?BankB14Reg:BankA14Reg;
   assign      Data15Reg = (DataOutSel)?BankB15Reg:BankA15Reg;
   assign      Data16Reg = (DataOutSel)?BankB16Reg:BankA16Reg;
   assign      Data17Reg = (DataOutSel)?BankB17Reg:BankA17Reg;
   assign      Data18Reg = (DataOutSel)?BankB18Reg:BankA18Reg;
   assign      Data19Reg = (DataOutSel)?BankB19Reg:BankA19Reg;
   assign      Data20Reg = (DataOutSel)?BankB20Reg:BankA20Reg;
   assign      Data21Reg = (DataOutSel)?BankB21Reg:BankA21Reg;
   assign      Data22Reg = (DataOutSel)?BankB22Reg:BankA22Reg;
   assign      Data23Reg = (DataOutSel)?BankB23Reg:BankA23Reg;
   assign      Data24Reg = (DataOutSel)?BankB24Reg:BankA24Reg;
   assign      Data25Reg = (DataOutSel)?BankB25Reg:BankA25Reg;
   assign      Data26Reg = (DataOutSel)?BankB26Reg:BankA26Reg;
   assign      Data27Reg = (DataOutSel)?BankB27Reg:BankA27Reg;
   assign      Data28Reg = (DataOutSel)?BankB28Reg:BankA28Reg;
   assign      Data29Reg = (DataOutSel)?BankB29Reg:BankA29Reg;
   assign      Data30Reg = (DataOutSel)?BankB30Reg:BankA30Reg;
   assign      Data31Reg = (DataOutSel)?BankB31Reg:BankA31Reg;
   assign      Data32Reg = (DataOutSel)?BankB32Reg:BankA32Reg;
   assign      Data33Reg = (DataOutSel)?BankB33Reg:BankA33Reg;
   assign      Data34Reg = (DataOutSel)?BankB34Reg:BankA34Reg;
   assign      Data35Reg = (DataOutSel)?BankB35Reg:BankA35Reg;
   assign      Data36Reg = (DataOutSel)?BankB36Reg:BankA36Reg;
   assign      Data37Reg = (DataOutSel)?BankB37Reg:BankA37Reg;
   assign      Data38Reg = (DataOutSel)?BankB38Reg:BankA38Reg;
   assign      Data39Reg = (DataOutSel)?BankB39Reg:BankA39Reg;
   assign      Data40Reg = (DataOutSel)?BankB40Reg:BankA40Reg;
   assign      Data41Reg = (DataOutSel)?BankB41Reg:BankA41Reg;
   assign      Data42Reg = (DataOutSel)?BankB42Reg:BankA42Reg;
   assign      Data43Reg = (DataOutSel)?BankB43Reg:BankA43Reg;
   assign      Data44Reg = (DataOutSel)?BankB44Reg:BankA44Reg;
   assign      Data45Reg = (DataOutSel)?BankB45Reg:BankA45Reg;
   assign      Data46Reg = (DataOutSel)?BankB46Reg:BankA46Reg;
   assign      Data47Reg = (DataOutSel)?BankB47Reg:BankA47Reg;
   assign      Data48Reg = (DataOutSel)?BankB48Reg:BankA48Reg;
   assign      Data49Reg = (DataOutSel)?BankB49Reg:BankA49Reg;
   assign      Data50Reg = (DataOutSel)?BankB50Reg:BankA50Reg;
   assign      Data51Reg = (DataOutSel)?BankB51Reg:BankA51Reg;
   assign      Data52Reg = (DataOutSel)?BankB52Reg:BankA52Reg;
   assign      Data53Reg = (DataOutSel)?BankB53Reg:BankA53Reg;
   assign      Data54Reg = (DataOutSel)?BankB54Reg:BankA54Reg;
   assign      Data55Reg = (DataOutSel)?BankB55Reg:BankA55Reg;
   assign      Data56Reg = (DataOutSel)?BankB56Reg:BankA56Reg;
   assign      Data57Reg = (DataOutSel)?BankB57Reg:BankA57Reg;
   assign      Data58Reg = (DataOutSel)?BankB58Reg:BankA58Reg;
   assign      Data59Reg = (DataOutSel)?BankB59Reg:BankA59Reg;
   assign      Data60Reg = (DataOutSel)?BankB60Reg:BankA60Reg;
   assign      Data61Reg = (DataOutSel)?BankB61Reg:BankA61Reg;
   assign      Data62Reg = (DataOutSel)?BankB62Reg:BankA62Reg;
   assign      Data63Reg = (DataOutSel)?BankB63Reg:BankA63Reg;
 
endmodule // jpeg_ziguzagu

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[/] [djpeg/] [trunk/] [src/] [jpeg_ziguzagu.v] - Blame information for rev 3

Line No.	Rev	Author	Line
1	3	hidemi	`//---------------------------------------------------------------------------`
2			`// File Name : jpeg_ziguzagu.v`
3			`// Module Name : jpeg_ziguzagu`
4			`// Description : Ziguzagu`
5			`// Project : JPEG Decoder`
6			`// Belong to :`
7			`// Author : H.Ishihara`
8			`// E-Mail : hidemi@sweetcafe.jp`
9			`// HomePage : http://www.sweetcafe.jp/`
10			`// Date : 2006/10/01`
11			`// Rev. : 1.1`
12			`//---------------------------------------------------------------------------`
13			`// Rev. Date Description`
14			`//---------------------------------------------------------------------------`
15			`// 1.01 2006/10/01 1st Release`
16			`//---------------------------------------------------------------------------`
17			`// $Id:`
18			`//---------------------------------------------------------------------------`
19			`timescale 1ps / 1ps
20
21			`module jpeg_ziguzagu`
22			`(`
23			`rst,`
24			`clk,`
25
26			`DataInEnable,`
27			`DataInAddress,`
28			`DataInColor,`
29			`DataInIdle,`
30			`DataIn,`
31
32			`HaffumanEndEnable,`
33
34			`DataOutEnable,`
35			`DataOutColor,`
36			`DataOutSel,`
37			`Data00Reg,`
38			`Data01Reg,`
39			`Data02Reg,`
40			`Data03Reg,`
41			`Data04Reg,`
42			`Data05Reg,`
43			`Data06Reg,`
44			`Data07Reg,`
45			`Data08Reg,`
46			`Data09Reg,`
47			`Data10Reg,`
48			`Data11Reg,`
49			`Data12Reg,`
50			`Data13Reg,`
51			`Data14Reg,`
52			`Data15Reg,`
53			`Data16Reg,`
54			`Data17Reg,`
55			`Data18Reg,`
56			`Data19Reg,`
57			`Data20Reg,`
58			`Data21Reg,`
59			`Data22Reg,`
60			`Data23Reg,`
61			`Data24Reg,`
62			`Data25Reg,`
63			`Data26Reg,`
64			`Data27Reg,`
65			`Data28Reg,`
66			`Data29Reg,`
67			`Data30Reg,`
68			`Data31Reg,`
69			`Data32Reg,`
70			`Data33Reg,`
71			`Data34Reg,`
72			`Data35Reg,`
73			`Data36Reg,`
74			`Data37Reg,`
75			`Data38Reg,`
76			`Data39Reg,`
77			`Data40Reg,`
78			`Data41Reg,`
79			`Data42Reg,`
80			`Data43Reg,`
81			`Data44Reg,`
82			`Data45Reg,`
83			`Data46Reg,`
84			`Data47Reg,`
85			`Data48Reg,`
86			`Data49Reg,`
87			`Data50Reg,`
88			`Data51Reg,`
89			`Data52Reg,`
90			`Data53Reg,`
91			`Data54Reg,`
92			`Data55Reg,`
93			`Data56Reg,`
94			`Data57Reg,`
95			`Data58Reg,`
96			`Data59Reg,`
97			`Data60Reg,`
98			`Data61Reg,`
99			`Data62Reg,`
100			`Data63Reg,`
101
102			`BankARelease,`
103			`BankBRelease`
104			`);`
105
106			`input clk;`
107			`input rst;`
108
109			`input DataInEnable;`
110			`input [5:0] DataInAddress;`
111			`input [2:0] DataInColor;`
112			`output DataInIdle;`
113			`input [15:0] DataIn;`
114
115			`input HaffumanEndEnable;`
116
117			`output DataOutEnable;`
118			`output [2:0] DataOutColor;`
119			`input DataOutSel;`
120			`output [15:0] Data00Reg;`
121			`output [15:0] Data01Reg;`
122			`output [15:0] Data02Reg;`
123			`output [15:0] Data03Reg;`
124			`output [15:0] Data04Reg;`
125			`output [15:0] Data05Reg;`
126			`output [15:0] Data06Reg;`
127			`output [15:0] Data07Reg;`
128			`output [15:0] Data08Reg;`
129			`output [15:0] Data09Reg;`
130			`output [15:0] Data10Reg;`
131			`output [15:0] Data11Reg;`
132			`output [15:0] Data12Reg;`
133			`output [15:0] Data13Reg;`
134			`output [15:0] Data14Reg;`
135			`output [15:0] Data15Reg;`
136			`output [15:0] Data16Reg;`
137			`output [15:0] Data17Reg;`
138			`output [15:0] Data18Reg;`
139			`output [15:0] Data19Reg;`
140			`output [15:0] Data20Reg;`
141			`output [15:0] Data21Reg;`
142			`output [15:0] Data22Reg;`
143			`output [15:0] Data23Reg;`
144			`output [15:0] Data24Reg;`
145			`output [15:0] Data25Reg;`
146			`output [15:0] Data26Reg;`
147			`output [15:0] Data27Reg;`
148			`output [15:0] Data28Reg;`
149			`output [15:0] Data29Reg;`
150			`output [15:0] Data30Reg;`
151			`output [15:0] Data31Reg;`
152			`output [15:0] Data32Reg;`
153			`output [15:0] Data33Reg;`
154			`output [15:0] Data34Reg;`
155			`output [15:0] Data35Reg;`
156			`output [15:0] Data36Reg;`
157			`output [15:0] Data37Reg;`
158			`output [15:0] Data38Reg;`
159			`output [15:0] Data39Reg;`
160			`output [15:0] Data40Reg;`
161			`output [15:0] Data41Reg;`
162			`output [15:0] Data42Reg;`
163			`output [15:0] Data43Reg;`
164			`output [15:0] Data44Reg;`
165			`output [15:0] Data45Reg;`
166			`output [15:0] Data46Reg;`
167			`output [15:0] Data47Reg;`
168			`output [15:0] Data48Reg;`
169			`output [15:0] Data49Reg;`
170			`output [15:0] Data50Reg;`
171			`output [15:0] Data51Reg;`
172			`output [15:0] Data52Reg;`
173			`output [15:0] Data53Reg;`
174			`output [15:0] Data54Reg;`
175			`output [15:0] Data55Reg;`
176			`output [15:0] Data56Reg;`
177			`output [15:0] Data57Reg;`
178			`output [15:0] Data58Reg;`
179			`output [15:0] Data59Reg;`
180			`output [15:0] Data60Reg;`
181			`output [15:0] Data61Reg;`
182			`output [15:0] Data62Reg;`
183			`output [15:0] Data63Reg;`
184			`input BankARelease;`
185			`input BankBRelease;`
186
187			`reg BankAEnable;`
188			`reg BankBEnable;`
189			`reg DataInBank;`
190
191			`reg [2:0] BankAColor;`
192			`reg [2:0] BankBColor;`
193
194			`always @(posedge clk or negedge rst) begin`
195			`if(!rst) begin`
196			`BankAEnable <= 1'b0;`
197			`BankBEnable <= 1'b0;`
198			`BankAColor <= 3'b000;`
199			`BankBColor <= 3'b000;`
200			`DataInBank <= 1'b0;`
201			`end else begin`
202			`if(BankAEnable == 1'b0 & DataInBank == 1'b0) begin`
203			`if(HaffumanEndEnable == 1'b1 & DataInIdle == 1'b1) begin`
204			`BankAEnable <= 1'b1;`
205			`BankAColor <= DataInColor;`
206			`end`
207			`end else begin`
208			`if(BankARelease == 1'b1) begin`
209			`BankAEnable <= 1'b0;`
210			`end`
211			`end`
212			`if(BankBEnable == 1'b0 & DataInBank == 1'b1) begin`
213			`if(HaffumanEndEnable == 1'b1 & DataInIdle == 1'b1) begin`
214			`BankBEnable <= 1'b1;`
215			`BankBColor <= DataInColor;`
216			`end`
217			`end else begin`
218			`if(BankBRelease == 1'b1) begin`
219			`BankBEnable <= 1'b0;`
220			`end`
221			`end`
222			`if(HaffumanEndEnable == 1'b1) begin`
223			`DataInBank <= ~DataInBank;`
224			`end`
225			`end // else: !if(!rst)`
226			`end // always @ (posedge clk or negedge rst)`
227
228			`assign DataInIdle = BankAEnable == 1'b0 \| BankBEnable == 1'b0;`
229			`assign DataOutEnable = BankAEnable == 1'b1 \| BankBEnable == 1'b1;`
230			`assign DataOutColor = (DataInBank)?BankBColor:BankAColor;`
231
232			`wire ZigAEnable;`
233			`wire ZigBEnable;`
234
235			`wire [15:0] BankA00Reg;`
236			`wire [15:0] BankA01Reg;`
237			`wire [15:0] BankA02Reg;`
238			`wire [15:0] BankA03Reg;`
239			`wire [15:0] BankA04Reg;`
240			`wire [15:0] BankA05Reg;`
241			`wire [15:0] BankA06Reg;`
242			`wire [15:0] BankA07Reg;`
243			`wire [15:0] BankA08Reg;`
244			`wire [15:0] BankA09Reg;`
245			`wire [15:0] BankA10Reg;`
246			`wire [15:0] BankA11Reg;`
247			`wire [15:0] BankA12Reg;`
248			`wire [15:0] BankA13Reg;`
249			`wire [15:0] BankA14Reg;`
250			`wire [15:0] BankA15Reg;`
251			`wire [15:0] BankA16Reg;`
252			`wire [15:0] BankA17Reg;`
253			`wire [15:0] BankA18Reg;`
254			`wire [15:0] BankA19Reg;`
255			`wire [15:0] BankA20Reg;`
256			`wire [15:0] BankA21Reg;`
257			`wire [15:0] BankA22Reg;`
258			`wire [15:0] BankA23Reg;`
259			`wire [15:0] BankA24Reg;`
260			`wire [15:0] BankA25Reg;`
261			`wire [15:0] BankA26Reg;`
262			`wire [15:0] BankA27Reg;`
263			`wire [15:0] BankA28Reg;`
264			`wire [15:0] BankA29Reg;`
265			`wire [15:0] BankA30Reg;`
266			`wire [15:0] BankA31Reg;`
267			`wire [15:0] BankA32Reg;`
268			`wire [15:0] BankA33Reg;`
269			`wire [15:0] BankA34Reg;`
270			`wire [15:0] BankA35Reg;`
271			`wire [15:0] BankA36Reg;`
272			`wire [15:0] BankA37Reg;`
273			`wire [15:0] BankA38Reg;`
274			`wire [15:0] BankA39Reg;`
275			`wire [15:0] BankA40Reg;`
276			`wire [15:0] BankA41Reg;`
277			`wire [15:0] BankA42Reg;`
278			`wire [15:0] BankA43Reg;`
279			`wire [15:0] BankA44Reg;`
280			`wire [15:0] BankA45Reg;`
281			`wire [15:0] BankA46Reg;`
282			`wire [15:0] BankA47Reg;`
283			`wire [15:0] BankA48Reg;`
284			`wire [15:0] BankA49Reg;`
285			`wire [15:0] BankA50Reg;`
286			`wire [15:0] BankA51Reg;`
287			`wire [15:0] BankA52Reg;`
288			`wire [15:0] BankA53Reg;`
289			`wire [15:0] BankA54Reg;`
290			`wire [15:0] BankA55Reg;`
291			`wire [15:0] BankA56Reg;`
292			`wire [15:0] BankA57Reg;`
293			`wire [15:0] BankA58Reg;`
294			`wire [15:0] BankA59Reg;`
295			`wire [15:0] BankA60Reg;`
296			`wire [15:0] BankA61Reg;`
297			`wire [15:0] BankA62Reg;`
298			`wire [15:0] BankA63Reg;`
299
300			`wire [15:0] BankB00Reg;`
301			`wire [15:0] BankB01Reg;`
302			`wire [15:0] BankB02Reg;`
303			`wire [15:0] BankB03Reg;`
304			`wire [15:0] BankB04Reg;`
305			`wire [15:0] BankB05Reg;`
306			`wire [15:0] BankB06Reg;`
307			`wire [15:0] BankB07Reg;`
308			`wire [15:0] BankB08Reg;`
309			`wire [15:0] BankB09Reg;`
310			`wire [15:0] BankB10Reg;`
311			`wire [15:0] BankB11Reg;`
312			`wire [15:0] BankB12Reg;`
313			`wire [15:0] BankB13Reg;`
314			`wire [15:0] BankB14Reg;`
315			`wire [15:0] BankB15Reg;`
316			`wire [15:0] BankB16Reg;`
317			`wire [15:0] BankB17Reg;`
318			`wire [15:0] BankB18Reg;`
319			`wire [15:0] BankB19Reg;`
320			`wire [15:0] BankB20Reg;`
321			`wire [15:0] BankB21Reg;`
322			`wire [15:0] BankB22Reg;`
323			`wire [15:0] BankB23Reg;`
324			`wire [15:0] BankB24Reg;`
325			`wire [15:0] BankB25Reg;`
326			`wire [15:0] BankB26Reg;`
327			`wire [15:0] BankB27Reg;`
328			`wire [15:0] BankB28Reg;`
329			`wire [15:0] BankB29Reg;`
330			`wire [15:0] BankB30Reg;`
331			`wire [15:0] BankB31Reg;`
332			`wire [15:0] BankB32Reg;`
333			`wire [15:0] BankB33Reg;`
334			`wire [15:0] BankB34Reg;`
335			`wire [15:0] BankB35Reg;`
336			`wire [15:0] BankB36Reg;`
337			`wire [15:0] BankB37Reg;`
338			`wire [15:0] BankB38Reg;`
339			`wire [15:0] BankB39Reg;`
340			`wire [15:0] BankB40Reg;`
341			`wire [15:0] BankB41Reg;`
342			`wire [15:0] BankB42Reg;`
343			`wire [15:0] BankB43Reg;`
344			`wire [15:0] BankB44Reg;`
345			`wire [15:0] BankB45Reg;`
346			`wire [15:0] BankB46Reg;`
347			`wire [15:0] BankB47Reg;`
348			`wire [15:0] BankB48Reg;`
349			`wire [15:0] BankB49Reg;`
350			`wire [15:0] BankB50Reg;`
351			`wire [15:0] BankB51Reg;`
352			`wire [15:0] BankB52Reg;`
353			`wire [15:0] BankB53Reg;`
354			`wire [15:0] BankB54Reg;`
355			`wire [15:0] BankB55Reg;`
356			`wire [15:0] BankB56Reg;`
357			`wire [15:0] BankB57Reg;`
358			`wire [15:0] BankB58Reg;`
359			`wire [15:0] BankB59Reg;`
360			`wire [15:0] BankB60Reg;`
361			`wire [15:0] BankB61Reg;`
362			`wire [15:0] BankB62Reg;`
363			`wire [15:0] BankB63Reg;`
364
365			`assign ZigAEnable = DataInEnable == 1'b1 & DataInBank == 1'b0;`
366			`assign ZigBEnable = DataInEnable == 1'b1 & DataInBank == 1'b1;`
367
368			`jpeg_ziguzagu_reg u_jpeg_ziguzagu_reg0(`
369			`.rst(rst),`
370			`.clk(clk),`
371
372			`.DataInEnable ( ZigAEnable ),`
373			`.DataInAddress ( DataInAddress ),`
374			`.DataIn ( DataIn ),`
375
376			`.Data00Reg( BankA00Reg ),`
377			`.Data01Reg( BankA01Reg ),`
378			`.Data02Reg( BankA02Reg ),`
379			`.Data03Reg( BankA03Reg ),`
380			`.Data04Reg( BankA04Reg ),`
381			`.Data05Reg( BankA05Reg ),`
382			`.Data06Reg( BankA06Reg ),`
383			`.Data07Reg( BankA07Reg ),`
384			`.Data08Reg( BankA08Reg ),`
385			`.Data09Reg( BankA09Reg ),`
386			`.Data10Reg( BankA10Reg ),`
387			`.Data11Reg( BankA11Reg ),`
388			`.Data12Reg( BankA12Reg ),`
389			`.Data13Reg( BankA13Reg ),`
390			`.Data14Reg( BankA14Reg ),`
391			`.Data15Reg( BankA15Reg ),`
392			`.Data16Reg( BankA16Reg ),`
393			`.Data17Reg( BankA17Reg ),`
394			`.Data18Reg( BankA18Reg ),`
395			`.Data19Reg( BankA19Reg ),`
396			`.Data20Reg( BankA20Reg ),`
397			`.Data21Reg( BankA21Reg ),`
398			`.Data22Reg( BankA22Reg ),`
399			`.Data23Reg( BankA23Reg ),`
400			`.Data24Reg( BankA24Reg ),`
401			`.Data25Reg( BankA25Reg ),`
402			`.Data26Reg( BankA26Reg ),`
403			`.Data27Reg( BankA27Reg ),`
404			`.Data28Reg( BankA28Reg ),`
405			`.Data29Reg( BankA29Reg ),`
406			`.Data30Reg( BankA30Reg ),`
407			`.Data31Reg( BankA31Reg ),`
408			`.Data32Reg( BankA32Reg ),`
409			`.Data33Reg( BankA33Reg ),`
410			`.Data34Reg( BankA34Reg ),`
411			`.Data35Reg( BankA35Reg ),`
412			`.Data36Reg( BankA36Reg ),`
413			`.Data37Reg( BankA37Reg ),`
414			`.Data38Reg( BankA38Reg ),`
415			`.Data39Reg( BankA39Reg ),`
416			`.Data40Reg( BankA40Reg ),`
417			`.Data41Reg( BankA41Reg ),`
418			`.Data42Reg( BankA42Reg ),`
419			`.Data43Reg( BankA43Reg ),`
420			`.Data44Reg( BankA44Reg ),`
421			`.Data45Reg( BankA45Reg ),`
422			`.Data46Reg( BankA46Reg ),`
423			`.Data47Reg( BankA47Reg ),`
424			`.Data48Reg( BankA48Reg ),`
425			`.Data49Reg( BankA49Reg ),`
426			`.Data50Reg( BankA50Reg ),`
427			`.Data51Reg( BankA51Reg ),`
428			`.Data52Reg( BankA52Reg ),`
429			`.Data53Reg( BankA53Reg ),`
430			`.Data54Reg( BankA54Reg ),`
431			`.Data55Reg( BankA55Reg ),`
432			`.Data56Reg( BankA56Reg ),`
433			`.Data57Reg( BankA57Reg ),`
434			`.Data58Reg( BankA58Reg ),`
435			`.Data59Reg( BankA59Reg ),`
436			`.Data60Reg( BankA60Reg ),`
437			`.Data61Reg( BankA61Reg ),`
438			`.Data62Reg( BankA62Reg ),`
439			`.Data63Reg( BankA63Reg )`
440			`);`
441
442			`jpeg_ziguzagu_reg u_jpeg_ziguzagu_reg1(`
443			`.rst(rst),`
444			`.clk(clk),`
445
446			`.DataInEnable ( ZigBEnable ),`
447			`.DataInAddress ( DataInAddress ),`
448			`.DataIn ( DataIn ),`
449
450			`.Data00Reg( BankB00Reg ),`
451			`.Data01Reg( BankB01Reg ),`
452			`.Data02Reg( BankB02Reg ),`
453			`.Data03Reg( BankB03Reg ),`
454			`.Data04Reg( BankB04Reg ),`
455			`.Data05Reg( BankB05Reg ),`
456			`.Data06Reg( BankB06Reg ),`
457			`.Data07Reg( BankB07Reg ),`
458			`.Data08Reg( BankB08Reg ),`
459			`.Data09Reg( BankB09Reg ),`
460			`.Data10Reg( BankB10Reg ),`
461			`.Data11Reg( BankB11Reg ),`
462			`.Data12Reg( BankB12Reg ),`
463			`.Data13Reg( BankB13Reg ),`
464			`.Data14Reg( BankB14Reg ),`
465			`.Data15Reg( BankB15Reg ),`
466			`.Data16Reg( BankB16Reg ),`
467			`.Data17Reg( BankB17Reg ),`
468			`.Data18Reg( BankB18Reg ),`
469			`.Data19Reg( BankB19Reg ),`
470			`.Data20Reg( BankB20Reg ),`
471			`.Data21Reg( BankB21Reg ),`
472			`.Data22Reg( BankB22Reg ),`
473			`.Data23Reg( BankB23Reg ),`
474			`.Data24Reg( BankB24Reg ),`
475			`.Data25Reg( BankB25Reg ),`
476			`.Data26Reg( BankB26Reg ),`
477			`.Data27Reg( BankB27Reg ),`
478			`.Data28Reg( BankB28Reg ),`
479			`.Data29Reg( BankB29Reg ),`
480			`.Data30Reg( BankB30Reg ),`
481			`.Data31Reg( BankB31Reg ),`
482			`.Data32Reg( BankB32Reg ),`
483			`.Data33Reg( BankB33Reg ),`
484			`.Data34Reg( BankB34Reg ),`
485			`.Data35Reg( BankB35Reg ),`
486			`.Data36Reg( BankB36Reg ),`
487			`.Data37Reg( BankB37Reg ),`
488			`.Data38Reg( BankB38Reg ),`
489			`.Data39Reg( BankB39Reg ),`
490			`.Data40Reg( BankB40Reg ),`
491			`.Data41Reg( BankB41Reg ),`
492			`.Data42Reg( BankB42Reg ),`
493			`.Data43Reg( BankB43Reg ),`
494			`.Data44Reg( BankB44Reg ),`
495			`.Data45Reg( BankB45Reg ),`
496			`.Data46Reg( BankB46Reg ),`
497			`.Data47Reg( BankB47Reg ),`
498			`.Data48Reg( BankB48Reg ),`
499			`.Data49Reg( BankB49Reg ),`
500			`.Data50Reg( BankB50Reg ),`
501			`.Data51Reg( BankB51Reg ),`
502			`.Data52Reg( BankB52Reg ),`
503			`.Data53Reg( BankB53Reg ),`
504			`.Data54Reg( BankB54Reg ),`
505			`.Data55Reg( BankB55Reg ),`
506			`.Data56Reg( BankB56Reg ),`
507			`.Data57Reg( BankB57Reg ),`
508			`.Data58Reg( BankB58Reg ),`
509			`.Data59Reg( BankB59Reg ),`
510			`.Data60Reg( BankB60Reg ),`
511			`.Data61Reg( BankB61Reg ),`
512			`.Data62Reg( BankB62Reg ),`
513			`.Data63Reg( BankB63Reg )`
514			`);`
515
516			`assign Data00Reg = (DataOutSel)?BankB00Reg:BankA00Reg;`
517			`assign Data01Reg = (DataOutSel)?BankB01Reg:BankA01Reg;`
518			`assign Data02Reg = (DataOutSel)?BankB02Reg:BankA02Reg;`
519			`assign Data03Reg = (DataOutSel)?BankB03Reg:BankA03Reg;`
520			`assign Data04Reg = (DataOutSel)?BankB04Reg:BankA04Reg;`
521			`assign Data05Reg = (DataOutSel)?BankB05Reg:BankA05Reg;`
522			`assign Data06Reg = (DataOutSel)?BankB06Reg:BankA06Reg;`
523			`assign Data07Reg = (DataOutSel)?BankB07Reg:BankA07Reg;`
524			`assign Data08Reg = (DataOutSel)?BankB08Reg:BankA08Reg;`
525			`assign Data09Reg = (DataOutSel)?BankB09Reg:BankA09Reg;`
526			`assign Data10Reg = (DataOutSel)?BankB10Reg:BankA10Reg;`
527			`assign Data11Reg = (DataOutSel)?BankB11Reg:BankA11Reg;`
528			`assign Data12Reg = (DataOutSel)?BankB12Reg:BankA12Reg;`
529			`assign Data13Reg = (DataOutSel)?BankB13Reg:BankA13Reg;`
530			`assign Data14Reg = (DataOutSel)?BankB14Reg:BankA14Reg;`
531			`assign Data15Reg = (DataOutSel)?BankB15Reg:BankA15Reg;`
532			`assign Data16Reg = (DataOutSel)?BankB16Reg:BankA16Reg;`
533			`assign Data17Reg = (DataOutSel)?BankB17Reg:BankA17Reg;`
534			`assign Data18Reg = (DataOutSel)?BankB18Reg:BankA18Reg;`
535			`assign Data19Reg = (DataOutSel)?BankB19Reg:BankA19Reg;`
536			`assign Data20Reg = (DataOutSel)?BankB20Reg:BankA20Reg;`
537			`assign Data21Reg = (DataOutSel)?BankB21Reg:BankA21Reg;`
538			`assign Data22Reg = (DataOutSel)?BankB22Reg:BankA22Reg;`
539			`assign Data23Reg = (DataOutSel)?BankB23Reg:BankA23Reg;`
540			`assign Data24Reg = (DataOutSel)?BankB24Reg:BankA24Reg;`
541			`assign Data25Reg = (DataOutSel)?BankB25Reg:BankA25Reg;`
542			`assign Data26Reg = (DataOutSel)?BankB26Reg:BankA26Reg;`
543			`assign Data27Reg = (DataOutSel)?BankB27Reg:BankA27Reg;`
544			`assign Data28Reg = (DataOutSel)?BankB28Reg:BankA28Reg;`
545			`assign Data29Reg = (DataOutSel)?BankB29Reg:BankA29Reg;`
546			`assign Data30Reg = (DataOutSel)?BankB30Reg:BankA30Reg;`
547			`assign Data31Reg = (DataOutSel)?BankB31Reg:BankA31Reg;`
548			`assign Data32Reg = (DataOutSel)?BankB32Reg:BankA32Reg;`
549			`assign Data33Reg = (DataOutSel)?BankB33Reg:BankA33Reg;`
550			`assign Data34Reg = (DataOutSel)?BankB34Reg:BankA34Reg;`
551			`assign Data35Reg = (DataOutSel)?BankB35Reg:BankA35Reg;`
552			`assign Data36Reg = (DataOutSel)?BankB36Reg:BankA36Reg;`
553			`assign Data37Reg = (DataOutSel)?BankB37Reg:BankA37Reg;`
554			`assign Data38Reg = (DataOutSel)?BankB38Reg:BankA38Reg;`
555			`assign Data39Reg = (DataOutSel)?BankB39Reg:BankA39Reg;`
556			`assign Data40Reg = (DataOutSel)?BankB40Reg:BankA40Reg;`
557			`assign Data41Reg = (DataOutSel)?BankB41Reg:BankA41Reg;`
558			`assign Data42Reg = (DataOutSel)?BankB42Reg:BankA42Reg;`
559			`assign Data43Reg = (DataOutSel)?BankB43Reg:BankA43Reg;`
560			`assign Data44Reg = (DataOutSel)?BankB44Reg:BankA44Reg;`
561			`assign Data45Reg = (DataOutSel)?BankB45Reg:BankA45Reg;`
562			`assign Data46Reg = (DataOutSel)?BankB46Reg:BankA46Reg;`
563			`assign Data47Reg = (DataOutSel)?BankB47Reg:BankA47Reg;`
564			`assign Data48Reg = (DataOutSel)?BankB48Reg:BankA48Reg;`
565			`assign Data49Reg = (DataOutSel)?BankB49Reg:BankA49Reg;`
566			`assign Data50Reg = (DataOutSel)?BankB50Reg:BankA50Reg;`
567			`assign Data51Reg = (DataOutSel)?BankB51Reg:BankA51Reg;`
568			`assign Data52Reg = (DataOutSel)?BankB52Reg:BankA52Reg;`
569			`assign Data53Reg = (DataOutSel)?BankB53Reg:BankA53Reg;`
570			`assign Data54Reg = (DataOutSel)?BankB54Reg:BankA54Reg;`
571			`assign Data55Reg = (DataOutSel)?BankB55Reg:BankA55Reg;`
572			`assign Data56Reg = (DataOutSel)?BankB56Reg:BankA56Reg;`
573			`assign Data57Reg = (DataOutSel)?BankB57Reg:BankA57Reg;`
574			`assign Data58Reg = (DataOutSel)?BankB58Reg:BankA58Reg;`
575			`assign Data59Reg = (DataOutSel)?BankB59Reg:BankA59Reg;`
576			`assign Data60Reg = (DataOutSel)?BankB60Reg:BankA60Reg;`
577			`assign Data61Reg = (DataOutSel)?BankB61Reg:BankA61Reg;`
578			`assign Data62Reg = (DataOutSel)?BankB62Reg:BankA62Reg;`
579			`assign Data63Reg = (DataOutSel)?BankB63Reg:BankA63Reg;`
580
581			`endmodule // jpeg_ziguzagu`