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1 26 dannori
DMT Transceiver Project
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July 11th, 2010
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I started out this project as a very general idea to develop hardware
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description of core parts for an ADSL modem. At that time I started out
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with Verilog as HDL.
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The Constellation Encoder is a first product of this.
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Now I am more specific and my goal is to create the Central Office side
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(ATU-C) of an ADSL modem. The reason for that is that ADSL has been
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widely used and the customer side modems (ATU-R) are widespread. However
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Central Office side modems are only available as a whole DSLAM, with
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mini DSLAMs starting with at least a dozen lines. For home use there
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might be the interest to connect an old ADSL modem for a point-to-point
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connection and that is what this project could provide the hardware for.
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It is a slow pace project and as such will progress rather slow.
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For the HDL side I decided to switch to MyHDL (http://www.myhdl.org) My
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idea is to create convertible RTL code and self-checking testbenches in
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MyHDL. All MyHDL code will now go into the myhdl folder.
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File structure
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==============
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File structure is now as follows:
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.
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|-- const_encoder
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|   |-- doc
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|   |   `-- ConstSpec.pdf
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|   |-- Makefile
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|   |-- rtl
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|   |   |-- const_enc.v
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|   |   |-- defs.vh
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|   |   |-- fifo.v
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|   |   |-- generic_dpram.v
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|   |   `-- parameters.vh
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|   `-- tb
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|       |-- const_map_data.v
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|       |-- tb_const_enc.v
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|       `-- tb_fifo.v
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|-- gpl.txt
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`-- myhdl
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const_encoder:  Contains the old Verilog code for the Constellation
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                Encoder
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myhdl:          Contains the future MyHDL code

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