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[/] [dmt_tx/] [trunk/] [const_encoder/] [rtl/] [const_enc.v] - Blame information for rev 16

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Line No. Rev Author Line
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/* *****************************************************************
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 *
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 *  This file is part of the
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 *
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 *  Tone Order and Constellation Encoder Core.
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 *
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 *  Description:
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 *
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 *  The conste_enc module implements the tone ordering and
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 *  constellation encoding as described in ITU G.992.1
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 *
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 *********************************************************************
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 *  Copyright (C) 2007 Guenter Dannoritzer
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 *
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 *   This source is free software; you can redistribute it
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 *   and/or modify it under the terms of the
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 *             GNU General Public License
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 *   as published by the Free Software Foundation;
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 *   either version 3 of the License,
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 *   or (at your option) any later version.
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 *
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 *   This source is distributed in the hope
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 *   that it will be useful, but WITHOUT ANY WARRANTY;
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 *   without even the implied warranty of MERCHANTABILITY
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 *   or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *   GNU General Public License for more details.
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 *
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 *   You should have received a copy of the
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 *   GNU General Public License along with this source.
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 *   If not, see <http://www.gnu.org/licenses/>.
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 *
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 * *****************************************************************/
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module const_encoder(
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                clk,
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                reset,
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                fast_ready_o,
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                we_fast_data_i,
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                fast_data_i,
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                inter_ready_o,
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                we_inter_data_i,
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                inter_data_i,
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                addr_i,
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                we_conf_i,
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                conf_data_i,
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                xy_ready_o,
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                carrier_num_o,
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                x_o,
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                y_o);
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`include "parameters.vh"
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//
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// parameter
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// 
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input                 clk;
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input                 reset;
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output                fast_ready_o;
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input                 we_fast_data_i;
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input   [DW-1:0]      fast_data_i;
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output                inter_ready_o;
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input                 we_inter_data_i;
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input   [DW-1:0]      inter_data_i;
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input   [CONFAW-1:0]  addr_i;
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input                 we_conf_i;
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input   [CONFDW-1:0]  conf_data_i;
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output                xy_ready_o;
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output  [CNUMW-1:0]   carrier_num_o;
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output  [CONSTW-1:0]  x_o;
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output  [CONSTW-1:0]  y_o;
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//
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// local wire/regs
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//
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wire    [DW-1:0]      fast_data_o;
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wire    [DW-1:0]      inter_data_o;
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reg   [SHIFTW-1:0]    fast_shift_reg;
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reg   [SHIFTW-1:0]    inter_shift_reg;
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reg   [MAXBITNUM-1:0] const_input_reg;
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reg   [CONFDW-1:0]    BitLoading [0:TABLELEN-1];
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reg   [CONFDW-1:0]    CarrierNumber [0:TABLELEN-1];
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reg   [USEDCREGW-1:0] UsedCarrier;
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reg   [FBITSW-1:0]    FastBits;
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//
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// intantiate the fast path and interleaved path FIFOs
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//
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fifo  #(.AWIDTH(AW), .DWIDTH(DW))
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      fifo_fast ( .clk(clk),
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                  .reset(reset),
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                  .empty_o(fast_empty_o),
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                  .full_o(fast_full_o),
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                  .one_available_o(fast_one_available_o),
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                  .two_available_o(fast_two_available_o),
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                  .we_i(we_fast_i),
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                  .data_i(fast_data_i),
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                  .re_i(re_fast_i),
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                  .data_o(fast_data_o)
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                  );
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fifo  #(.AWIDTH(AW), .DWIDTH(DW))
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      fifo_inter ( .clk(clk),
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                  .reset(reset),
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                  .empty_o(inter_empty_o),
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                  .full_o(inter_full_o),
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                  .one_available_o(inter_one_available_o),
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                  .two_available_o(inter_two_available_o),
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                  .we_i(we_inter_i),
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                  .data_i(inter_data_i),
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                  .re_i(re_inter_i),
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                  .data_o(inter_data_o)
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                  );
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//
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// configuration register access
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//
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always @(posedge clk or posedge reset) begin
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  if(reset) begin
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    UsedCarrier <= 0;
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    FastBits <= 0;
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  end
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  else begin
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    UsedCarrier <= 1;
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  end
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end
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endmodule

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