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[/] [eco32/] [tags/] [eco32-0.22/] [monitor/] [monitor-digilent/] [asm.c] - Blame information for rev 279

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Line No. Rev Author Line
1 16 hellwig 
/*
2 
 * asm.c -- assembler
3 
 */
4 
 
5 
 
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#include "common.h"
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#include "stdarg.h"
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#include "romlib.h"
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#include "instr.h"
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#include "asm.h"
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#define MAX_TOKENS      10
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static char *msgs[] = {
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  /*  0 */  "too many tokens on line",
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  /*  1 */  "empty line",
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  /*  2 */  "unknown instruction name",
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  /*  3 */  "unknown instruction format",
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  /*  4 */  "excess tokens on line",
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  /*  5 */  "too few operands",
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  /*  6 */  "illegal register",
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  /*  7 */  "illegal immediate value",
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  /*  8 */  "immediate value out of range",
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  /*  9 */  "target is not aligned",
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  /* 10 */  "target cannot be reached"
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};
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static Bool asmReg(char *token, int *reg) {
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  char *end;
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  if (*token != '$') {
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    return false;
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  }
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  *reg = strtoul(token + 1, &end, 10);
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  if (*end != '\0') {
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    return false;
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  }
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  if (*reg < 0 || *reg >= 32) {
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    return false;
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  }
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  return true;
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}
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static Bool asmNum(char *token, unsigned int *val) {
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  char *end;
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  *val = strtoul(token, &end, 16);
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  return *end == '\0';
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}
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char *asmInstr(char *line, Word addr, Word *instrPtr) {
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  char *tokens[MAX_TOKENS];
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  int n;
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  char *p;
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  Instr *instr;
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  Word result;
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  int r1, r2, r3;
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  unsigned int uimm;
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  signed int simm;
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  /* separate tokens */
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  n = 0;
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  p = strtok(line, " \t\n,");
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  while (p != NULL) {
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    if (n == MAX_TOKENS) {
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      return msgs[0];
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    }
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    tokens[n++] = p;
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    p = strtok(NULL, " \t\n,");
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  }
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  if (n == 0) {
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    return msgs[1];
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  }
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  /* lookup mnemonic */
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  instr = lookupInstr(tokens[0]);
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  if (instr == NULL) {
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    return msgs[2];
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  }
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  /* do processing according to format */
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  switch (instr->format) {
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    case FORMAT_N:
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      /* no operands (but may get a constant operand) */
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      if (n > 2) {
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        return msgs[4];
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      }
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      if (n < 1) {
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        return msgs[5];
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      }
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      if (n == 2) {
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        if (!asmNum(tokens[1], &uimm)) {
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          return msgs[7];
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        }
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      } else {
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        uimm = 0;
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      }
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      result = ((Word) instr->opcode << 26) |
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               (uimm & MASK(26));
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      break;
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    case FORMAT_RH:
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      /* one register and a half operand */
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      if (n > 3) {
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        return msgs[4];
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      }
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      if (n < 3) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmNum(tokens[2], &uimm)) {
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        return msgs[7];
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      }
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      if (uimm >= (unsigned) (1 << 16)) {
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        return msgs[8];
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      }
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      result = ((Word) instr->opcode << 26) |
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               (r1 << 16) |
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               (uimm & MASK(16));
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      break;
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    case FORMAT_RHH:
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      /* one register and a half operand */
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      /* ATTENTION: high-order 16 bits encoded */
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      if (n > 3) {
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        return msgs[4];
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      }
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      if (n < 3) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmNum(tokens[2], &uimm)) {
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        return msgs[7];
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      }
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      uimm >>= 16;
141 
      if (uimm >= (unsigned) (1 << 16)) {
142 
        return msgs[8];
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      }
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      result = ((Word) instr->opcode << 26) |
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               (r1 << 16) |
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               (uimm & MASK(16));
147 
      break;
148 
    case FORMAT_RRH:
149 
      /* two registers and a half operand */
150 
      if (n > 4) {
151 
        return msgs[4];
152 
      }
153 
      if (n < 4) {
154 
        return msgs[5];
155 
      }
156 
      if (!asmReg(tokens[1], &r1)) {
157 
        return msgs[6];
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      }
159 
      if (!asmReg(tokens[2], &r2)) {
160 
        return msgs[6];
161 
      }
162 
      if (!asmNum(tokens[3], &uimm)) {
163 
        return msgs[7];
164 
      }
165 
      if (uimm >= (unsigned) (1 << 16)) {
166 
        return msgs[8];
167 
      }
168 
      result = ((Word) instr->opcode << 26) |
169 
               (r2 << 21) |
170 
               (r1 << 16) |
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               (uimm & MASK(16));
172 
      break;
173 
    case FORMAT_RRS:
174 
      /* two registers and a signed half operand */
175 
      if (n > 4) {
176 
        return msgs[4];
177 
      }
178 
      if (n < 4) {
179 
        return msgs[5];
180 
      }
181 
      if (!asmReg(tokens[1], &r1)) {
182 
        return msgs[6];
183 
      }
184 
      if (!asmReg(tokens[2], &r2)) {
185 
        return msgs[6];
186 
      }
187 
      if (!asmNum(tokens[3], (unsigned int *) &simm)) {
188 
        return msgs[7];
189 
      }
190 
      if (simm >= (signed) (1 << 15) ||
191 
          simm < - (signed) (1 << 15)) {
192 
        return msgs[8];
193 
      }
194 
      result = ((Word) instr->opcode << 26) |
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               (r2 << 21) |
196 
               (r1 << 16) |
197 
               (simm & MASK(16));
198 
      break;
199 
    case FORMAT_RRR:
200 
      /* three register operands */
201 
      if (n > 4) {
202 
        return msgs[4];
203 
      }
204 
      if (n < 4) {
205 
        return msgs[5];
206 
      }
207 
      if (!asmReg(tokens[1], &r1)) {
208 
        return msgs[6];
209 
      }
210 
      if (!asmReg(tokens[2], &r2)) {
211 
        return msgs[6];
212 
      }
213 
      if (!asmReg(tokens[3], &r3)) {
214 
        return msgs[6];
215 
      }
216 
      result = ((Word) instr->opcode << 26) |
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               (r2 << 21) |
218 
               (r3 << 16) |
219 
               (r1 << 11);
220 
      break;
221 
    case FORMAT_RRX:
222 
      /* either FORMAT_RRR or FORMAT_RRH */
223 
      if (n > 4) {
224 
        return msgs[4];
225 
      }
226 
      if (n < 4) {
227 
        return msgs[5];
228 
      }
229 
      if (!asmReg(tokens[1], &r1)) {
230 
        return msgs[6];
231 
      }
232 
      if (!asmReg(tokens[2], &r2)) {
233 
        return msgs[6];
234 
      }
235 
      if (*tokens[3] == '$') {
236 
        /* FORMAT_RRR */
237 
        if (!asmReg(tokens[3], &r3)) {
238 
          return msgs[6];
239 
        }
240 
        result = ((Word) instr->opcode << 26) |
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                 (r2 << 21) |
242 
                 (r3 << 16) |
243 
                 (r1 << 11);
244 
      } else {
245 
        /* FORMAT_RRH */
246 
        if (!asmNum(tokens[3], &uimm)) {
247 
          return msgs[7];
248 
        }
249 
        if (uimm >= (unsigned) (1 << 16)) {
250 
          return msgs[8];
251 
        }
252 
        result = (((Word) instr->opcode + 1) << 26) |
253 
                 (r2 << 21) |
254 
                 (r1 << 16) |
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                 (uimm & MASK(16));
256 
      }
257 
      break;
258 
    case FORMAT_RRY:
259 
      /* either FORMAT_RRR or FORMAT_RRS */
260 
      if (n > 4) {
261 
        return msgs[4];
262 
      }
263 
      if (n < 4) {
264 
        return msgs[5];
265 
      }
266 
      if (!asmReg(tokens[1], &r1)) {
267 
        return msgs[6];
268 
      }
269 
      if (!asmReg(tokens[2], &r2)) {
270 
        return msgs[6];
271 
      }
272 
      if (*tokens[3] == '$') {
273 
        /* FORMAT_RRR */
274 
        if (!asmReg(tokens[3], &r3)) {
275 
          return msgs[6];
276 
        }
277 
        result = ((Word) instr->opcode << 26) |
278 
                 (r2 << 21) |
279 
                 (r3 << 16) |
280 
                 (r1 << 11);
281 
      } else {
282 
        /* FORMAT_RRS */
283 
        if (!asmNum(tokens[3], (unsigned int *) &simm)) {
284 
          return msgs[7];
285 
        }
286 
        if (simm >= (signed) (1 << 15) ||
287 
            simm < - (signed) (1 << 15)) {
288 
          return msgs[8];
289 
        }
290 
        result = (((Word) instr->opcode + 1) << 26) |
291 
                 (r2 << 21) |
292 
                 (r1 << 16) |
293 
                 (simm & MASK(16));
294 
      }
295 
      break;
296 
    case FORMAT_RRB:
297 
      /* two registers and a 16 bit signed offset operand */
298 
      if (n > 4) {
299 
        return msgs[4];
300 
      }
301 
      if (n < 4) {
302 
        return msgs[5];
303 
      }
304 
      if (!asmReg(tokens[1], &r1)) {
305 
        return msgs[6];
306 
      }
307 
      if (!asmReg(tokens[2], &r2)) {
308 
        return msgs[6];
309 
      }
310 
      if (!asmNum(tokens[3], (unsigned int *) &simm)) {
311 
        return msgs[7];
312 
      }
313 
      if ((simm & 0x00000003) != 0) {
314 
        return msgs[9];
315 
      }
316 
      simm -= addr + 4;
317 
      simm /= 4;
318 
      if (simm >= (signed) (1 << 15) ||
319 
          simm < - (signed) (1 << 15)) {
320 
        return msgs[10];
321 
      }
322 
      result = ((Word) instr->opcode << 26) |
323 
               (r1 << 21) |
324 
               (r2 << 16) |
325 
               (simm & MASK(16));
326 
      break;
327 
    case FORMAT_J:
328 
      /* no registers and a 26 bit signed offset operand */
329 
      if (n > 2) {
330 
        return msgs[4];
331 
      }
332 
      if (n < 2) {
333 
        return msgs[5];
334 
      }
335 
      if (!asmNum(tokens[1], (unsigned int *) &simm)) {
336 
        return msgs[7];
337 
      }
338 
      if ((simm & 0x00000003) != 0) {
339 
        return msgs[9];
340 
      }
341 
      simm -= addr + 4;
342 
      simm /= 4;
343 
      if (simm >= (signed) (1 << 25) ||
344 
          simm < - (signed) (1 << 25)) {
345 
        return msgs[10];
346 
      }
347 
      result = ((Word) instr->opcode << 26) |
348 
               (simm & MASK(26));
349 
      break;
350 
    case FORMAT_JR:
351 
      /* one register operand */
352 
      if (n > 2) {
353 
        return msgs[4];
354 
      }
355 
      if (n < 2) {
356 
        return msgs[5];
357 
      }
358 
      if (!asmReg(tokens[1], &r1)) {
359 
        return msgs[6];
360 
      }
361 
      result = ((Word) instr->opcode << 26) |
362 
               (r1 << 21);
363 
      break;
364 
    default:
365 
      return msgs[3];
366 
  }
367 
  /* line successfully assembled */
368 
  *instrPtr = result;
369 
  return NULL;
370 
}

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