OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [tags/] [eco32-0.24/] [sim/] [main.c] - Blame information for rev 211

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 8 hellwig
/*
2
 * main.c -- ECO32 simulator
3
 */
4
 
5
 
6
#include <stdio.h>
7
#include <stdlib.h>
8
#include <string.h>
9
 
10
#include "common.h"
11
#include "console.h"
12
#include "error.h"
13
#include "command.h"
14
#include "instr.h"
15
#include "cpu.h"
16
#include "mmu.h"
17
#include "memory.h"
18
#include "timer.h"
19
#include "dspkbd.h"
20
#include "term.h"
21
#include "disk.h"
22
#include "output.h"
23 25 hellwig
#include "shutdown.h"
24 8 hellwig
#include "graph.h"
25
 
26
 
27
static void usage(char *myself) {
28
  fprintf(stderr, "Usage: %s\n", myself);
29
  fprintf(stderr, "         [-i]             set interactive mode\n");
30
  fprintf(stderr, "         [-m <n>]         install n MB of RAM (1-%d)\n",
31
          RAM_SIZE_MAX / M);
32
  fprintf(stderr, "         [-l <prog>]      set program file name\n");
33 91 hellwig
  fprintf(stderr, "         [-a <addr>]      set program load address\n");
34 8 hellwig
  fprintf(stderr, "         [-r <rom>]       set ROM image file name\n");
35
  fprintf(stderr, "         [-d <disk>]      set disk image file name\n");
36
  fprintf(stderr, "         [-t <n>]         connect n terminals (0-%d)\n",
37
          MAX_NTERMS);
38
  fprintf(stderr, "         [-g]             install graphics controller\n");
39
  fprintf(stderr, "         [-c]             install console\n");
40
  fprintf(stderr, "         [-o <file>]      bind output device to file\n");
41
  fprintf(stderr, "The options -l and -r are mutually exclusive.\n");
42
  fprintf(stderr, "If both are omitted, interactive mode is assumed.\n");
43
  exit(1);
44
}
45
 
46
 
47
int main(int argc, char *argv[]) {
48
  int i;
49
  char *argp;
50
  char *endp;
51
  Bool interactive;
52
  int memSize;
53
  char *progName;
54 91 hellwig
  unsigned int loadAddr;
55 8 hellwig
  char *romName;
56
  char *diskName;
57
  int numTerms;
58
  Bool graphics;
59
  Bool console;
60
  char *outputName;
61
  Word initialPC;
62
  char command[20];
63
  char *line;
64
 
65
  interactive = false;
66
  memSize = RAM_SIZE_DFL / M;
67
  progName = NULL;
68 91 hellwig
  loadAddr = 0;
69 8 hellwig
  romName = NULL;
70
  diskName = NULL;
71
  numTerms = 0;
72
  graphics = false;
73
  console = false;
74
  outputName = NULL;
75
  for (i = 1; i < argc; i++) {
76
    argp = argv[i];
77
    if (*argp != '-') {
78
      usage(argv[0]);
79
    }
80
    argp++;
81
    switch (*argp) {
82
      case 'i':
83
        interactive = true;
84
        break;
85
      case 'm':
86
        if (i == argc - 1) {
87
          usage(argv[0]);
88
        }
89
        memSize = strtol(argv[++i], &endp, 10);
90
        if (*endp != '\0' ||
91
            memSize <= 0 ||
92
            memSize > RAM_SIZE_MAX / M) {
93
          usage(argv[0]);
94
        }
95
        break;
96
      case 'l':
97
        if (i == argc - 1 || progName != NULL || romName != NULL) {
98
          usage(argv[0]);
99
        }
100
        progName = argv[++i];
101
        break;
102 91 hellwig
      case 'a':
103
        if (i == argc - 1) {
104
          usage(argv[0]);
105
        }
106
        loadAddr = strtoul(argv[++i], &endp, 0);
107
        if (*endp != '\0') {
108
          usage(argv[0]);
109
        }
110
        break;
111 8 hellwig
      case 'r':
112
        if (i == argc - 1 || romName != NULL || progName != NULL) {
113
          usage(argv[0]);
114
        }
115
        romName = argv[++i];
116
        break;
117
      case 'd':
118
        if (i == argc - 1 || diskName != NULL) {
119
          usage(argv[0]);
120
        }
121
        diskName = argv[++i];
122
        break;
123
      case 't':
124
        if (i == argc - 1) {
125
          usage(argv[0]);
126
        }
127
        numTerms = strtol(argv[++i], &endp, 10);
128
        if (*endp != '\0' ||
129
            numTerms < 0 ||
130
            numTerms > MAX_NTERMS) {
131
          usage(argv[0]);
132
        }
133
        break;
134
      case 'g':
135
        graphics = true;
136
        break;
137
      case 'c':
138
        console = true;
139
        break;
140
      case 'o':
141
        if (i == argc - 1 || outputName != NULL) {
142
          usage(argv[0]);
143
        }
144
        outputName = argv[++i];
145
        break;
146
      default:
147
        usage(argv[0]);
148
    }
149
  }
150
  cInit();
151
  cPrintf("ECO32 Simulator started\n");
152
  if (progName == NULL && romName == NULL && !interactive) {
153
    cPrintf("Neither a program to load nor a system ROM was\n");
154
    cPrintf("specified, so interactive mode is assumed.\n");
155
    interactive = true;
156
  }
157
  initInstrTable();
158
  timerInit();
159
  if (console) {
160
    displayInit();
161
    keyboardInit();
162
  }
163
  termInit(numTerms);
164
  diskInit(diskName);
165
  outputInit(outputName);
166 25 hellwig
  shutdownInit();
167 8 hellwig
  if (graphics) {
168
    graphInit();
169
  }
170 91 hellwig
  memoryInit(memSize * M, progName, loadAddr, romName);
171 8 hellwig
  mmuInit();
172
  if (progName != NULL) {
173 91 hellwig
    initialPC = 0xC0000000 | loadAddr;
174 8 hellwig
  } else {
175
    initialPC = 0xC0000000 | ROM_BASE;
176
  }
177
  cpuInit(initialPC);
178
  if (!interactive) {
179
    cPrintf("Start executing...\n");
180
    strcpy(command, "c\n");
181
    execCommand(command);
182
  } else {
183
    while (1) {
184
      line = cGetLine("ECO32 > ");
185
      if (*line == '\0') {
186
        break;
187
      }
188
      cAddHist(line);
189
      if (execCommand(line)) {
190
        break;
191
      }
192
    }
193
  }
194
  cpuExit();
195
  mmuExit();
196
  memoryExit();
197
  timerExit();
198
  displayExit();
199
  keyboardExit();
200
  termExit();
201
  diskExit();
202
  outputExit();
203 25 hellwig
  shutdownExit();
204 8 hellwig
  graphExit();
205
  cPrintf("ECO32 Simulator finished\n");
206
  cExit();
207
  return 0;
208
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.