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hellwig |
#
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# eco32.ucf -- ECO32 user constraints for S3E starter kit board
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#
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#
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# clock and reset
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#
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NET "clk_in"
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PERIOD = 20.0ns HIGH 40%;
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10 |
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NET "clk_in"
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LOC = "C9" | IOSTANDARD = LVCMOS33;
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12 |
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NET "reset_in"
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LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN;
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15 |
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#
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# DDR SDRAM
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17 |
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#
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NET "sdram_ck_p"
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LOC = "J5" | IOSTANDARD = SSTL2_I;
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NET "sdram_ck_n"
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LOC = "J4" | IOSTANDARD = SSTL2_I;
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NET "sdram_cke"
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LOC = "K3" | IOSTANDARD = SSTL2_I;
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24 |
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NET "sdram_cs_n"
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LOC = "K4" | IOSTANDARD = SSTL2_I;
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NET "sdram_ras_n"
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LOC = "C1" | IOSTANDARD = SSTL2_I;
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NET "sdram_cas_n"
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LOC = "C2" | IOSTANDARD = SSTL2_I;
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NET "sdram_we_n"
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LOC = "D1" | IOSTANDARD = SSTL2_I;
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NET "sdram_ba<1>"
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LOC = "K6" | IOSTANDARD = SSTL2_I;
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NET "sdram_ba<0>"
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LOC = "K5" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<12>"
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LOC = "P2" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<11>"
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LOC = "N5" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<10>"
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41 |
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LOC = "T2" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<9>"
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LOC = "N4" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<8>"
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LOC = "H2" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<7>"
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LOC = "H1" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<6>"
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LOC = "H3" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<5>"
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LOC = "H4" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<4>"
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LOC = "F4" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<3>"
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LOC = "P1" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<2>"
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LOC = "R2" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<1>"
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LOC = "R3" | IOSTANDARD = SSTL2_I;
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NET "sdram_a<0>"
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LOC = "T1" | IOSTANDARD = SSTL2_I;
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NET "sdram_udm"
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LOC = "J1" | IOSTANDARD = SSTL2_I;
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NET "sdram_ldm"
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LOC = "J2" | IOSTANDARD = SSTL2_I;
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NET "sdram_udqs"
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LOC = "G3" | IOSTANDARD = SSTL2_I;
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NET "sdram_ldqs"
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LOC = "L6" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<15>"
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LOC = "H5" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<14>"
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LOC = "H6" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<13>"
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LOC = "G5" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<12>"
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LOC = "G6" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<11>"
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LOC = "F2" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<10>"
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LOC = "F1" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<9>"
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LOC = "E1" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<8>"
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LOC = "E2" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<7>"
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LOC = "M6" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<6>"
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LOC = "M5" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<5>"
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LOC = "M4" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<4>"
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LOC = "M3" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<3>"
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LOC = "L4" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<2>"
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LOC = "L3" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<1>"
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LOC = "L1" | IOSTANDARD = SSTL2_I;
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NET "sdram_dq<0>"
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LOC = "L2" | IOSTANDARD = SSTL2_I;
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#
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# prohibit VREF pins
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#
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CONFIG PROHIBIT = D2;
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CONFIG PROHIBIT = G4;
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CONFIG PROHIBIT = J6;
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CONFIG PROHIBIT = L5;
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CONFIG PROHIBIT = R4;
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#
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113 |
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# parallel NOR flash ROM
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#
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NET "flash_ce_n"
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LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_oe_n"
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LOC = "C18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_we_n"
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120 |
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LOC = "D17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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121 |
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NET "flash_byte_n"
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122 |
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LOC = "C17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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123 |
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NET "flash_a<23>"
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LOC = "N11" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<22>"
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LOC = "V12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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127 |
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NET "flash_a<21>"
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LOC = "V13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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129 |
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NET "flash_a<20>"
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130 |
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LOC = "T12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<19>"
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LOC = "V15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<18>"
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LOC = "U15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<17>"
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LOC = "T16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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137 |
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NET "flash_a<16>"
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LOC = "U18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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139 |
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NET "flash_a<15>"
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140 |
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LOC = "T17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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141 |
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NET "flash_a<14>"
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142 |
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LOC = "R18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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143 |
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NET "flash_a<13>"
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144 |
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LOC = "T18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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145 |
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NET "flash_a<12>"
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146 |
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LOC = "L16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<11>"
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LOC = "L15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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149 |
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NET "flash_a<10>"
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150 |
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LOC = "K13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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151 |
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NET "flash_a<9>"
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152 |
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LOC = "K12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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153 |
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NET "flash_a<8>"
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154 |
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LOC = "K15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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155 |
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NET "flash_a<7>"
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156 |
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LOC = "K14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<6>"
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158 |
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LOC = "J17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<5>"
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LOC = "J16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<4>"
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LOC = "J15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<3>"
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164 |
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LOC = "J14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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165 |
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NET "flash_a<2>"
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LOC = "J12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_a<1>"
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168 |
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LOC = "J13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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169 |
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NET "flash_a<0>"
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170 |
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LOC = "H17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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171 |
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NET "flash_d<15>"
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172 |
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LOC = "T8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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173 |
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NET "flash_d<14>"
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174 |
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LOC = "R8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<13>"
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176 |
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LOC = "P6" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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177 |
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NET "flash_d<12>"
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178 |
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LOC = "M16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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179 |
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NET "flash_d<11>"
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180 |
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LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<10>"
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182 |
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LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<9>"
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LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<8>"
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186 |
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LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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187 |
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NET "flash_d<7>"
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188 |
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LOC = "N9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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189 |
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NET "flash_d<6>"
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190 |
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LOC = "M9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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191 |
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NET "flash_d<5>"
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192 |
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LOC = "R9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<4>"
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194 |
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LOC = "U9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<3>"
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196 |
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LOC = "V9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<2>"
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LOC = "R10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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NET "flash_d<1>"
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200 |
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LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
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201 |
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NET "flash_d<0>"
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202 |
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LOC = "N10" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;
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203 |
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204 |
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#
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205 |
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# VGA display
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206 |
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#
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207 |
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NET "vga_hsync"
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208 |
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LOC = "F15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;
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209 |
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NET "vga_vsync"
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210 |
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LOC = "F14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;
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211 |
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NET "vga_r"
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212 |
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LOC = "H14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;
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213 |
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NET "vga_g"
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214 |
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LOC = "H15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;
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215 |
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NET "vga_b"
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216 |
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LOC = "G15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;
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217 |
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218 |
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#
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219 |
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# keyboard
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220 |
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#
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221 |
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NET "ps2_clk"
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222 |
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LOC = "G14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;
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223 |
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NET "ps2_data"
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224 |
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LOC = "G13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;
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225 |
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226 |
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#
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227 |
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# serial line 0
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228 |
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#
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229 |
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NET "rs232_0_rxd"
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230 |
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LOC = "R7" | IOSTANDARD = LVTTL;
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231 |
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NET "rs232_0_txd"
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232 |
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LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
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233 |
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234 |
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#
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235 |
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# serial line 1
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236 |
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#
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237 |
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NET "rs232_1_rxd"
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238 |
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LOC = "U8" | IOSTANDARD = LVTTL;
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239 |
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NET "rs232_1_txd"
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240 |
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LOC = "M13" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
241 |
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242 |
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#
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243 |
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# SPI bus controller
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244 |
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#
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245 |
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NET "spi_sck"
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246 |
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LOC = "U16" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;
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247 |
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NET "spi_mosi"
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248 |
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LOC = "T4" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;
|
249 |
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NET "dac_cs_n"
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250 |
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LOC = "N8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;
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251 |
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NET "dac_clr_n"
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252 |
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LOC = "P8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;
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253 |
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NET "amp_cs_n"
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254 |
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LOC = "N7" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;
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255 |
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NET "amp_shdn"
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256 |
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LOC = "P7" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;
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257 |
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NET "ad_conv"
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258 |
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LOC = "P11" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;
|
259 |
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|
260 |
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#
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261 |
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# board I/O
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262 |
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#
|
263 |
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NET "sw<3>"
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264 |
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LOC = "N17" | IOSTANDARD = LVTTL | PULLUP;
|
265 |
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NET "sw<2>"
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266 |
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LOC = "H18" | IOSTANDARD = LVTTL | PULLUP;
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267 |
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NET "sw<1>"
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268 |
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LOC = "L14" | IOSTANDARD = LVTTL | PULLUP;
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269 |
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NET "sw<0>"
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270 |
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LOC = "L13" | IOSTANDARD = LVTTL | PULLUP;
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271 |
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NET "led<7>"
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272 |
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LOC = "F9" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
273 |
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NET "led<6>"
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274 |
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LOC = "E9" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
275 |
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NET "led<5>"
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276 |
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LOC = "D11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
277 |
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NET "led<4>"
|
278 |
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LOC = "C11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
279 |
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NET "led<3>"
|
280 |
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LOC = "F11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
281 |
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NET "led<2>"
|
282 |
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LOC = "E11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
283 |
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NET "led<1>"
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284 |
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LOC = "E12" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
285 |
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NET "led<0>"
|
286 |
|
|
LOC = "F12" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;
|
287 |
|
|
NET "lcd_e"
|
288 |
|
|
LOC = "M18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
|
289 |
|
|
NET "lcd_rw"
|
290 |
|
|
LOC = "L17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
|
291 |
|
|
NET "lcd_rs"
|
292 |
|
|
LOC = "L18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
|
293 |
|
|
NET "spi_ss_b"
|
294 |
|
|
LOC = "U3" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;
|
295 |
|
|
NET "fpga_init_b"
|
296 |
|
|
LOC = "T3" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;
|