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[/] [eco32/] [trunk/] [fp/] [implementation/] [mmix/] [alpha.mms] - Blame information for rev 54

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Line No. Rev Author Line
1 15 hellwig
* The "alpha channel" exercise in section 7.1.3
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x     GREG
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y     GREG
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z     GREG
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m     GREG
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alpha GREG
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t     IS  $255
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l     GREG #0101010101010101
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h     GREG #8080808080808080
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mone  GREG -1
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rodd  GREG #4020100804020101
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lsh   GREG #0080402010080402
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      LOC  #100
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Main  XOR  t,x,y
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      MOR  z,rodd,t
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      AND  t,x,y
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      ADDU z,z,t
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      AND  t,alpha,h
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      MOR  m,mone,t
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      PUT  rM,m
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      MUX  x,z,x
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      MUX  y,y,z
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      MOR  alpha,lsh,alpha
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      XOR  t,x,y
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      MOR  z,t,rodd
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      AND  t,x,y
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      ADDU z,z,t
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      AND  t,alpha,h
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      MOR  m,t,mone
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      PUT  rM,m
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      MUX  x,z,x
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      MUX  y,y,z
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      MOR  alpha,alpha,lsh
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      XOR  t,x,y
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      MOR  z,t,rodd
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      AND  t,x,y
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      ADDU z,z,t
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      AND  t,alpha,h
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      MOR  m,t,mone
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      PUT  rM,m
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      MUX  x,z,x
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      MUX  y,y,z
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      MOR  alpha,alpha,lsh
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      XOR  t,x,y
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      MOR  z,t,rodd
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      AND  t,x,y
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      ADDU z,z,t
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      AND  t,alpha,h
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      MOR  m,t,mone
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      PUT  rM,m
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      MUX  x,z,x
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      MUX  y,y,z
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      MOR  alpha,alpha,lsh
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      XOR  t,x,y
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      MOR  z,t,rodd
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      AND  t,x,y
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      ADDU z,z,t
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      AND  t,alpha,h
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      MOR  m,t,mone
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      PUT  rM,m
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      MUX  x,z,x
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      MUX  y,y,z
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      MOR  alpha,alpha,lsh
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      XOR  t,x,y
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      MOR  z,t,rodd
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      AND  t,x,y
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      ADDU z,z,t
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      AND  t,alpha,h
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      MOR  m,t,mone
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      PUT  rM,m
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      MUX  x,z,x
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      MUX  y,y,z
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      MOR  alpha,alpha,lsh
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      XOR  t,x,y
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      MOR  z,t,rodd
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      AND  t,x,y
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      ADDU z,z,t
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      AND  t,alpha,h
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      MOR  m,t,mone
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      PUT  rM,m
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      MUX  x,z,x
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      MUX  y,y,z
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      MOR  alpha,alpha,lsh
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      XOR  t,x,y
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      MOR  z,t,rodd
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      AND  t,x,y
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      ADDU z,z,t
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      TRAP 0,Halt,0

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